Removed "options SMP_TIMER_NC".
Removed TEST_ALTTIMER. Removed APIC_PIN0_TIMER. Removed TIMER_ALL.
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@ -22,7 +22,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: smptests.h,v 1.16 1997/07/20 18:10:28 smp Exp smp $
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* $Id: smptests.h,v 1.15 1997/07/22 18:46:41 fsmp Exp $
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*/
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#ifndef _MACHINE_SMPTESTS_H_
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@ -30,47 +30,54 @@
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/*
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* various 'tests in progress'
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* Various 'tests in progress' and configuration parameters.
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*/
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/*
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* Address of POST hardware port.
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* Defining this enables POSTCODE macros.
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* Use the new INT passoff algorithm:
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*
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#define POST_ADDR 0x80
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* int_is_already_active = iactive & (1 << INT_NUMBER);
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* iactive |= (1 << INT_NUMBER);
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* if ( int_is_already_active || (try_mplock() == FAIL ) {
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* mask_apic_int( INT_NUMBER );
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* ipending |= (1 << INT_NUMBER);
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* do_eoi();
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* cleanup_and_iret();
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* }
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*
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* This algorithm seems to speed up kernel compiles a little,
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* my previous times were about 100s - 101s.
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* Also of note is the "point of diminishing returns" for the '-j'
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* arg to make seems to have increased from 8 to 12, AND the numbers
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* don't fall off as rapidly as before.
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*
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* 98.17s real 129.24s user 50.82s system # time make -j8
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* 98.67s real 128.44s user 52.55s system # time make -j10
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* 97.70s real 128.54s user 51.86s system # time make -j12
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* 98.57s real 130.14s user 50.46s system # time make -j14
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* 99.12s real 130.04s user 51.82s system # time make -j16
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* 97.75s real 129.91s user 51.62s system # time make -j18
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* 100.51s real 132.67s user 50.91s system # time make -j20
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*/
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#define PEND_INTS
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/*
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* 1st attempt to use ExtInt connected 8259 to attach 8254 timer.
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* 1st attempt to use the 'ExtInt' connected 8259 to attach 8254 timer.
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* failing that, attempt to attach 8254 timer via direct APIC pin.
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* failing that, panic!
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* This overrides both APIC_PIN0_TIMER & TEST_ALTTIMER
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*
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*/
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#define NEW_STRATEGY
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/*
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* Use 'regular Int' method to connect external 8254 timer via IO APIC pin 0.
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* See "Intel I486 Microprocessors and Related Products", page 4-292:
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* 82489DX/8259A DUAL MODE CONNECTION
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*
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*/
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#define APIC_PIN0_TIMER
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/*
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* Use non 'ExtInt' method of external (non-conected) 8254 timer
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* See "Intel I486 Microprocessors and Related Products", page 4-292:
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* 82489DX/8259A DUAL MODE CONNECTION
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* For emergency fallback, define ONLY if 'NEW_STRATEGY' fails to work.
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* Formerly needed by Tyan Tomcat II and SuperMicro P6DNxxx motherboards.
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*
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#define SMP_TIMER_NC
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*/
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#define TEST_ALTTIMER
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/*
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* Send 8254 timer INTs to all CPUs in LOPRIO mode.
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*
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*/
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#define TIMER_ALL
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/*
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@ -129,6 +136,14 @@
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*/
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/*
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* Address of POST hardware port.
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* Defining this enables POSTCODE macros.
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*
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#define POST_ADDR 0x80
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*/
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/*
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* POST hardware macros.
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*/
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