From 7ba75dc4e9abb4f4ae2230d34381d50152c2342e Mon Sep 17 00:00:00 2001 From: Pyun YongHyeon Date: Fri, 20 May 2011 18:27:13 +0000 Subject: [PATCH] Datasheet says vge(4) controllers support DAC but it seems that's not true on old PCI based controllers. DAC configuration is read from EEPROM in device reset phase and driver can override DAC configuration. However I guess there is an undocumented reason why EEPROM configuration does not enable DAC so do not blindly override DAC configuration. Recent PCIe based controllers are supposed to support 64bit DMA so allow 64bit DMA only on PCIe based controllers. PR: kern/157184 MFC after: 1 week --- sys/dev/vge/if_vge.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/sys/dev/vge/if_vge.c b/sys/dev/vge/if_vge.c index 4549bb08bca9..d9a58cce5b82 100644 --- a/sys/dev/vge/if_vge.c +++ b/sys/dev/vge/if_vge.c @@ -685,7 +685,18 @@ vge_dma_alloc(struct vge_softc *sc) bus_addr_t lowaddr, tx_ring_end, rx_ring_end; int error, i; - lowaddr = BUS_SPACE_MAXADDR; + /* + * It seems old PCI controllers do not support DAC. DAC + * configuration can be enabled by accessing VGE_CHIPCFG3 + * register but honor EEPROM configuration instead of + * blindly overriding DAC configuration. PCIe based + * controllers are supposed to support 64bit DMA so enable + * 64bit DMA on these controllers. + */ + if ((sc->vge_flags & VGE_FLAG_PCIE) != 0) + lowaddr = BUS_SPACE_MAXADDR; + else + lowaddr = BUS_SPACE_MAXADDR_32BIT; again: /* Create parent ring tag. */ @@ -802,10 +813,14 @@ again: goto again; } + if ((sc->vge_flags & VGE_FLAG_PCIE) != 0) + lowaddr = VGE_BUF_DMA_MAXADDR; + else + lowaddr = BUS_SPACE_MAXADDR_32BIT; /* Create parent buffer tag. */ error = bus_dma_tag_create(bus_get_dma_tag(sc->vge_dev),/* parent */ 1, 0, /* algnmnt, boundary */ - VGE_BUF_DMA_MAXADDR, /* lowaddr */ + lowaddr, /* lowaddr */ BUS_SPACE_MAXADDR, /* highaddr */ NULL, NULL, /* filter, filterarg */ BUS_SPACE_MAXSIZE_32BIT, /* maxsize */