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Switch mips/sentry5 to bhnd(4), and unify with mips/broadcom

Browse Source 
Now that bhnd(4) provides feature parity with the previous siba/mips
implementation, we can switch sentry5 over and begin lifting common
support code out for use across bhnd(4) embedded targets.

Changes:

- Fixed enumeration of siba(4) per-core address maps, required for
  discovery of memory mapped chipc flash region on siba(4) devices.
- Simplified bhnd kernel configuration (dropped 'bhndbus' option).
- Replaced files.broadcom's direct file references with their
  corresponding standard kernel options.
- Lifted out common bcma/siba nexus support, inheriting from the new
  generic bhnd_nexus driver.
- Dropped now-unused sentry5 siba code.
- Re-integrated BCM into the universe build now that it actually compiles.

Approved by:	adrian (mentor)
Differential Revision:	https://reviews.freebsd.org/D6712
This commit is contained in:
Landon J. Fuller 2016-06-04 19:53:47 +00:00
parent e129bcd6bc
commit 7ba7852fd7
18 changed files with 299 additions and 2057 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

83
sys/conf/files
View File

@ -9,12 +9,12 @@ acpi_quirks.h optional acpi \
compile-with "${AWK} -f $S/tools/acpi_quirks2h.awk $S/dev/acpica/acpi_quirks" \
no-obj no-implicit-rule before-depend \
clean "acpi_quirks.h"
bhnd_nvram_map.h optional bhndbus | bhnd \
bhnd_nvram_map.h optional bhnd \
dependency "$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
compile-with "sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -h" \
no-obj no-implicit-rule before-depend \
clean "bhnd_nvram_map.h"
bhnd_nvram_map_data.h optional bhndbus | bhnd \
bhnd_nvram_map_data.h optional bhnd \
dependency "$S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/tools/nvram_map_gen.awk $S/dev/bhnd/nvram/nvram_map" \
compile-with "sh $S/dev/bhnd/tools/nvram_map_gen.sh $S/dev/bhnd/nvram/nvram_map -d" \
no-obj no-implicit-rule before-depend \
@ -1127,40 +1127,46 @@ dev/ath/ath_dfs/null/dfs_null.c optional ath \
dev/bce/if_bce.c optional bce
dev/bfe/if_bfe.c optional bfe
dev/bge/if_bge.c optional bge
dev/bhnd/bhnd.c optional bhndbus | bhnd
dev/bhnd/bhnd_subr.c optional bhndbus | bhnd
dev/bhnd/bhnd_bus_if.m optional bhndbus | bhnd
dev/bhnd/bhndb/bhnd_bhndb.c optional bhndbus | bhndb
dev/bhnd/bhndb/bhndb.c optional bhndbus | bhndb
dev/bhnd/bhndb/bhndb_bus_if.m optional bhndbus | bhndb
dev/bhnd/bhndb/bhndb_hwdata.c optional bhndbus | bhndb
dev/bhnd/bhndb/bhndb_if.m optional bhndbus | bhndb
dev/bhnd/bhndb/bhndb_pci.c optional bhndbus pci | bhndb pci
dev/bhnd/bhndb/bhndb_pci_hwdata.c optional bhndbus pci | bhndb pci
dev/bhnd/bhndb/bhndb_pci_sprom.c optional bhndbus pci | bhndb pci
dev/bhnd/bhndb/bhndb_subr.c optional bhndbus pci | bhndb
dev/bhnd/bcma/bcma.c optional bhndbus | bcma
dev/bhnd/bcma/bcma_bhndb.c optional bhndbus | bcma bhndb
dev/bhnd/bcma/bcma_erom.c optional bhndbus | bcma
dev/bhnd/bcma/bcma_subr.c optional bhndbus | bcma
dev/bhnd/cores/chipc/chipc.c optional bhndbus | bhnd
dev/bhnd/cores/chipc/chipc_subr.c optional bhndbus | bhnd
dev/bhnd/cores/chipc/bhnd_chipc_if.m optional bhndbus | bhnd
dev/bhnd/cores/chipc/bhnd_sprom_chipc.c optional bhndbus | bhnd
dev/bhnd/cores/pci/bhnd_pci.c optional bhndbus pci | bhnd pci
dev/bhnd/cores/pci/bhnd_pci_hostb.c optional bhndbus pci | bhndb pci
dev/bhnd/bhnd.c optional bhnd
dev/bhnd/bhnd_nexus.c optional bhnd siba_nexus | \
bhnd bcma_nexus
dev/bhnd/bhnd_subr.c optional bhnd
dev/bhnd/bhnd_bus_if.m optional bhnd
dev/bhnd/bhndb/bhnd_bhndb.c optional bhndb bhnd
dev/bhnd/bhndb/bhndb.c optional bhndb bhnd
dev/bhnd/bhndb/bhndb_bus_if.m optional bhndb bhnd
dev/bhnd/bhndb/bhndb_hwdata.c optional bhndb bhnd
dev/bhnd/bhndb/bhndb_if.m optional bhndb bhnd
dev/bhnd/bhndb/bhndb_pci.c optional bhndb bhnd pci
dev/bhnd/bhndb/bhndb_pci_hwdata.c optional bhndb bhnd pci
dev/bhnd/bhndb/bhndb_pci_sprom.c optional bhndb bhnd pci
dev/bhnd/bhndb/bhndb_subr.c optional bhndb bhnd
dev/bhnd/bcma/bcma.c optional bcma bhnd
dev/bhnd/bcma/bcma_bhndb.c optional bcma bhnd bhndb
dev/bhnd/bcma/bcma_erom.c optional bcma bhnd
dev/bhnd/bcma/bcma_nexus.c optional bcma_nexus bcma bhnd
dev/bhnd/bcma/bcma_subr.c optional bcma bhnd
dev/bhnd/cores/chipc/chipc.c optional bhnd
dev/bhnd/cores/chipc/chipc_cfi.c optional bhnd cfi
dev/bhnd/cores/chipc/chipc_slicer.c optional bhnd cfi | bhnd spibus
dev/bhnd/cores/chipc/chipc_spi.c optional bhnd spibus
dev/bhnd/cores/chipc/chipc_subr.c optional bhnd
dev/bhnd/cores/chipc/bhnd_chipc_if.m optional bhnd
dev/bhnd/cores/chipc/bhnd_sprom_chipc.c optional bhnd
dev/bhnd/cores/pci/bhnd_pci.c optional bhnd pci
dev/bhnd/cores/pci/bhnd_pci_hostb.c optional bhndb bhnd pci
dev/bhnd/cores/pci/bhnd_pcib.c optional bhnd_pcib bhnd pci
dev/bhnd/cores/pcie2/bhnd_pcie2.c optional bhndbus pci | bhnd pci
dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c optional bhndbus pci | bhndb pci
dev/bhnd/cores/pcie2/bhnd_pcie2.c optional bhnd pci
dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c optional bhndb bhnd pci
dev/bhnd/cores/pcie2/bhnd_pcie2b.c optional bhnd_pcie2b bhnd pci
dev/bhnd/nvram/bhnd_nvram_if.m optional bhndbus | bhnd
dev/bhnd/nvram/bhnd_sprom.c optional bhndbus | bhnd
dev/bhnd/nvram/bhnd_sprom_subr.c optional bhndbus | bhnd
dev/bhnd/nvram/nvram_subr.c optional bhndbus | bhnd
dev/bhnd/siba/siba.c optional bhndbus | siba
dev/bhnd/siba/siba_bhndb.c optional bhndbus | siba bhndb
dev/bhnd/siba/siba_nexus.c optional siba_nexus siba
dev/bhnd/siba/siba_subr.c optional bhndbus | siba
dev/bhnd/nvram/bhnd_nvram_if.m optional bhnd
dev/bhnd/nvram/bhnd_sprom.c optional bhnd
dev/bhnd/nvram/bhnd_sprom_subr.c optional bhnd
dev/bhnd/nvram/nvram_subr.c optional bhnd
dev/bhnd/siba/siba.c optional siba bhnd
dev/bhnd/siba/siba_bhndb.c optional siba bhnd bhndb
dev/bhnd/siba/siba_nexus.c optional siba_nexus siba bhnd
dev/bhnd/siba/siba_subr.c optional siba bhnd
#
dev/bktr/bktr_audio.c optional bktr pci
dev/bktr/bktr_card.c optional bktr pci
@ -1182,7 +1188,7 @@ dev/bwi/if_bwi_pci.c optional bwi pci
# XXX Work around clang warning, until maintainer approves fix.
dev/bwn/if_bwn.c optional bwn siba_bwn \
compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
dev/bwn/if_bwn_pci.c optional bwn pci bhnd | bwn pci bhndbus
dev/bwn/if_bwn_pci.c optional bwn pci bhnd
dev/bwn/if_bwn_phy_common.c optional bwn siba_bwn
dev/bwn/if_bwn_phy_g.c optional bwn siba_bwn \
compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
@ -1190,7 +1196,7 @@ dev/bwn/if_bwn_phy_lp.c optional bwn siba_bwn \
compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
dev/bwn/if_bwn_phy_n.c optional bwn siba_bwn
dev/bwn/if_bwn_util.c optional bwn siba_bwn
dev/bwn/bwn_mac.c optional bwn bhnd | bwn bhndbus
dev/bwn/bwn_mac.c optional bwn bhnd
dev/cardbus/cardbus.c optional cardbus
dev/cardbus/cardbus_cis.c optional cardbus
dev/cardbus/cardbus_device.c optional cardbus
@ -2490,10 +2496,7 @@ dev/si/si_eisa.c optional si eisa
dev/si/si_isa.c optional si isa
dev/si/si_pci.c optional si pci
dev/siba/siba_bwn.c optional siba_bwn pci
dev/siba/siba_cc.c optional siba_s5 !bhnd !bhndbus
dev/siba/siba_core.c optional siba_s5 | siba_bwn pci
dev/siba/siba_mips.c optional siba_s5 !bhnd !bhndbus
dev/siba/siba_pcib.c optional siba_s5 pci !bhnd !bhndbus
dev/siba/siba_core.c optional siba_bwn pci
dev/siis/siis.c optional siis pci
dev/sis/if_sis.c optional sis pci
dev/sk/if_sk.c optional sk pci

5
sys/dev/bhnd/bcma/bcma.c
View File

@ -98,8 +98,9 @@ bcma_attach(device_t dev)
r_end = r_start + r_count - 1;
dinfo->rid_agent = i + 1;
dinfo->res_agent = bhnd_alloc_resource(dev, SYS_RES_MEMORY,
&dinfo->rid_agent, r_start, r_end, r_count, RF_ACTIVE);
dinfo->res_agent = BHND_BUS_ALLOC_RESOURCE(dev, dev,
SYS_RES_MEMORY, &dinfo->rid_agent, r_start, r_end, r_count,
RF_ACTIVE);
if (dinfo->res_agent == NULL) {
device_printf(dev, "failed allocating agent register "
"block for core %d\n", i);

107
sys/dev/bhnd/bcma/bcma_nexus.c
View File

@ -1,5 +1,6 @@
/*-
* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
* Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -25,6 +26,8 @@
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
* $FreeBSD$
*/
#include <sys/cdefs.h>
@ -34,78 +37,102 @@ __FBSDID("$FreeBSD$");
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
#include <sys/errno.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/bhnd/bhnd.h>
#include <dev/bhnd/bhnd_ids.h>
#include <dev/bhnd/bhnd_nexusvar.h>
#include <dev/bhnd/cores/chipc/chipcreg.h>
#include "bhnd_bus_if.h"
#include "bcmavar.h"
#include "bcma_eromreg.h"
#define BCMA_NEXUS_EROM_RID 10
/*
* Supports bcma(4) attachment to a nexus bus.
*/
static int bcma_nexus_attach(device_t);
static int bcma_nexus_probe(device_t);
struct bcma_nexus_softc {
struct bcma_softc parent_sc;
struct bhnd_chipid bcma_cid;
};
static int
bcma_nexus_probe(device_t dev)
{
const struct bhnd_chipid *cid = BHND_BUS_GET_CHIPID(device_get_parent(dev), dev);
struct bcma_nexus_softc *sc;
int error;
/* Check bus type */
if (cid->chip_type != BHND_CHIPTYPE_BCMA)
sc = device_get_softc(dev);
/* Read the ChipCommon info using the hints the kernel
* was compiled with. */
if ((error = bhnd_nexus_read_chipid(dev, &sc->bcma_cid)))
return (error);
if (sc->bcma_cid.chip_type != BHND_CHIPTYPE_BCMA)
return (ENXIO);
/* Delegate to default probe implementation */
return (bcma_probe(dev));
if ((error = bcma_probe(dev)) > 0) {
device_printf(dev, "error %d in probe\n", error);
return (error);
}
return (0);
}
static int
bcma_nexus_attach(device_t dev)
{
int erom_rid;
int error;
struct resource *erom_res;
const struct bhnd_chipid *cid = BHND_BUS_GET_CHIPID(device_get_parent(dev), dev);
struct bcma_nexus_softc *sc;
struct resource *erom_res;
int error;
int rid;
erom_rid = BCMA_NEXUS_EROM_RID;
error = bus_set_resource(dev, SYS_RES_MEMORY, erom_rid, cid->enum_addr, BCMA_EROM_TABLE_SIZE);
if (error != 0) {
BHND_ERROR_DEV(dev, "failed to set EROM resource");
return (error);
}
sc = device_get_softc(dev);
/* Map the EROM resource and enumerate our children. */
BHND_DEBUG_DEV(dev, "erom enum address: %jx", cid->enum_addr);
erom_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &erom_rid, RF_ACTIVE);
if (erom_res == NULL) {
BHND_ERROR_DEV(dev, "failed to allocate EROM resource");
return (ENXIO);
}
/* Map the EROM resource and enumerate the bus. */
rid = 0;
erom_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
sc->bcma_cid.enum_addr,
sc->bcma_cid.enum_addr + BCMA_EROM_TABLE_SIZE,
BCMA_EROM_TABLE_SIZE, RF_ACTIVE);
if (erom_res == NULL) {
device_printf(dev, "failed to allocate EROM resource\n");
return (ENXIO);
}
BHND_DEBUG_DEV(dev, "erom scanning start address: %p", rman_get_virtual(erom_res));
error = bcma_add_children(dev, erom_res, BCMA_EROM_TABLE_START);
error = bcma_add_children(dev, erom_res, BCMA_EROM_TABLE_START);
bus_release_resource(dev, SYS_RES_MEMORY, rid, erom_res);
/* Clean up */
bus_release_resource(dev, SYS_RES_MEMORY, erom_rid, erom_res);
if (error)
return (error);
if (error)
return (error);
/* Call our superclass' implementation */
return (bcma_attach(dev));
return (bcma_attach(dev));
}
static const struct bhnd_chipid *
bcma_nexus_get_chipid(device_t dev, device_t child) {
struct bcma_nexus_softc *sc = device_get_softc(dev);
return (&sc->bcma_cid);
}
static device_method_t bcma_nexus_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, bcma_nexus_probe),
DEVMETHOD(device_attach, bcma_nexus_attach),
/* bhnd interface */
DEVMETHOD(bhnd_bus_get_chipid, bcma_nexus_get_chipid),
DEVMETHOD_END
};
DEFINE_CLASS_1(bhnd, bcma_nexus_driver, bcma_nexus_methods, sizeof(struct bcma_softc), bcma_driver);
EARLY_DRIVER_MODULE(bcma_nexus, bhnd_soc, bcma_nexus_driver, bhnd_devclass,
NULL, NULL, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
DEFINE_CLASS_2(bhnd, bcma_nexus_driver, bcma_nexus_methods,
sizeof(struct bcma_nexus_softc), bhnd_nexus_driver, bcma_driver);
MODULE_VERSION(bcma_nexus, 1);
MODULE_DEPEND(bcma_nexus, bcma, 1, 1, 1);
MODULE_DEPEND(bcma_nexus, bhnd_soc, 1, 1, 1);
DRIVER_MODULE(bcma_nexus, nexus, bcma_nexus_driver, bhnd_devclass, 0, 0);

120
sys/dev/bhnd/bhnd_nexus.c Normal file
View File

@ -0,0 +1,120 @@
/*-
* Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*
* $FreeBSD$
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/*
* bhnd(4) driver mix-in providing shared common methods for
* bhnd bus devices attached via a root nexus.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <dev/bhnd/bhnd_ids.h>
#include <dev/bhnd/cores/chipc/chipcreg.h>
#include "bhnd_nexusvar.h"
static const struct resource_spec bhnd_nexus_res_spec[] = {
{ SYS_RES_MEMORY, 0, RF_ACTIVE }, /* chipc registers */
{ -1, 0, 0 }
};
/**
* Map ChipCommon's register block and read the chip identifier data.
*
* @param dev A bhnd_nexus device.
* @param chipid On success, will be populated with the chip identifier.
* @retval 0 success
* @retval non-zero An error occurred reading the chip identifier..
*/
int
bhnd_nexus_read_chipid(device_t dev, struct bhnd_chipid *chipid)
{
struct resource_spec rspec[nitems(bhnd_nexus_res_spec)];
int error;
memcpy(rspec, bhnd_nexus_res_spec, sizeof(rspec));
error = bhnd_read_chipid(dev, rspec, 0, chipid);
if (error)
device_printf(dev, "error %d reading chip ID\n", error);
return (error);
}
static bool
bhnd_nexus_is_hw_disabled(device_t dev, device_t child)
{
return false;
}
static bhnd_attach_type
bhnd_nexus_get_attach_type(device_t dev, device_t child)
{
return (BHND_ATTACH_NATIVE);
}
static int
bhnd_nexus_activate_resource(device_t dev, device_t child, int type, int rid,
struct bhnd_resource *r)
{
int error;
/* Always direct */
if ((error = bus_activate_resource(child, type, rid, r->res)))
return (error);
r->direct = true;
return (0);
}
static device_method_t bhnd_nexus_methods[] = {
/* bhnd interface */
DEVMETHOD(bhnd_bus_activate_resource, bhnd_nexus_activate_resource),
DEVMETHOD(bhnd_bus_is_hw_disabled, bhnd_nexus_is_hw_disabled),
DEVMETHOD(bhnd_bus_get_attach_type, bhnd_nexus_get_attach_type),
DEVMETHOD_END
};
DEFINE_CLASS_0(bhnd, bhnd_nexus_driver, bhnd_nexus_methods,
sizeof(struct bhnd_softc));

33
sys/dev/bhnd/soc/bhnd_soc.h → sys/dev/bhnd/bhnd_nexusvar.h
View File

@ -1,5 +1,5 @@
/*-
* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
* Copyright (c) 2016 Landon Fuller <landon@freebsd.org>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -25,27 +25,22 @@
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*/
/*
*
* $FreeBSD$
*/
#ifndef _BHND_SOC_BHND_SOC_H_
#define _BHND_SOC_BHND_SOC_H_
#define BHND_SOC_MAXNUM_CORES 0x20
#define BHND_SOC_RAM_OFFSET 0x0
#define BHND_SOC_RAM_SIZE 0x20000000
#ifndef _BHND_BHND_NEXUSVAR_H_
#define _BHND_BHND_NEXUSVAR_H_
struct bhnd_soc_softc {
device_t dev;
device_t bridge;
device_t bus;
struct bhnd_chipid chipid; /* chip identification */
};
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
struct bhnd_soc_devinfo {
struct resource_list resources;
};
#include "bhndvar.h"
#endif /* _BHND_SOC_BHND_SOC_H_ */
DECLARE_CLASS(bhnd_nexus_driver);
int bhnd_nexus_read_chipid(device_t dev, struct bhnd_chipid *chipid);
#endif /* _BHND_BHND_NEXUSVAR_H_ */

8
sys/dev/bhnd/siba/siba.c
View File

@ -114,7 +114,7 @@ siba_attach(device_t dev)
/* Allocate the config resource */
dinfo->cfg_rid[cfgidx] = 0;
dinfo->cfg[cfgidx] = bhnd_alloc_resource(dev,
dinfo->cfg[cfgidx] = BHND_BUS_ALLOC_RESOURCE(dev, dev,
SYS_RES_MEMORY, &dinfo->cfg_rid[cfgidx], r_start,
r_end, r_count, RF_ACTIVE);
@ -458,10 +458,6 @@ siba_register_addrspaces(device_t dev, struct siba_devinfo *di,
/* Fetch the address match register value */
adm = bus_read_4(r, adm_offset);
/* Skip disabled entries */
if (adm & SIBA_AM_ADEN)
continue;
/* Parse the value */
if ((error = siba_parse_admatch(adm, &addr, &size))) {
device_printf(dev, "failed to decode address "
@ -551,7 +547,7 @@ siba_add_children(device_t dev, const struct bhnd_chipid *chipid)
ccid = bhnd_parse_chipid(ccreg, SIBA_ENUM_ADDR);
if (!CHIPC_NCORES_MIN_HWREV(ccrev)) {
switch (device) {
switch (ccid.chip_id) {
case BHND_CHIPID_BCM4306:
ccid.ncores = 6;
break;

393
sys/dev/bhnd/siba/siba_nexus.c
View File

@ -1,4 +1,5 @@
/*-
* Copyright (c) 2015-2016 Landon Fuller <landon@freebsd.org>
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
@ -28,217 +29,50 @@
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/bhnd/bhnd_ids.h>
#include <dev/bhnd/cores/bhnd_chipcreg.h>
#include <dev/bhnd/bhnd_nexusvar.h>
#include <dev/bhnd/cores/chipc/chipcreg.h>
#include "sibareg.h"
#include "sibavar.h"
/*
* Supports siba(4) attachment to a MIPS nexus bus.
*
* This driver is a direct port of Bruce M. Simpson' original siba(4) to the
* bhnd(4) bus infrastructure.
* Derived from Bruce M. Simpson' original siba(4) driver.
*/
/*
* TODO: De-mipsify this code.
* TODO: cpu clock calculation. -> move to siba_cc instance
* TODO: Hardwire IRQs for attached cores on siba at probe time.
* TODO: Support detach.
* TODO: Power management.
* TODO: code cleanup.
* TODO: Support deployments of siba other than as a system bus.
*/
#ifndef MIPS_MEM_RID
#define MIPS_MEM_RID 0x20
#endif
extern int rman_debug;
static struct rman mem_rman; /* XXX move to softc */
static int siba_debug = 1;
static const char descfmt[] = "Sonics SiliconBackplane rev %s";
#define SIBA_DEVDESCLEN sizeof(descfmt) + 8
static int siba_nexus_activate_resource(device_t, device_t, int, int,
struct resource *);
static struct resource *
siba_nexus_alloc_resource(device_t, device_t, int, int *,
rman_res_t, rman_res_t, rman_res_t, u_int);
static int siba_nexus_attach(device_t);
#ifdef notyet
static uint8_t siba_nexus_getirq(uint16_t);
#endif
static int siba_nexus_probe(device_t);
struct siba_nexus_softc {
struct siba_softc parent_sc;
device_t siba_dev; /* Device ID */
struct bhnd_chipid siba_cid;
struct resource *siba_mem_res;
bus_space_tag_t siba_mem_bt;
bus_space_handle_t siba_mem_bh;
bus_addr_t siba_maddr;
bus_size_t siba_msize;
};
// TODO - depends on bhnd(4) IRQ support
#ifdef notyet
/*
* On the Sentry5, the system bus IRQs are the same as the
* MIPS IRQs. Particular cores are hardwired to certain IRQ lines.
*/
static uint8_t
siba_nexus_getirq(uint16_t devid)
{
uint8_t irq;
switch (devid) {
case BHND_COREID_CC:
irq = 0;
break;
case BHND_COREID_ENET:
irq = 1;
break;
case BHND_COREID_IPSEC:
irq = 2;
break;
case BHND_COREID_USB:
irq = 3;
break;
case BHND_COREID_PCI:
irq = 4;
break;
#if 0
/*
* 5 is reserved for the MIPS on-chip timer interrupt;
* it is hard-wired by the tick driver.
*/
case BHND_COREID_MIPS:
case BHND_COREID_MIPS33:
irq = 5;
break;
#endif
default:
irq = 0xFF; /* this core does not need an irq */
break;
}
return (irq);
}
#endif
static int
siba_nexus_probe(device_t dev)
{
struct siba_nexus_softc *sc = device_get_softc(dev);
struct bhnd_core_info cc;
uint32_t idhi, idlo;
int error, rid;
struct siba_nexus_softc *sc;
int error;
sc->siba_dev = dev;
sc = device_get_softc(dev);
//rman_debug = 1; /* XXX */
/* Read the ChipCommon info using the hints the kernel
* was compiled with. */
if ((error = bhnd_nexus_read_chipid(dev, &sc->siba_cid)))
return (error);
/*
* Read the ChipCommon info using the hints the kernel
* was compiled with.
*/
rid = MIPS_MEM_RID;
sc->siba_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->siba_mem_res == NULL) {
device_printf(dev, "unable to allocate probe aperture\n");
if (sc->siba_cid.chip_type != BHND_CHIPTYPE_SIBA)
return (ENXIO);
}
sc->siba_mem_bt = rman_get_bustag(sc->siba_mem_res);
sc->siba_mem_bh = rman_get_bushandle(sc->siba_mem_res);
sc->siba_maddr = rman_get_start(sc->siba_mem_res);
sc->siba_msize = rman_get_size(sc->siba_mem_res);
if (siba_debug) {
device_printf(dev, "start %08x len %08x\n",
sc->siba_maddr, sc->siba_msize);
}
idlo = bus_read_4(sc->siba_mem_res, SIBA_IDLOW);
idhi = bus_read_4(sc->siba_mem_res, SIBA_IDHIGH);
cc = siba_parse_core_info(idhi, 0, 0);
if (siba_debug) {
device_printf(dev, "idhi = %08x\n", idhi);
device_printf(dev, " chipcore id = %08x\n", cc.device);
}
/*
* For now, check that the first core is the ChipCommon core.
*/
if (bhnd_core_class(&cc) != BHND_DEVCLASS_CC) {
if (siba_debug)
device_printf(dev, "first core is not ChipCommon\n");
return (ENXIO);
}
/*
* Determine backplane revision and set description string.
*/
uint32_t rev;
char *revp;
char descbuf[SIBA_DEVDESCLEN];
rev = SIBA_REG_GET(idlo, IDL_SBREV);
revp = "unknown";
if (rev == SIBA_IDL_SBREV_2_2)
revp = "2.2";
else if (rev == SIBA_IDL_SBREV_2_3)
revp = "2.3";
(void)snprintf(descbuf, sizeof(descbuf), descfmt, revp);
device_set_desc_copy(dev, descbuf);
/*
* Determine how many cores are present on this siba bus, so
* that we may map them all.
*/
uint32_t ccidreg;
ccidreg = bus_read_4(sc->siba_mem_res, CHIPC_ID);
sc->siba_cid = bhnd_parse_chipid(ccidreg, sc->siba_maddr);
if (siba_debug) {
device_printf(dev, "ccid = %08x, cc_id = %04x, cc_rev = %04x\n",
ccidreg, sc->siba_cid.chip_id, sc->siba_cid.chip_rev);
}
if (sc->siba_cid.ncores == 0)
sc->siba_cid.ncores = siba_get_ncores(&sc->siba_cid);
if (siba_debug) {
device_printf(dev, "%d cores detected.\n", sc->siba_cid.ncores);
}
/*
* Now we know how many cores are on this siba, release the
* mapping and allocate a new mapping spanning all cores on the bus.
*/
rid = MIPS_MEM_RID;
error = bus_release_resource(dev, SYS_RES_MEMORY, rid,
sc->siba_mem_res);
if (error != 0) {
device_printf(dev, "error %d releasing resource\n", error);
return (ENXIO);
if ((error = siba_probe(dev)) > 0) {
device_printf(dev, "error %d in probe\n", error);
return (error);
}
return (0);
@ -247,52 +81,15 @@ siba_nexus_probe(device_t dev)
static int
siba_nexus_attach(device_t dev)
{
struct siba_nexus_softc *sc = device_get_softc(dev);
uint32_t total;
int error, rid;
struct siba_nexus_softc *sc;
int error;
if (siba_debug)
printf("%s: entry\n", __func__);
sc = device_get_softc(dev);
/* Enumerate the bus. */
if ((error = siba_add_children(dev, &sc->siba_cid)))
if ((error = siba_add_children(dev, NULL))) {
device_printf(dev, "error %d enumerating children\n", error);
return (error);
/* Allocate full core aperture */
total = sc->siba_cid.ncores;
sc->siba_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
sc->siba_maddr, sc->siba_maddr + total - 1, total, RF_ACTIVE);
if (sc->siba_mem_res == NULL) {
device_printf(dev, "unable to allocate entire aperture\n");
return (ENXIO);
}
sc->siba_mem_bt = rman_get_bustag(sc->siba_mem_res);
sc->siba_mem_bh = rman_get_bushandle(sc->siba_mem_res);
sc->siba_maddr = rman_get_start(sc->siba_mem_res);
sc->siba_msize = rman_get_size(sc->siba_mem_res);
if (siba_debug) {
device_printf(dev, "after remapping: start %08x len %08x\n",
sc->siba_maddr, sc->siba_msize);
}
bus_set_resource(dev, SYS_RES_MEMORY, rid, sc->siba_maddr,
sc->siba_msize);
/*
* We need a manager for the space we claim on nexus to
* satisfy requests from children.
* We need to keep the source reservation we took because
* otherwise it may be claimed elsewhere.
* XXX move to softc
*/
mem_rman.rm_start = sc->siba_maddr;
mem_rman.rm_end = sc->siba_maddr + sc->siba_msize - 1;
mem_rman.rm_type = RMAN_ARRAY;
mem_rman.rm_descr = "SiBa I/O memory addresses";
if (rman_init(&mem_rman) != 0 ||
rman_manage_region(&mem_rman, mem_rman.rm_start,
mem_rman.rm_end) != 0) {
panic("%s: mem_rman", __func__);
}
return (siba_attach(dev));
@ -304,150 +101,18 @@ siba_nexus_get_chipid(device_t dev, device_t child) {
return (&sc->siba_cid);
}
static struct resource *
siba_nexus_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct resource *rv;
struct resource_list *rl;
struct resource_list_entry *rle;
int isdefault, needactivate;
#if 0
if (siba_debug)
printf("%s: entry\n", __func__);
#endif
isdefault = (start == 0UL && end == ~0UL && count == 1);
needactivate = flags & RF_ACTIVE;
rl = BUS_GET_RESOURCE_LIST(bus, child);
rle = NULL;
if (isdefault) {
rle = resource_list_find(rl, type, *rid);
if (rle == NULL)
return (NULL);
if (rle->res != NULL)
panic("%s: resource entry is busy", __func__);
start = rle->start;
end = rle->end;
count = rle->count;
}
/*
* If the request is for a resource which we manage,
* attempt to satisfy the allocation ourselves.
*/
if (type == SYS_RES_MEMORY &&
start >= mem_rman.rm_start && end <= mem_rman.rm_end) {
rv = rman_reserve_resource(&mem_rman, start, end, count,
flags, child);
if (rv == 0) {
printf("%s: could not reserve resource\n", __func__);
return (0);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv)) {
printf("%s: could not activate resource\n",
__func__);
rman_release_resource(rv);
return (0);
}
}
return (rv);
}
/*
* Pass the request to the parent, usually MIPS nexus.
*/
if (siba_debug)
printf("%s: proxying request to parent\n", __func__);
return (resource_list_alloc(rl, bus, child, type, rid,
start, end, count, flags));
}
/*
* The parent bus is responsible for resource activation; in the
* case of MIPS, this boils down to setting the virtual address and
* bus handle by mapping the physical address into KSEG1.
*/
static int
siba_nexus_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child, type,
rid, r));
}
// TODO - depends on bhnd(4) IRQ support
#ifdef notyet
static struct siba_devinfo *
siba_nexus_setup_devinfo(device_t dev, uint8_t idx)
{
struct siba_nexus_softc *sc = device_get_softc(dev);
struct siba_devinfo *sdi;
uint32_t idlo, idhi, rev;
uint16_t vendorid, devid;
bus_addr_t baseaddr;
sdi = malloc(sizeof(*sdi), M_DEVBUF, M_WAITOK | M_ZERO);
resource_list_init(&sdi->sdi_rl);
idlo = siba_mips_read_4(sc, idx, SIBA_IDLOW);
idhi = siba_mips_read_4(sc, idx, SIBA_IDHIGH);
vendorid = (idhi & SIBA_IDHIGH_VENDORMASK) >>
SIBA_IDHIGH_VENDOR_SHIFT;
devid = ((idhi & 0x8ff0) >> 4);
rev = (idhi & SIBA_IDHIGH_REVLO);
rev |= (idhi & SIBA_IDHIGH_REVHI) >> SIBA_IDHIGH_REVHI_SHIFT;
sdi->sdi_vid = vendorid;
sdi->sdi_devid = devid;
sdi->sdi_rev = rev;
sdi->sdi_idx = idx;
sdi->sdi_irq = siba_getirq(devid);
/*
* Determine memory window on bus and irq if one is needed.
*/
baseaddr = sc->siba_maddr + (idx * SIBA_CORE_SIZE);
resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY,
MIPS_MEM_RID, /* XXX */
baseaddr, baseaddr + SIBA_CORE_LEN - 1, SIBA_CORE_LEN);
if (sdi->sdi_irq != 0xff) {
resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ,
0, sdi->sdi_irq, sdi->sdi_irq, 1);
}
return (sdi);
}
#endif
static device_method_t siba_nexus_methods[] = {
/* Device interface */
DEVMETHOD(device_attach, siba_nexus_attach),
DEVMETHOD(device_probe, siba_nexus_probe),
/* Bus interface */
DEVMETHOD(bus_activate_resource,siba_nexus_activate_resource),
DEVMETHOD(bus_alloc_resource, siba_nexus_alloc_resource),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(device_probe, siba_nexus_probe),
DEVMETHOD(device_attach, siba_nexus_attach),
/* bhnd interface */
DEVMETHOD(bhnd_get_chipid, siba_nexus_get_chipid),
DEVMETHOD(bhnd_bus_get_chipid, siba_nexus_get_chipid),
DEVMETHOD_END
};
DEFINE_CLASS_1(bhnd, siba_nexus_driver, siba_nexus_methods,
sizeof(struct siba_nexus_softc), siba_driver);
DEFINE_CLASS_2(bhnd, siba_nexus_driver, siba_nexus_methods,
sizeof(struct siba_nexus_softc), bhnd_nexus_driver, siba_driver);
DRIVER_MODULE(siba_nexus, nexus, siba_driver, bhnd_devclass, 0, 0);
DRIVER_MODULE(siba_nexus, nexus, siba_nexus_driver, bhnd_devclass, 0, 0);

6
sys/dev/bhnd/siba/siba_subr.c
View File

@ -244,9 +244,9 @@ siba_append_dinfo_region(struct siba_devinfo *dinfo, bhnd_port_type port_type,
struct siba_addrspace *sa;
struct siba_port *port;
rman_res_t r_size;
/* Verify that base + size will not overflow */
if (UINT32_MAX - size < base)
if (size > 0 && UINT32_MAX - (size - 1) < base)
return (ERANGE);
/* Verify that size - bus_reserved will not underflow */
@ -276,7 +276,7 @@ siba_append_dinfo_region(struct siba_devinfo *dinfo, bhnd_port_type port_type,
/* Populate the resource list */
r_size = size - bus_reserved;
sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY,
base, base + r_size - 1, r_size);
base, base + (r_size - 1), r_size);
/* Append to target port */
STAILQ_INSERT_TAIL(&port->sp_addrs, sa, sa_link);

266
sys/dev/bhnd/soc/bhnd_soc.c
View File

@ -1,266 +0,0 @@
/*-
* Copyright (c) 2016 Michael Zhilin <mizhka@gmail.com>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer,
* without modification.
* 2. Redistributions in binary form must reproduce at minimum a disclaimer
* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
* redistribution must be conditioned upon including a substantially
* similar Disclaimer requirement for further binary redistribution.
*
* NO WARRANTY
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
* THE POSSIBILITY OF SUCH DAMAGES.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/bus.h>
#include <sys/errno.h>
#include <sys/malloc.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <machine/resource.h>
#include <dev/bhnd/bhnd_debug.h>
#include <dev/bhnd/bhndvar.h>
#include <dev/bhnd/bhndreg.h>
#include <dev/bhnd/bhndb/bhndb.h>
#include <dev/bhnd/soc/bhnd_soc.h>
#include "bhndb_if.h"
/*
* **************************** VARIABLES *************************************
*/
struct resource_spec bhnd_soc_default_rspec = {SYS_RES_MEMORY, 0, RF_ACTIVE};
/*
* **************************** PROTOTYPES ************************************
*/
static int bhnd_soc_attach_bus(device_t dev, struct bhnd_soc_softc* sc);
static int bhnd_soc_probe(device_t dev);
static int bhnd_soc_attach(device_t dev);
int bhnd_soc_attach_by_class(device_t parent, device_t *child,
int unit, devclass_t child_devclass);
/*
* **************************** IMPLEMENTATION ********************************
*/
int
bhnd_soc_attach_by_class(device_t parent, device_t *child, int unit,
devclass_t child_devclass)
{
int error;
struct bhnd_soc_devinfo* devinfo;
*child = device_add_child(parent, devclass_get_name(child_devclass),
unit);
if (*child == NULL)
return (ENXIO);
devinfo = malloc(sizeof(struct bhnd_soc_devinfo*), M_BHND, M_NOWAIT);
resource_list_init(&devinfo->resources);
for (int i = 0; i < BHND_SOC_MAXNUM_CORES; i++)
resource_list_add(&devinfo->resources, SYS_RES_MEMORY, i,
BHND_SOC_RAM_OFFSET, BHND_SOC_RAM_SIZE, 1);
device_set_ivars(*child, devinfo);
error = device_probe_and_attach(*child);
if (error && device_delete_child(parent, *child))
BHND_ERROR_DEV(parent, "failed to detach bhndb child");
return (error);
}
static int
bhnd_soc_attach_bus(device_t dev, struct bhnd_soc_softc* sc)
{
int error;
error = bhnd_read_chipid(dev, &bhnd_soc_default_rspec,
BHND_DEFAULT_CHIPC_ADDR, &sc->chipid);
if (error) {
return (error);
}
return (bhnd_soc_attach_by_class(dev, &(sc->bus), -1, bhnd_devclass));
}
static int
bhnd_soc_probe(device_t dev)
{
return (BUS_PROBE_GENERIC);
}
static int
bhnd_soc_attach(device_t dev)
{
struct bhnd_soc_softc* sc;
sc = device_get_softc(dev);
sc->dev = dev;
return (bhnd_soc_attach_bus(dev,sc));
}
static const struct bhnd_chipid *
bhnd_soc_get_chipid (device_t dev, device_t child)
{
struct bhnd_soc_softc* sc;
sc = device_get_softc(dev);
return (&sc->chipid);
}
static struct resource_list *
bhnd_soc_get_rl(device_t dev, device_t child)
{
struct bhnd_soc_devinfo *dinfo;
dinfo = device_get_ivars(child);
return (&dinfo->resources);
}
static struct bhnd_resource *
bhnd_soc_alloc_resource(device_t dev, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct bhnd_soc_softc *sc;
struct bhnd_resource *br;
int error;
sc = device_get_softc(dev);
/* Allocate resource wrapper */
br = malloc(sizeof(struct bhnd_resource), M_BHND, M_NOWAIT|M_ZERO);
if (br == NULL)
return (NULL);
BHND_TRACE_DEV(child,"trying to allocate resource %d: %jx-%jx (%ju)",
*rid, start, end, count);
/* Configure */
br->direct = true;
br->res = bus_alloc_resource(child, type, rid, start, end, count,
flags & ~RF_ACTIVE);
if (br->res == NULL) {
BHND_ERROR_DEV(child, "can't allocate resource %d: %jx-%jx (%ju)",
*rid, start, end, count);
goto failed;
}
if (flags & RF_ACTIVE) {
BHND_TRACE_DEV(child, "trying to activate resource: %d", *rid);
error = bhnd_activate_resource(child, type, *rid, br);
if (error) {
BHND_ERROR_DEV(child, "can't activate BHND resource %d:"
"%jx-%jx (%ju) with error: %d",
*rid, start, end, count, error);
goto failed;
}
}
return (br);
failed:
if (br->res != NULL)
bus_release_resource(child, type, *rid, br->res);
free(br, M_BHND);
return (NULL);
}
static int
bhnd_soc_activate_resource(device_t dev, device_t child, int type, int rid,
struct bhnd_resource *r)
{
int error;
/*
* Fallback to direct
*/
error = bus_activate_resource(child, type, rid, r->res);
if (error) {
BHND_ERROR_DEV(child, "can't activate resource %d, error: %d",
rman_get_rid(r->res), error);
return (error);
}
r->direct = true;
return (0);
}
static bool
bhnd_soc_is_hw_disabled(device_t dev, device_t child)
{
return false;
}
static bhnd_attach_type
bhnd_soc_get_attach_type(device_t dev, device_t child)
{
return (BHND_ATTACH_NATIVE);
}
/*
* **************************** DRIVER METADATA ****************************
*/
static device_method_t bhnd_soc_methods[] = {
//device interface
DEVMETHOD(device_probe, bhnd_soc_probe),
DEVMETHOD(device_attach, bhnd_soc_attach),
//resources
DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
DEVMETHOD(bus_delete_resource, bus_generic_rl_delete_resource),
DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
//intr
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_config_intr, bus_generic_config_intr),
DEVMETHOD(bus_bind_intr, bus_generic_bind_intr),
DEVMETHOD(bus_describe_intr, bus_generic_describe_intr),
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
//resource list
DEVMETHOD(bus_get_resource_list, bhnd_soc_get_rl),
//bhnd - BCMA allocates agent resources
DEVMETHOD(bhnd_bus_alloc_resource, bhnd_soc_alloc_resource),
DEVMETHOD(bhnd_bus_activate_resource, bhnd_soc_activate_resource),
DEVMETHOD(bhnd_bus_is_hw_disabled, bhnd_soc_is_hw_disabled),
DEVMETHOD(bhnd_bus_get_chipid, bhnd_soc_get_chipid),
DEVMETHOD(bhnd_bus_get_attach_type, bhnd_soc_get_attach_type),
DEVMETHOD_END
};
devclass_t bhnd_soc_devclass;
DEFINE_CLASS_0(bhnd_soc, bhnd_soc_driver, bhnd_soc_methods,
sizeof(struct bhnd_soc_softc));
EARLY_DRIVER_MODULE(bhnd_soc, nexus, bhnd_soc_driver, bhnd_soc_devclass, NULL,
NULL, BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);

154
sys/dev/siba/siba_cc.c
View File

@ -1,154 +0,0 @@
/*-
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Child driver for ChipCommon core.
* This is not MI code at the moment.
* Two 16C550 compatible UARTs live here. On the WGT634U, uart1 is the
* system console, and uart0 is not pinned out.
* Because their presence is conditional, they should probably
* be attached from here.
* GPIO lives here.
* The hardware watchdog lives here.
* Clock control registers live here.
* You don't need to read them to determine the clock speed on the 5365,
* which is always 200MHz and thus may be hardcoded (for now).
* Flash config registers live here. There may or may not be system flash.
* The external interface bus lives here (conditionally).
* There is a JTAG interface here which may be used to attach probes to
* the SoC for debugging.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <dev/siba/siba_ids.h>
#include <dev/siba/sibareg.h>
#include <dev/siba/sibavar.h>
static int siba_cc_attach(device_t);
static int siba_cc_probe(device_t);
static void siba_cc_intr(void *v);
static int
siba_cc_probe(device_t dev)
{
if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
siba_get_device(dev) == SIBA_DEVID_CHIPCOMMON) {
device_set_desc(dev, "ChipCommon core");
return (BUS_PROBE_DEFAULT);
}
return (ENXIO);
}
struct siba_cc_softc {
void *notused;
};
static int
siba_cc_attach(device_t dev)
{
//struct siba_cc_softc *sc = device_get_softc(dev);
struct resource *mem;
struct resource *irq;
int rid;
/*
* Allocate the resources which the parent bus has already
* determined for us.
* TODO: interrupt routing
*/
#define MIPS_MEM_RID 0x20
rid = MIPS_MEM_RID;
mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
if (mem == NULL) {
device_printf(dev, "unable to allocate memory\n");
return (ENXIO);
}
rid = 0;
irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 0);
if (irq == NULL) {
device_printf(dev, "unable to allocate irq\n");
return (ENXIO);
}
/* now setup the interrupt */
/* may be fast, exclusive or mpsafe at a later date */
/*
* XXX is this interrupt line in ChipCommon used for anything
* other than the uart? in that case we shouldn't hog it ourselves
* and let uart claim it to avoid polled mode.
*/
int err;
void *cookie;
err = bus_setup_intr(dev, irq, INTR_TYPE_TTY, NULL, siba_cc_intr, NULL,
&cookie);
if (err != 0) {
device_printf(dev, "unable to setup intr\n");
return (ENXIO);
}
/* TODO: attach uart child */
return (0);
}
static void
siba_cc_intr(void *v)
{
}
static device_method_t siba_cc_methods[] = {
/* Device interface */
DEVMETHOD(device_attach, siba_cc_attach),
DEVMETHOD(device_probe, siba_cc_probe),
DEVMETHOD_END
};
static driver_t siba_cc_driver = {
"siba_cc",
siba_cc_methods,
sizeof(struct siba_softc),
};
static devclass_t siba_cc_devclass;
DRIVER_MODULE(siba_cc, siba, siba_cc_driver, siba_cc_devclass, 0, 0);

642
sys/dev/siba/siba_mips.c
View File

@ -1,642 +0,0 @@
/*-
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <machine/bus.h>
#include <dev/siba/siba_ids.h>
#include <dev/siba/sibareg.h>
#include <dev/siba/sibavar.h>
/*
* TODO: De-mipsify this code.
* TODO: cpu clock calculation. -> move to siba_cc instance
* TODO: Hardwire IRQs for attached cores on siba at probe time.
* TODO: Support detach.
* TODO: Power management.
* TODO: code cleanup.
* TODO: Support deployments of siba other than as a system bus.
*/
#ifndef MIPS_MEM_RID
#define MIPS_MEM_RID 0x20
#endif
extern int rman_debug;
static struct rman mem_rman; /* XXX move to softc */
static int siba_debug = 1;
static const char descfmt[] = "Sonics SiliconBackplane rev %s";
#define SIBA_DEVDESCLEN sizeof(descfmt) + 8
/*
* Device identifiers and descriptions.
*/
static struct siba_devid siba_devids[] = {
{ SIBA_VID_BROADCOM, SIBA_DEVID_CHIPCOMMON, SIBA_REV_ANY,
"ChipCommon" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_SDRAM, SIBA_REV_ANY,
"SDRAM controller" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_PCI, SIBA_REV_ANY,
"PCI host interface" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_MIPS, SIBA_REV_ANY,
"MIPS core" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_ETHERNET, SIBA_REV_ANY,
"Ethernet core" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_USB11_HOSTDEV, SIBA_REV_ANY,
"USB host controller" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_IPSEC, SIBA_REV_ANY,
"IPSEC accelerator" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_SDRAMDDR, SIBA_REV_ANY,
"SDRAM/DDR controller" },
{ SIBA_VID_BROADCOM, SIBA_DEVID_MIPS_3302, SIBA_REV_ANY,
"MIPS 3302 core" },
{ 0, 0, 0, NULL }
};
static int siba_activate_resource(device_t, device_t, int, int,
struct resource *);
static device_t siba_add_child(device_t, u_int, const char *, int);
static struct resource *
siba_alloc_resource(device_t, device_t, int, int *, rman_res_t,
rman_res_t, rman_res_t, u_int);
static int siba_attach(device_t);
#ifdef notyet
static void siba_destroy_devinfo(struct siba_devinfo *);
#endif
static struct siba_devid *
siba_dev_match(uint16_t, uint16_t, uint8_t);
static struct resource_list *
siba_get_reslist(device_t, device_t);
static uint8_t siba_getirq(uint16_t);
static int siba_print_all_resources(device_t dev);
static int siba_print_child(device_t, device_t);
static int siba_probe(device_t);
static void siba_probe_nomatch(device_t, device_t);
int siba_read_ivar(device_t, device_t, int, uintptr_t *);
static struct siba_devinfo *
siba_setup_devinfo(device_t, uint8_t);
int siba_write_ivar(device_t, device_t, int, uintptr_t);
uint8_t siba_getncores(device_t, uint16_t);
/*
* On the Sentry5, the system bus IRQs are the same as the
* MIPS IRQs. Particular cores are hardwired to certain IRQ lines.
*/
static uint8_t
siba_getirq(uint16_t devid)
{
uint8_t irq;
switch (devid) {
case SIBA_DEVID_CHIPCOMMON:
irq = 0;
break;
case SIBA_DEVID_ETHERNET:
irq = 1;
break;
case SIBA_DEVID_IPSEC:
irq = 2;
break;
case SIBA_DEVID_USB11_HOSTDEV:
irq = 3;
break;
case SIBA_DEVID_PCI:
irq = 4;
break;
#if 0
/*
* 5 is reserved for the MIPS on-chip timer interrupt;
* it is hard-wired by the tick driver.
*/
case SIBA_DEVID_MIPS:
case SIBA_DEVID_MIPS_3302:
irq = 5;
break;
#endif
default:
irq = 0xFF; /* this core does not need an irq */
break;
}
return (irq);
}
static int
siba_probe(device_t dev)
{
struct siba_softc *sc = device_get_softc(dev);
uint32_t idlo, idhi;
uint16_t ccid;
int rid;
sc->siba_dev = dev;
//rman_debug = 1; /* XXX */
/*
* Map the ChipCommon register set using the hints the kernel
* was compiled with.
*/
rid = MIPS_MEM_RID;
sc->siba_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->siba_mem_res == NULL) {
device_printf(dev, "unable to allocate probe aperture\n");
return (ENXIO);
}
sc->siba_mem_bt = rman_get_bustag(sc->siba_mem_res);
sc->siba_mem_bh = rman_get_bushandle(sc->siba_mem_res);
sc->siba_maddr = rman_get_start(sc->siba_mem_res);
sc->siba_msize = rman_get_size(sc->siba_mem_res);
if (siba_debug) {
device_printf(dev, "start %08x len %08x\n",
sc->siba_maddr, sc->siba_msize);
}
idlo = siba_mips_read_4(sc, 0, SIBA_IDLOW);
idhi = siba_mips_read_4(sc, 0, SIBA_IDHIGH);
ccid = ((idhi & 0x8ff0) >> 4);
if (siba_debug) {
device_printf(dev, "idlo = %08x\n", idlo);
device_printf(dev, "idhi = %08x\n", idhi);
device_printf(dev, " chipcore id = %08x\n", ccid);
}
/*
* For now, check that the first core is the ChipCommon core.
*/
if (ccid != SIBA_DEVID_CHIPCOMMON) {
if (siba_debug)
device_printf(dev, "first core is not ChipCommon\n");
return (ENXIO);
}
/*
* Determine backplane revision and set description string.
*/
uint32_t rev;
char *revp;
char descbuf[SIBA_DEVDESCLEN];
rev = idlo & 0xF0000000;
revp = "unknown";
if (rev == 0x00000000)
revp = "2.2";
else if (rev == 0x10000000)
revp = "2.3";
(void)snprintf(descbuf, sizeof(descbuf), descfmt, revp);
device_set_desc_copy(dev, descbuf);
/*
* Determine how many cores are present on this siba bus, so
* that we may map them all.
*/
uint32_t ccidreg;
uint16_t cc_id;
uint16_t cc_rev;
ccidreg = siba_mips_read_4(sc, 0, SIBA_CC_CHIPID);
cc_id = (ccidreg & SIBA_CC_IDMASK);
cc_rev = (ccidreg & SIBA_CC_REVMASK) >> SIBA_CC_REVSHIFT;
if (siba_debug) {
device_printf(dev, "ccid = %08x, cc_id = %04x, cc_rev = %04x\n",
ccidreg, cc_id, cc_rev);
}
sc->siba_ncores = siba_getncores(dev, cc_id);
if (siba_debug) {
device_printf(dev, "%d cores detected.\n", sc->siba_ncores);
}
/*
* Now we know how many cores are on this siba, release the
* mapping and allocate a new mapping spanning all cores on the bus.
*/
rid = MIPS_MEM_RID;
int result;
result = bus_release_resource(dev, SYS_RES_MEMORY, rid,
sc->siba_mem_res);
if (result != 0) {
device_printf(dev, "error %d releasing resource\n", result);
return (ENXIO);
}
uint32_t total;
total = sc->siba_ncores * SIBA_CORE_LEN;
/* XXX Don't allocate the entire window until we
* enumerate the bus. Once the bus has been enumerated,
* and instance variables/children instantiated + populated,
* release the resource so children may attach.
*/
sc->siba_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid,
sc->siba_maddr, sc->siba_maddr + total - 1, total, RF_ACTIVE);
if (sc->siba_mem_res == NULL) {
device_printf(dev, "unable to allocate entire aperture\n");
return (ENXIO);
}
sc->siba_mem_bt = rman_get_bustag(sc->siba_mem_res);
sc->siba_mem_bh = rman_get_bushandle(sc->siba_mem_res);
sc->siba_maddr = rman_get_start(sc->siba_mem_res);
sc->siba_msize = rman_get_size(sc->siba_mem_res);
if (siba_debug) {
device_printf(dev, "after remapping: start %08x len %08x\n",
sc->siba_maddr, sc->siba_msize);
}
bus_set_resource(dev, SYS_RES_MEMORY, rid, sc->siba_maddr,
sc->siba_msize);
/*
* We need a manager for the space we claim on nexus to
* satisfy requests from children.
* We need to keep the source reservation we took because
* otherwise it may be claimed elsewhere.
* XXX move to softc
*/
mem_rman.rm_start = sc->siba_maddr;
mem_rman.rm_end = sc->siba_maddr + sc->siba_msize - 1;
mem_rman.rm_type = RMAN_ARRAY;
mem_rman.rm_descr = "SiBa I/O memory addresses";
if (rman_init(&mem_rman) != 0 ||
rman_manage_region(&mem_rman, mem_rman.rm_start,
mem_rman.rm_end) != 0) {
panic("%s: mem_rman", __func__);
}
return (0);
}
static int
siba_attach(device_t dev)
{
struct siba_softc *sc = device_get_softc(dev);
struct siba_devinfo *sdi;
device_t child;
int idx;
if (siba_debug)
printf("%s: entry\n", __func__);
bus_generic_probe(dev);
/*
* Now that all bus space is mapped and visible to the CPU,
* enumerate its children.
* NB: only one core may be mapped at any time if the siba bus
* is the child of a PCI or PCMCIA bus.
*/
for (idx = 0; idx < sc->siba_ncores; idx++) {
sdi = siba_setup_devinfo(dev, idx);
child = device_add_child(dev, NULL, -1);
if (child == NULL)
panic("%s: device_add_child() failed\n", __func__);
device_set_ivars(child, sdi);
}
return (bus_generic_attach(dev));
}
static struct siba_devid *
siba_dev_match(uint16_t vid, uint16_t devid, uint8_t rev)
{
size_t i;
struct siba_devid *sd;
sd = &siba_devids[0];
for (i = 0; i < nitems(siba_devids); i++, sd++) {
if (((vid == SIBA_VID_ANY) || (vid == sd->sd_vendor)) &&
((devid == SIBA_DEVID_ANY) || (devid == sd->sd_device)) &&
((rev == SIBA_REV_ANY) || (rev == sd->sd_rev) ||
(sd->sd_rev == SIBA_REV_ANY)))
return(sd);
}
return (NULL);
}
static int
siba_print_child(device_t bus, device_t child)
{
int retval = 0;
retval += bus_print_child_header(bus, child);
retval += siba_print_all_resources(child);
if (device_get_flags(child))
retval += printf(" flags %#x", device_get_flags(child));
retval += printf(" on %s\n", device_get_nameunit(bus));
return (retval);
}
static struct resource *
siba_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
struct resource *rv;
struct resource_list *rl;
struct resource_list_entry *rle;
int isdefault, needactivate;
#if 0
if (siba_debug)
printf("%s: entry\n", __func__);
#endif
isdefault = (RMAN_IS_DEFAULT_RANGE(start, end) && count == 1);
needactivate = flags & RF_ACTIVE;
rl = BUS_GET_RESOURCE_LIST(bus, child);
rle = NULL;
if (isdefault) {
rle = resource_list_find(rl, type, *rid);
if (rle == NULL)
return (NULL);
if (rle->res != NULL)
panic("%s: resource entry is busy", __func__);
start = rle->start;
end = rle->end;
count = rle->count;
}
/*
* If the request is for a resource which we manage,
* attempt to satisfy the allocation ourselves.
*/
if (type == SYS_RES_MEMORY &&
start >= mem_rman.rm_start && end <= mem_rman.rm_end) {
rv = rman_reserve_resource(&mem_rman, start, end, count,
flags, child);
if (rv == 0) {
printf("%s: could not reserve resource\n", __func__);
return (0);
}
rman_set_rid(rv, *rid);
if (needactivate) {
if (bus_activate_resource(child, type, *rid, rv)) {
printf("%s: could not activate resource\n",
__func__);
rman_release_resource(rv);
return (0);
}
}
return (rv);
}
/*
* Pass the request to the parent, usually MIPS nexus.
*/
if (siba_debug)
printf("%s: proxying request to parent\n", __func__);
return (resource_list_alloc(rl, bus, child, type, rid,
start, end, count, flags));
}
/*
* The parent bus is responsible for resource activation; in the
* case of MIPS, this boils down to setting the virtual address and
* bus handle by mapping the physical address into KSEG1.
*/
static int
siba_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
return (BUS_ACTIVATE_RESOURCE(device_get_parent(bus), child, type,
rid, r));
}
static struct siba_devinfo *
siba_setup_devinfo(device_t dev, uint8_t idx)
{
struct siba_softc *sc = device_get_softc(dev);
struct siba_devinfo *sdi;
uint32_t idlo, idhi, rev;
uint16_t vendorid, devid;
bus_addr_t baseaddr;
sdi = malloc(sizeof(*sdi), M_DEVBUF, M_WAITOK | M_ZERO);
resource_list_init(&sdi->sdi_rl);
idlo = siba_mips_read_4(sc, idx, SIBA_IDLOW);
idhi = siba_mips_read_4(sc, idx, SIBA_IDHIGH);
vendorid = (idhi & SIBA_IDHIGH_VENDORMASK) >>
SIBA_IDHIGH_VENDOR_SHIFT;
devid = ((idhi & 0x8ff0) >> 4);
rev = (idhi & SIBA_IDHIGH_REVLO);
rev |= (idhi & SIBA_IDHIGH_REVHI) >> SIBA_IDHIGH_REVHI_SHIFT;
sdi->sdi_vid = vendorid;
sdi->sdi_devid = devid;
sdi->sdi_rev = rev;
sdi->sdi_idx = idx;
sdi->sdi_irq = siba_getirq(devid);
/*
* Determine memory window on bus and irq if one is needed.
*/
baseaddr = sc->siba_maddr + (idx * SIBA_CORE_LEN);
resource_list_add(&sdi->sdi_rl, SYS_RES_MEMORY,
MIPS_MEM_RID, /* XXX */
baseaddr, baseaddr + SIBA_CORE_LEN - 1, SIBA_CORE_LEN);
if (sdi->sdi_irq != 0xff) {
resource_list_add(&sdi->sdi_rl, SYS_RES_IRQ,
0, sdi->sdi_irq, sdi->sdi_irq, 1);
}
return (sdi);
}
#ifdef notyet
static void
siba_destroy_devinfo(struct siba_devinfo *sdi)
{
resource_list_free(&sdi->sdi_rl);
free(sdi, M_DEVBUF);
}
#endif
/* XXX is this needed? */
static device_t
siba_add_child(device_t dev, u_int order, const char *name, int unit)
{
#if 1
device_printf(dev, "%s: entry\n", __func__);
return (NULL);
#else
device_t child;
struct siba_devinfo *sdi;
child = device_add_child_ordered(dev, order, name, unit);
if (child == NULL)
return (NULL);
sdi = malloc(sizeof(struct siba_devinfo), M_DEVBUF, M_NOWAIT|M_ZERO);
if (sdi == NULL)
return (NULL);
device_set_ivars(child, sdi);
return (child);
#endif
}
int
siba_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct siba_devinfo *sdi;
sdi = device_get_ivars(child);
switch (which) {
case SIBA_IVAR_VENDOR:
*result = sdi->sdi_vid;
break;
case SIBA_IVAR_DEVICE:
*result = sdi->sdi_devid;
break;
case SIBA_IVAR_REVID:
*result = sdi->sdi_rev;
break;
case SIBA_IVAR_CORE_INDEX:
*result = sdi->sdi_idx;
break;
default:
return (ENOENT);
}
return (0);
}
int
siba_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
{
return (EINVAL);
}
static void
siba_probe_nomatch(device_t dev, device_t child)
{
/*
* Announce devices which weren't attached after we probed the bus.
*/
if (siba_debug) {
struct siba_devid *sd;
sd = siba_dev_match(siba_get_vendor(child),
siba_get_device(child), SIBA_REV_ANY);
if (sd != NULL && sd->sd_desc != NULL) {
device_printf(dev, "<%s> "
"at device %d (no driver attached)\n",
sd->sd_desc, siba_get_core_index(child));
} else {
device_printf(dev, "<0x%04x, 0x%04x> "
"at device %d (no driver attached)\n",
siba_get_vendor(child), siba_get_device(child),
siba_get_core_index(child));
}
}
}
static int
siba_print_all_resources(device_t dev)
{
struct siba_devinfo *sdi = device_get_ivars(dev);
struct resource_list *rl = &sdi->sdi_rl;
int retval = 0;
if (STAILQ_FIRST(rl))
retval += printf(" at");
retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx");
retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd");
return (retval);
}
static struct resource_list *
siba_get_reslist(device_t dev, device_t child)
{
struct siba_devinfo *sdi = device_get_ivars(child);
return (&sdi->sdi_rl);
}
static device_method_t siba_methods[] = {
/* Device interface */
DEVMETHOD(device_attach, siba_attach),
DEVMETHOD(device_detach, bus_generic_detach),
DEVMETHOD(device_probe, siba_probe),
DEVMETHOD(device_resume, bus_generic_resume),
DEVMETHOD(device_shutdown, bus_generic_shutdown),
DEVMETHOD(device_suspend, bus_generic_suspend),
/* Bus interface */
DEVMETHOD(bus_activate_resource,siba_activate_resource),
DEVMETHOD(bus_add_child, siba_add_child),
DEVMETHOD(bus_alloc_resource, siba_alloc_resource),
DEVMETHOD(bus_get_resource_list,siba_get_reslist),
DEVMETHOD(bus_print_child, siba_print_child),
DEVMETHOD(bus_probe_nomatch, siba_probe_nomatch),
DEVMETHOD(bus_read_ivar, siba_read_ivar),
DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
DEVMETHOD(bus_write_ivar, siba_write_ivar),
DEVMETHOD_END
};
static driver_t siba_driver = {
"siba",
siba_methods,
sizeof(struct siba_softc),
};
static devclass_t siba_devclass;
DRIVER_MODULE(siba, nexus, siba_driver, siba_devclass, 0, 0);

430
sys/dev/siba/siba_pcib.c
View File

@ -1,430 +0,0 @@
/*-
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* Child driver for PCI host bridge core.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/rman.h>
#include <sys/malloc.h>
#include <sys/endian.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include <vm/vm_extern.h>
#include <machine/bus.h>
#include <machine/cpu.h>
#include <machine/pcb.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pcib_private.h>
#include "pcib_if.h"
#include <dev/siba/siba_ids.h>
#include <dev/siba/sibareg.h>
#include <dev/siba/sibavar.h>
#include <dev/siba/siba_pcibvar.h>
#ifndef MIPS_MEM_RID
#define MIPS_MEM_RID 0x20
#endif
#define SBPCI_SLOTMAX 15
#define SBPCI_READ_4(sc, reg) \
bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg))
#define SBPCI_WRITE_4(sc, reg, val) \
bus_space_write_4((sc)->sc_bt, (sc)->sc_bh, (reg), (val))
/*
* PCI Configuration space window (64MB).
* contained in SBTOPCI1 window.
*/
#define SBPCI_CFGBASE 0x0C000000
#define SBPCI_CFGSIZE 0x01000000
/*
* TODO: implement type 1 config space access (ie beyond bus 0)
* we may need to tweak the windows to do this
* TODO: interrupt routing.
* TODO: fully implement bus allocation.
* TODO: implement resource managers.
* TODO: code cleanup.
*/
static int siba_pcib_activate_resource(device_t, device_t, int,
int, struct resource *);
static struct resource *
siba_pcib_alloc_resource(device_t, device_t, int, int *,
rman_res_t , rman_res_t, rman_res_t, u_int);
static int siba_pcib_attach(device_t);
static int siba_pcib_deactivate_resource(device_t, device_t, int,
int, struct resource *);
static int siba_pcib_maxslots(device_t);
static int siba_pcib_probe(device_t);
static u_int32_t
siba_pcib_read_config(device_t, u_int, u_int, u_int, u_int,
int);
static int siba_pcib_read_ivar(device_t, device_t, int, uintptr_t *);
static int siba_pcib_release_resource(device_t, device_t, int, int,
struct resource *);
static int siba_pcib_route_interrupt(device_t, device_t, int);
static int siba_pcib_setup_intr(device_t, device_t, struct resource *,
int, driver_filter_t *, driver_intr_t *, void *, void **);
static int siba_pcib_teardown_intr(device_t, device_t, struct resource *,
void *);
static void siba_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
u_int32_t, int);
static int siba_pcib_write_ivar(device_t, device_t, int, uintptr_t);
static int
siba_pcib_probe(device_t dev)
{
/* TODO: support earlier cores. */
/* TODO: Check if PCI host mode is enabled in the SPROM. */
if (siba_get_vendor(dev) == SIBA_VID_BROADCOM &&
siba_get_device(dev) == SIBA_DEVID_PCI) {
device_set_desc(dev, "SiBa-to-PCI host bridge");
return (BUS_PROBE_DEFAULT);
}
return (ENXIO);
}
//extern int rman_debug;
static int
siba_pcib_attach(device_t dev)
{
struct siba_pcib_softc *sc = device_get_softc(dev);
int rid;
/*
* Allocate the resources which the parent bus has already
* determined for us.
*/
rid = MIPS_MEM_RID; /* XXX */
//rman_debug = 1;
sc->sc_mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
RF_ACTIVE);
if (sc->sc_mem == NULL) {
device_printf(dev, "unable to allocate memory\n");
return (ENXIO);
}
sc->sc_bt = rman_get_bustag(sc->sc_mem);
sc->sc_bh = rman_get_bushandle(sc->sc_mem);
device_printf(dev, "bridge registers addr 0x%08x vaddr %p\n",
(uint32_t)sc->sc_bh, rman_get_virtual(sc->sc_mem));
SBPCI_WRITE_4(sc, 0x0000, 0x05);
SBPCI_WRITE_4(sc, 0x0000, 0x0D);
DELAY(150);
SBPCI_WRITE_4(sc, 0x0000, 0x0F);
SBPCI_WRITE_4(sc, 0x0010, 0x01);
DELAY(1);
bus_space_handle_t sc_cfg_hand;
int error;
/*
* XXX this doesn't actually do anything on mips; however... should
* we not be mapping to KSEG1? we need to wire down the range.
*/
error = bus_space_map(sc->sc_bt, SBPCI_CFGBASE, SBPCI_CFGSIZE,
0, &sc_cfg_hand);
if (error) {
device_printf(dev, "cannot map PCI configuration space\n");
return (ENXIO);
}
device_printf(dev, "mapped pci config space at 0x%08x\n",
(uint32_t)sc_cfg_hand);
/*
* Setup configuration, io, and dma space windows.
* XXX we need to be able to do type 1 too.
* we probably don't need to be able to do i/o cycles.
*/
/* I/O read/write window */
SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI0, 1);
/* type 0 configuration only */
SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI1, 2);
SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI2, 1 << 30); /* memory only */
DELAY(500);
/* XXX resource managers */
device_add_child(dev, "pci", -1);
return (bus_generic_attach(dev));
}
/* bus functions */
static int
siba_pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
{
struct siba_pcib_softc *sc;
sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_BUS:
*result = sc->sc_bus;
return (0);
}
return (ENOENT);
}
static int
siba_pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
{
struct siba_pcib_softc *sc;
sc = device_get_softc(dev);
switch (which) {
case PCIB_IVAR_BUS:
sc->sc_bus = value;
return (0);
}
return (ENOENT);
}
static int
siba_pcib_setup_intr(device_t dev, device_t child, struct resource *ires,
int flags, driver_filter_t *filt, driver_intr_t *intr, void *arg,
void **cookiep)
{
return (BUS_SETUP_INTR(device_get_parent(dev), child, ires, flags,
filt, intr, arg, cookiep));
}
static int
siba_pcib_teardown_intr(device_t dev, device_t child, struct resource *vec,
void *cookie)
{
return (BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, cookie));
}
static struct resource *
siba_pcib_alloc_resource(device_t bus, device_t child, int type, int *rid,
rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
{
#if 1
//device_printf(bus, "%s: not yet implemented\n", __func__);
return (NULL);
#else
bus_space_tag_t tag;
struct siba_pcib_softc *sc = device_get_softc(bus);
struct rman *rmanp;
struct resource *rv;
tag = 0;
rv = NULL;
switch (type) {
case SYS_RES_IRQ:
rmanp = &sc->sc_irq_rman;
break;
case SYS_RES_MEMORY:
rmanp = &sc->sc_mem_rman;
tag = &sc->sc_pci_memt;
break;
default:
return (rv);
}
rv = rman_reserve_resource(rmanp, start, end, count, flags, child);
if (rv != NULL) {
rman_set_rid(rv, *rid);
if (type == SYS_RES_MEMORY) {
#if 0
rman_set_bustag(rv, tag);
rman_set_bushandle(rv, rman_get_bushandle(sc->sc_mem) +
(rman_get_start(rv) - IXP425_PCI_MEM_HWBASE));
#endif
}
}
return (rv);
#endif
}
static int
siba_pcib_activate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
device_printf(bus, "%s: not yet implemented\n", __func__);
device_printf(bus, "%s called activate_resource\n",
device_get_nameunit(child));
return (ENXIO);
}
static int
siba_pcib_deactivate_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
device_printf(bus, "%s: not yet implemented\n", __func__);
device_printf(bus, "%s called deactivate_resource\n",
device_get_nameunit(child));
return (ENXIO);
}
static int
siba_pcib_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
device_printf(bus, "%s: not yet implemented\n", __func__);
device_printf(bus, "%s called release_resource\n",
device_get_nameunit(child));
return (ENXIO);
}
/* pcib interface functions */
static int
siba_pcib_maxslots(device_t dev)
{
return (SBPCI_SLOTMAX);
}
/*
* This needs hacking and fixery. It is currently broke and hangs.
* Debugging it will be tricky; there seems to be no way to enable
* a target abort which would cause a nice target abort.
* Look at linux again?
*/
static u_int32_t
siba_pcib_read_config(device_t dev, u_int bus, u_int slot, u_int func,
u_int reg, int bytes)
{
struct siba_pcib_softc *sc = device_get_softc(dev);
bus_addr_t cfgaddr;
uint32_t cfgtag;
uint32_t val;
/* XXX anything higher than slot 2 currently seems to hang the bus.
* not sure why this is; look at linux again
*/
if (bus != 0 || slot > 2) {
printf("%s: bad b/s/f %d/%d/%d\n", __func__, bus, slot, func);
return 0xffffffff; // XXX
}
device_printf(dev, "requested %d bytes from b/s/f %d/%d/%d reg %d\n",
bytes, bus, slot, func, reg);
/*
* The configuration tag on the broadcom is weird.
*/
SBPCI_WRITE_4(sc, SIBA_PCICORE_SBTOPCI1, 2); /* XXX again??? */
cfgtag = ((1 << slot) << 16) | (func << 8);
cfgaddr = SBPCI_CFGBASE | cfgtag | (reg & ~3);
/* cfg space i/o is always 32 bits on this bridge */
printf("reading 4 bytes from %08x\n", cfgaddr);
val = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(cfgaddr); /* XXX MIPS */
val = bswap32(val); /* XXX seems to be needed for now */
/* swizzle and return what was asked for */
val &= 0xffffffff >> ((4 - bytes) * 8);
return (val);
}
static void
siba_pcib_write_config(device_t dev, u_int bus, u_int slot,
u_int func, u_int reg, u_int32_t val, int bytes)
{
/* write to pci configuration space */
//device_printf(dev, "%s: not yet implemented\n", __func__);
}
static int
siba_pcib_route_interrupt(device_t bridge, device_t device, int pin)
{
//device_printf(bridge, "%s: not yet implemented\n", __func__);
return (-1);
}
static device_method_t siba_pcib_methods[] = {
/* Device interface */
DEVMETHOD(device_attach, siba_pcib_attach),
DEVMETHOD(device_probe, siba_pcib_probe),
/* Bus interface */
DEVMETHOD(bus_read_ivar, siba_pcib_read_ivar),
DEVMETHOD(bus_write_ivar, siba_pcib_write_ivar),
DEVMETHOD(bus_setup_intr, siba_pcib_setup_intr),
DEVMETHOD(bus_teardown_intr, siba_pcib_teardown_intr),
DEVMETHOD(bus_alloc_resource, siba_pcib_alloc_resource),
DEVMETHOD(bus_activate_resource, siba_pcib_activate_resource),
DEVMETHOD(bus_deactivate_resource, siba_pcib_deactivate_resource),
DEVMETHOD(bus_release_resource, siba_pcib_release_resource),
/* pcib interface */
DEVMETHOD(pcib_maxslots, siba_pcib_maxslots),
DEVMETHOD(pcib_read_config, siba_pcib_read_config),
DEVMETHOD(pcib_write_config, siba_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, siba_pcib_route_interrupt),
DEVMETHOD_END
};
static driver_t siba_pcib_driver = {
"pcib",
siba_pcib_methods,
sizeof(struct siba_softc),
};
static devclass_t siba_pcib_devclass;
DRIVER_MODULE(siba_pcib, siba, siba_pcib_driver, siba_pcib_devclass, 0, 0);

52
sys/dev/siba/siba_pcibvar.h
View File

@ -1,52 +0,0 @@
/*-
* Copyright (c) 2007 Bruce M. Simpson.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _SIBA_PCIBVAR_H_
#define _SIBA_PCIBVAR_H_
#include <sys/rman.h>
struct siba_pcib_softc {
device_t sc_dev; /* Device ID */
u_int sc_bus; /* PCI bus number */
struct resource *sc_mem; /* siba memory window */
struct resource *sc_csr; /* config space */
bus_space_tag_t sc_bt;
bus_space_handle_t sc_bh;
#if 0
bus_addr_t sc_maddr;
bus_size_t sc_msize;
struct bus_space sc_pci_memt;
struct bus_space sc_pci_iot;
bus_dma_tag_t sc_dmat;
#endif
};
#endif /* _SIBA_PCIBVAR_H_ */

28
sys/mips/broadcom/files.broadcom
View File

@ -17,31 +17,5 @@ mips/broadcom/uart_bus_chipc.c optional uart
mips/broadcom/bcm_socinfo.c standard
mips/broadcom/bcm_mipscore.c standard
#
# TODO: Replace with BCM47xx/57xx/etc-aware geom_map
geom/geom_flashmap.c standard
#
dev/bhnd/bhnd.c standard
dev/bhnd/bhnd_subr.c standard
dev/bhnd/bhnd_bus_if.m standard
dev/bhnd/bhndb/bhndb_if.m standard
dev/bhnd/bhndb/bhndb_bus_if.m standard
dev/bhnd/bcma/bcma.c standard
dev/bhnd/bcma/bcma_nexus.c standard
#dev/bhnd/bcma/bcma_bhndb.c standard
dev/bhnd/bcma/bcma_erom.c standard
dev/bhnd/bcma/bcma_subr.c standard
dev/bhnd/cores/chipc/chipc_subr.c standard
dev/bhnd/cores/chipc/chipc_cfi.c optional cfi
dev/bhnd/cores/chipc/chipc_spi.c optional spibus
dev/bhnd/cores/chipc/chipc_slicer.c optional cfi | spibus
dev/bhnd/cores/chipc/chipc.c standard
#to remove
#dev/bhnd/cores/chipc/chipcbus.c standard
dev/bhnd/cores/chipc/bhnd_chipc_if.m standard
dev/bhnd/nvram/bhnd_nvram_if.m standard
#dev/bhnd/siba/siba.c standard
#dev/bhnd/siba/siba_bhndb.c standard
#dev/bhnd/siba/siba_nexus.c standard
#dev/bhnd/siba/siba_subr.c standard
dev/bhnd/soc/bhnd_soc.c standard
#

9
sys/mips/conf/BCM
View File

@ -5,8 +5,6 @@
# used in COTS hardware including the ASUS RT-N12, RT-N16, RT-N53.
#
#NO_UNIVERSE
ident BCM
hints "BCM.hints"
@ -57,10 +55,15 @@ options INVARIANT_SUPPORT
#options VERBOSE_SYSINIT
#makeoptions VERBOSE_SYSINIT
# bhnd(4)
device bhnd
device bcma # bcma backplane
device bcma_nexus
device pci
device bhnd_pcib # PCIe-G1 core
#device bgmac # Broadcom GMAC - not yet
device bhnd
device mdio

7
sys/mips/conf/BCM.hints
View File

@ -1,6 +1,5 @@
# $FreeBSD$
hint.bhnd_soc.0.at="nexus0"
# XXX ?
hint.bhnd_soc.0.maddr="0x00000000"
hint.bhnd_soc.0.msize="0x20000000"
hint.bhnd.0.at="nexus0"
hint.bhnd.0.maddr="0x18000000"
hint.bhnd.0.msize="0x00100000"

7
sys/mips/conf/SENTRY5
View File

@ -57,8 +57,11 @@ options INVARIANT_SUPPORT
#options BUS_DEBUG
#makeoptions BUS_DEBUG
device siba_s5 # Sonics SiliconBackplane
device pci # siba_pcib
device bhnd
device siba
device siba_nexus
device bhnd_pcib
device pci # bhnd_pcib
# device bfe # XXX will build both pci and siba
# device miibus # attachments

6
sys/mips/conf/SENTRY5.hints
View File

@ -1,5 +1,5 @@
# $FreeBSD$
hint.siba.0.at="nexus0"
hint.siba.0.maddr="0x18000000"
hint.siba.0.msize="0x1000"
hint.bhnd.0.at="nexus0"
hint.bhnd.0.maddr="0x18000000"
hint.bhnd.0.msize="0x1000"
# XXX irq?