- Get rid of label_t. It came from NetBSD and was used only in one place
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257c916acf
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@ -165,8 +165,4 @@ typedef char * __va_list;
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typedef __va_list __gnuc_va_list; /* compatibility w/GNU headers*/
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#endif
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typedef struct label_t {
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__register_t val[13];
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} label_t;
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#endif /* !_MACHINE__TYPES_H_ */
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@ -50,7 +50,7 @@
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struct pcb
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{
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struct trapframe pcb_regs; /* saved CPU and registers */
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label_t pcb_context; /* kernel context for resume */
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__register_t pcb_context[13]; /* kernel context for resume */
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int pcb_onfault; /* for copyin/copyout faults */
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};
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@ -126,17 +126,17 @@ gdb_cpu_getreg(int regnum, size_t *regsz)
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}
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}
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switch (regnum) {
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case 16: return (&kdb_thrctx->pcb_context.val[0]);
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case 17: return (&kdb_thrctx->pcb_context.val[1]);
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case 18: return (&kdb_thrctx->pcb_context.val[2]);
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case 19: return (&kdb_thrctx->pcb_context.val[3]);
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case 20: return (&kdb_thrctx->pcb_context.val[4]);
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case 21: return (&kdb_thrctx->pcb_context.val[5]);
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case 22: return (&kdb_thrctx->pcb_context.val[6]);
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case 23: return (&kdb_thrctx->pcb_context.val[7]);
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case 29: return (&kdb_thrctx->pcb_context.val[8]);
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case 30: return (&kdb_thrctx->pcb_context.val[9]);
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case 31: return (&kdb_thrctx->pcb_context.val[10]);
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case 16: return (&kdb_thrctx->pcb_context[0]);
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case 17: return (&kdb_thrctx->pcb_context[1]);
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case 18: return (&kdb_thrctx->pcb_context[2]);
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case 19: return (&kdb_thrctx->pcb_context[3]);
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case 20: return (&kdb_thrctx->pcb_context[4]);
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case 21: return (&kdb_thrctx->pcb_context[5]);
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case 22: return (&kdb_thrctx->pcb_context[6]);
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case 23: return (&kdb_thrctx->pcb_context[7]);
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case 29: return (&kdb_thrctx->pcb_context[8]);
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case 30: return (&kdb_thrctx->pcb_context[9]);
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case 31: return (&kdb_thrctx->pcb_context[10]);
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}
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return (NULL);
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}
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@ -146,7 +146,7 @@ gdb_cpu_setreg(int regnum, void *val)
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{
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switch (regnum) {
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case GDB_REG_PC:
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kdb_thrctx->pcb_context.val[10] = *(register_t *)val;
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kdb_thrctx->pcb_context[10] = *(register_t *)val;
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if (kdb_thread == PCPU_GET(curthread))
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kdb_frame->pc = *(register_t *)val;
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}
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@ -142,14 +142,14 @@ cpu_fork(register struct thread *td1,register struct proc *p2,
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if (td1 == PCPU_GET(fpcurthread))
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MipsSaveCurFPState(td1);
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pcb2->pcb_context.val[PCB_REG_RA] = (register_t)fork_trampoline;
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pcb2->pcb_context[PCB_REG_RA] = (register_t)fork_trampoline;
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/* Make sp 64-bit aligned */
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pcb2->pcb_context.val[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
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pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td2->td_pcb &
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~(sizeof(__int64_t) - 1)) - STAND_FRAME_SIZE);
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pcb2->pcb_context.val[PCB_REG_S0] = (register_t)fork_return;
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pcb2->pcb_context.val[PCB_REG_S1] = (register_t)td2;
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pcb2->pcb_context.val[PCB_REG_S2] = (register_t)td2->td_frame;
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pcb2->pcb_context.val[PCB_REG_SR] = SR_INT_MASK & mips_rd_status();
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pcb2->pcb_context[PCB_REG_S0] = (register_t)fork_return;
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pcb2->pcb_context[PCB_REG_S1] = (register_t)td2;
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pcb2->pcb_context[PCB_REG_S2] = (register_t)td2->td_frame;
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pcb2->pcb_context[PCB_REG_SR] = SR_INT_MASK & mips_rd_status();
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/*
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* FREEBSD_DEVELOPERS_FIXME:
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* Setup any other CPU-Specific registers (Not MIPS Standard)
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@ -161,7 +161,7 @@ cpu_fork(register struct thread *td1,register struct proc *p2,
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td2->td_md.md_saved_intr = MIPS_SR_INT_IE;
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td2->td_md.md_spinlock_count = 1;
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#ifdef TARGET_OCTEON
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pcb2->pcb_context.val[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
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pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
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#endif
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}
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@ -179,8 +179,8 @@ cpu_set_fork_handler(struct thread *td, void (*func) __P((void *)), void *arg)
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* Note that the trap frame follows the args, so the function
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* is really called like this: func(arg, frame);
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*/
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td->td_pcb->pcb_context.val[PCB_REG_S0] = (register_t) func;
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td->td_pcb->pcb_context.val[PCB_REG_S1] = (register_t) arg;
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td->td_pcb->pcb_context[PCB_REG_S0] = (register_t) func;
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td->td_pcb->pcb_context[PCB_REG_S1] = (register_t) arg;
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}
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void
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@ -293,18 +293,18 @@ cpu_set_upcall(struct thread *td, struct thread *td0)
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* Set registers for trampoline to user mode.
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*/
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pcb2->pcb_context.val[PCB_REG_RA] = (register_t)fork_trampoline;
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pcb2->pcb_context[PCB_REG_RA] = (register_t)fork_trampoline;
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/* Make sp 64-bit aligned */
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pcb2->pcb_context.val[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
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pcb2->pcb_context[PCB_REG_SP] = (register_t)(((vm_offset_t)td->td_pcb &
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~(sizeof(__int64_t) - 1)) - STAND_FRAME_SIZE);
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pcb2->pcb_context.val[PCB_REG_S0] = (register_t)fork_return;
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pcb2->pcb_context.val[PCB_REG_S1] = (register_t)td;
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pcb2->pcb_context.val[PCB_REG_S2] = (register_t)td->td_frame;
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pcb2->pcb_context[PCB_REG_S0] = (register_t)fork_return;
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pcb2->pcb_context[PCB_REG_S1] = (register_t)td;
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pcb2->pcb_context[PCB_REG_S2] = (register_t)td->td_frame;
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/* Dont set IE bit in SR. sched lock release will take care of it */
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pcb2->pcb_context.val[PCB_REG_SR] = SR_INT_MASK & mips_rd_status();
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pcb2->pcb_context[PCB_REG_SR] = SR_INT_MASK & mips_rd_status();
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#ifdef TARGET_OCTEON
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pcb2->pcb_context.val[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT |
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pcb2->pcb_context[PCB_REG_SR] |= MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT |
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MIPS32_SR_PX | MIPS_SR_UX | MIPS_SR_KX | MIPS_SR_SX;
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#endif
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