Adjust i386 Xen PV support for updated Xen interface files.
sys/i386/include/xen/xenvar.h: sys/i386/xen/xen_machdep.c: sys/xen/interface/foreign/structs.py: sys/xen/evtchn/evtchn.c: MAX_VIRT_CPUS => XEN_LEGACY_MAX_VCPUS Submitted by: Roger Pau Monné Reviewed by: gibbs
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@ -93,7 +93,7 @@ extern xen_pfn_t *xen_machine_phys;
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void xpq_init(void);
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#define BITS_PER_LONG 32
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#define NR_CPUS MAX_VIRT_CPUS
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#define NR_CPUS XEN_LEGACY_MAX_VCPUS
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#define BITS_TO_LONGS(bits) \
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(((bits)+BITS_PER_LONG-1)/BITS_PER_LONG)
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@ -203,11 +203,11 @@ struct mmu_log {
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#ifdef SMP
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/* per-cpu queues and indices */
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#ifdef INVARIANTS
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static struct mmu_log xpq_queue_log[MAX_VIRT_CPUS][XPQUEUE_SIZE];
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static struct mmu_log xpq_queue_log[XEN_LEGACY_MAX_VCPUS][XPQUEUE_SIZE];
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#endif
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static int xpq_idx[MAX_VIRT_CPUS];
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static mmu_update_t xpq_queue[MAX_VIRT_CPUS][XPQUEUE_SIZE];
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static int xpq_idx[XEN_LEGACY_MAX_VCPUS];
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static mmu_update_t xpq_queue[XEN_LEGACY_MAX_VCPUS][XPQUEUE_SIZE];
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#define XPQ_QUEUE_LOG xpq_queue_log[vcpu]
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#define XPQ_QUEUE xpq_queue[vcpu]
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@ -146,7 +146,7 @@ static int irq_bindcount[NR_IRQS];
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#ifdef SMP
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static uint8_t cpu_evtchn[NR_EVENT_CHANNELS];
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static unsigned long cpu_evtchn_mask[MAX_VIRT_CPUS][NR_EVENT_CHANNELS/LONG_BIT];
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static unsigned long cpu_evtchn_mask[XEN_LEGACY_MAX_VCPUS][NR_EVENT_CHANNELS/LONG_BIT];
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#define active_evtchns(cpu,sh,idx) \
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((sh)->evtchn_pending[idx] & \
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@ -998,7 +998,7 @@ void irq_resume(void)
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}
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/* Secondary CPUs must have no VIRQ or IPI bindings. */
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for (cpu = 1; cpu < MAX_VIRT_CPUS; cpu++) {
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for (cpu = 1; cpu < XEN_LEGACY_MAX_VCPUS; cpu++) {
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for (virq = 0; virq < NR_VIRQS; virq++) {
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KASSERT(pcpu_find(cpu)->pc_virq_to_irq[virq] == -1,
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("virq_to_irq inconsistent"));
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@ -53,6 +53,6 @@
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# all archs
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"xen_pfn_to_cr3",
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"MAX_VIRT_CPUS",
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"XEN_LEGACY_MAX_VCPUS",
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"MAX_GUEST_CMDLINE" ];
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