Fix a couple of comments about the rm9200, and fix a couple of indentation
issues. Add note that we need to implement at91sam9260 erratum workaround.
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@ -569,8 +569,6 @@ ate_activate(device_t dev)
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/*
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* DMA tag and map for the TX descriptors.
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* XXX Old EMAC (not EMACB) doesn't really need DMA'able
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* memory. We could just malloc it. gja XXX
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*/
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if (bus_dma_tag_create(bus_get_dma_tag(dev), sizeof(eth_tx_desc_t),
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0, BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
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@ -606,11 +604,10 @@ ate_activate(device_t dev)
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if (sc->is_emacb) {
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/* Write the descriptor queue address. */
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WR4(sc, ETHB_TBQP, sc->tx_desc_phys);
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}
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/* EMACB: Enable transceiver input clock */
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if (sc->is_emacb)
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/* EMACB: Enable transceiver input clock */
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WR4(sc, ETHB_UIO, RD4(sc, ETHB_UIO) | ETHB_UIO_CLKE);
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}
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return (0);
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@ -676,7 +673,7 @@ ate_deactivate(struct ate_softc *sc)
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}
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if (sc->is_emacb)
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WR4(sc, ETHB_UIO, RD4(sc, ETHB_UIO) & ~ETHB_UIO_CLKE);
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WR4(sc, ETHB_UIO, RD4(sc, ETHB_UIO) & ~ETHB_UIO_CLKE);
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}
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/*
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@ -849,12 +846,11 @@ ate_intr(void *xsc)
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return;
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if (status & ETH_ISR_RCOM) {
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bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map,
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bus_dmamap_sync(sc->rx_desc_tag, sc->rx_desc_map,
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BUS_DMASYNC_POSTREAD);
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rxdhead = &sc->rx_descs[sc->rxhead];
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while (rxdhead->addr & ETH_CPU_OWNER) {
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rxdhead = &sc->rx_descs[sc->rxhead];
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while (rxdhead->addr & ETH_CPU_OWNER) {
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if (!sc->is_emacb) {
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/*
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* Simulate SAM9 FIRST/LAST bits for RM9200.
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@ -933,7 +929,8 @@ ate_intr(void *xsc)
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/* XXX Performance robbing copy. Could
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* recieve directly to mbufs if not an
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* RM9200. XXX */
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* RM9200. And even then we could likely
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* copy just the protocol headers. XXX */
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m_append(mb, count, sc->rx_buf[sc->rxhead]);
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remain -= count;
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}
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@ -1014,6 +1011,9 @@ ate_intr(void *xsc)
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BARRIER(sc, ETH_CTL, 4, BUS_SPACE_BARRIER_WRITE);
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WR4(sc, ETH_CTL, reg | ETH_CTL_RE);
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}
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/* XXX need to work around SAM9260 errata 43.2.4.1:
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* disable the mac, reset tx buffer, enable mac on TUND */
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}
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/*
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@ -1269,7 +1269,7 @@ atestop(struct ate_softc *sc)
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/* Turn off transeiver input clock */
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if (sc->is_emacb)
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WR4(sc, ETHB_UIO, RD4(sc, ETHB_UIO) & ~ETHB_UIO_CLKE);
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WR4(sc, ETHB_UIO, RD4(sc, ETHB_UIO) & ~ETHB_UIO_CLKE);
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/*
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* XXX we should power down the EMAC if it isn't in use, after
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