cxgbe(4): provide the correct size of freelists associated with netmap
rx queues to the chip. This will fix many problems with native netmap rx on ncxl/ncxgbe interfaces. MFC after: 1 week
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@ -279,7 +279,7 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong)
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c.fl0dcaen_to_fl0cidxfthresh =
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htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
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V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
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c.fl0size = htobe16(na->num_rx_desc + spg_len / EQ_ESIZE);
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c.fl0size = htobe16(na->num_rx_desc / 8 + spg_len / EQ_ESIZE);
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c.fl0addr = htobe64(nm_rxq->fl_ba);
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rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
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