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- Move prototypes for various functions into out of C files and into

Browse Source 
<machine/md_var.h>.
- Move some CPU-related variables out of i386/i386/identcpu.c to
  initcpu.c to match amd64.
- Move the declaration of has_f00f_hack out of identcpu.c to machdep.c.
- Remove a misleading comment from i386/i386/initcpu.c (locore zeros
  the BSS before it calls identify_cpu()) and remove explicit zero
  assignments to reduce the diff with amd64.
This commit is contained in:
John Baldwin 2014-09-04 01:46:06 +00:00
parent 2570cdd605
commit 7fb40488d6
9 changed files with 37 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

7
sys/amd64/amd64/identcpu.c
View File

@ -64,15 +64,8 @@ __FBSDID("$FreeBSD$");
#include <amd64/vmm/intel/vmx_controls.h>
#include <x86/isa/icu.h>
/* XXX - should be in header file: */
void printcpuinfo(void);
void identify_cpu(void);
void earlysetcpuclass(void);
void panicifcpuunsupported(void);
static u_int find_cpu_vendor_id(void);
static void print_AMD_info(void);
static void print_AMD_assoc(int i);
static void print_via_padlock_info(void);
static void print_vmx_info(void);

4
sys/amd64/amd64/machdep.c
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@ -151,10 +151,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
extern u_int64_t hammer_time(u_int64_t, u_int64_t);
extern void printcpuinfo(void); /* XXX header file */
extern void identify_cpu(void);
extern void panicifcpuunsupported(void);
#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)

3
sys/amd64/include/md_var.h
View File

@ -105,14 +105,17 @@ void fsbase_load_fault(void) __asm(__STRING(fsbase_load_fault));
void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
void dump_add_page(vm_paddr_t);
void dump_drop_page(vm_paddr_t);
void identify_cpu(void);
void initializecpu(void);
void initializecpucache(void);
void fillw(int /*u_short*/ pat, void *base, size_t cnt);
void fpstate_drop(struct thread *td);
int is_physical_memory(vm_paddr_t addr);
int isa_nmi(int cd);
void panicifcpuunsupported(void);
void pagecopy(void *from, void *to);
void pagezero(void *addr);
void printcpuinfo(void);
void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist);
int user_dbreg_trap(void);
void minidumpsys(struct dumperinfo *);

18
sys/i386/i386/identcpu.c
View File

@ -64,30 +64,16 @@ __FBSDID("$FreeBSD$");
#define IDENTBLUE_IBMCPU 1
#define IDENTBLUE_CYRIXM2 2
/* XXX - should be in header file: */
void printcpuinfo(void);
void finishidentcpu(void);
void earlysetcpuclass(void);
#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
void enable_K5_wt_alloc(void);
void enable_K6_wt_alloc(void);
void enable_K6_2_wt_alloc(void);
#endif
void panicifcpuunsupported(void);
static void identifycyrix(void);
static void init_exthigh(void);
static u_int find_cpu_vendor_id(void);
static void print_AMD_info(void);
static void print_INTEL_info(void);
static void print_INTEL_TLB(u_int data);
static void print_AMD_assoc(int i);
static void print_transmeta_info(void);
static void print_via_padlock_info(void);
int cpu_class;
u_int cpu_exthigh; /* Highest arg to extended CPUID */
u_int cyrix_did; /* Device ID of Cyrix CPU */
char machine[] = MACHINE;
SYSCTL_STRING(_hw, HW_MACHINE, machine, CTLFLAG_RD,
machine, 0, "Machine class");
@ -161,10 +147,6 @@ static struct {
#endif
};
#if defined(I586_CPU) && !defined(NO_F00F_HACK)
int has_f00f_bug = 0; /* Initialized so that it can be patched. */
#endif
static void
init_exthigh(void)
{

46
sys/i386/i386/initcpu.c
View File

@ -48,12 +48,6 @@ __FBSDID("$FreeBSD$");
#define CPU_ENABLE_SSE
#endif
#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
void enable_K5_wt_alloc(void);
void enable_K6_wt_alloc(void);
void enable_K6_2_wt_alloc(void);
#endif
#ifdef I486_CPU
static void init_5x86(void);
static void init_bluelightning(void);
@ -81,36 +75,36 @@ SYSCTL_INT(_hw, OID_AUTO, instruction_sse, CTLFLAG_RD,
*/
static int hw_clflush_disable = -1;
/* Must *NOT* be BSS or locore will bzero these after setting them */
int cpu = 0; /* Are we 386, 386sx, 486, etc? */
u_int cpu_feature = 0; /* Feature flags */
u_int cpu_feature2 = 0; /* Feature flags */
u_int amd_feature = 0; /* AMD feature flags */
u_int amd_feature2 = 0; /* AMD feature flags */
u_int amd_pminfo = 0; /* AMD advanced power management info */
u_int via_feature_rng = 0; /* VIA RNG features */
u_int via_feature_xcrypt = 0; /* VIA ACE features */
u_int cpu_high = 0; /* Highest arg to CPUID */
u_int cpu_id = 0; /* Stepping ID */
u_int cpu_procinfo = 0; /* HyperThreading Info / Brand Index / CLFUSH */
u_int cpu_procinfo2 = 0; /* Multicore info */
char cpu_vendor[20] = ""; /* CPU Origin code */
u_int cpu_vendor_id = 0; /* CPU vendor ID */
int cpu; /* Are we 386, 386sx, 486, etc? */
u_int cpu_feature; /* Feature flags */
u_int cpu_feature2; /* Feature flags */
u_int amd_feature; /* AMD feature flags */
u_int amd_feature2; /* AMD feature flags */
u_int amd_pminfo; /* AMD advanced power management info */
u_int via_feature_rng; /* VIA RNG features */
u_int via_feature_xcrypt; /* VIA ACE features */
u_int cpu_high; /* Highest arg to CPUID */
u_int cpu_exthigh; /* Highest arg to extended CPUID */
u_int cpu_id; /* Stepping ID */
u_int cpu_procinfo; /* HyperThreading Info / Brand Index / CLFUSH */
u_int cpu_procinfo2; /* Multicore info */
char cpu_vendor[20]; /* CPU Origin code */
u_int cpu_vendor_id; /* CPU vendor ID */
#ifdef CPU_ENABLE_SSE
u_int cpu_fxsr; /* SSE enabled */
u_int cpu_mxcsr_mask; /* Valid bits in mxcsr */
#endif
u_int cpu_clflush_line_size = 32;
u_int cpu_mon_mwait_flags; /* MONITOR/MWAIT flags (CPUID.05H.ECX) */
u_int cpu_mon_min_size; /* MONITOR minimum range size, bytes */
u_int cpu_mon_max_size; /* MONITOR minimum range size, bytes */
u_int cyrix_did; /* Device ID of Cyrix CPU */
SYSCTL_UINT(_hw, OID_AUTO, via_feature_rng, CTLFLAG_RD,
&via_feature_rng, 0, "VIA RNG feature available in CPU");
SYSCTL_UINT(_hw, OID_AUTO, via_feature_xcrypt, CTLFLAG_RD,
&via_feature_xcrypt, 0, "VIA xcrypt feature available in CPU");
#ifdef CPU_ENABLE_SSE
u_int cpu_fxsr; /* SSE enabled */
u_int cpu_mxcsr_mask; /* valid bits in mxcsr */
#endif
#ifdef I486_CPU
/*
* IBM Blue Lightning

8
sys/i386/i386/machdep.c
View File

@ -180,10 +180,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
extern void init386(int first);
extern void dblfault_handler(void);
extern void printcpuinfo(void); /* XXX header file */
extern void finishidentcpu(void);
extern void panicifcpuunsupported(void);
#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
@ -1665,10 +1661,6 @@ struct gate_descriptor *idt = &idt0[0]; /* interrupt descriptor table */
struct region_descriptor r_gdt, r_idt; /* table descriptors */
struct mtx dt_lock; /* lock for GDT and LDT */
#if defined(I586_CPU) && !defined(NO_F00F_HACK)
extern int has_f00f_bug;
#endif
static struct i386tss dblfault_tss;
static char dblfault_stack[PAGE_SIZE];

2
sys/i386/i386/trap.c
View File

@ -153,7 +153,7 @@ static char *trap_msg[] = {
};
#if defined(I586_CPU) && !defined(NO_F00F_HACK)
extern int has_f00f_bug;
int has_f00f_bug = 0; /* Initialized so that it can be patched. */
#endif
#ifdef KDB

15
sys/i386/include/md_var.h
View File

@ -56,10 +56,13 @@ extern u_int cpu_procinfo;
extern u_int cpu_procinfo2;
extern char cpu_vendor[];
extern u_int cpu_vendor_id;
extern u_int cyrix_did;
extern u_int cpu_mon_mwait_flags;
extern u_int cpu_mon_min_size;
extern u_int cpu_mon_max_size;
extern u_int cyrix_did;
#if defined(I586_CPU) && !defined(NO_F00F_HACK)
extern int has_f00f_bug;
#endif
extern char kstack[];
extern char sigcode[];
extern int szsigcode;
@ -94,15 +97,23 @@ void doreti_popl_fs(void) __asm(__STRING(doreti_popl_fs));
void doreti_popl_fs_fault(void) __asm(__STRING(doreti_popl_fs_fault));
void dump_add_page(vm_paddr_t);
void dump_drop_page(vm_paddr_t);
void initializecpu(void);
void finishidentcpu(void);
#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
void enable_K5_wt_alloc(void);
void enable_K6_wt_alloc(void);
void enable_K6_2_wt_alloc(void);
#endif
void enable_sse(void);
void fillw(int /*u_short*/ pat, void *base, size_t cnt);
void initializecpu(void);
void i686_pagezero(void *addr);
void sse2_pagezero(void *addr);
void init_AMD_Elan_sc520(void);
int is_physical_memory(vm_paddr_t addr);
int isa_nmi(int cd);
vm_paddr_t kvtop(void *addr);
void panicifcpuunsupported(void);
void printcpuinfo(void);
void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int selec);
int user_dbreg_trap(void);
void minidumpsys(struct dumperinfo *);

4
sys/pc98/pc98/machdep.c
View File

@ -149,10 +149,6 @@ CTASSERT(offsetof(struct pcpu, pc_curthread) == 0);
extern void init386(int first);
extern void dblfault_handler(void);
extern void printcpuinfo(void); /* XXX header file */
extern void finishidentcpu(void);
extern void panicifcpuunsupported(void);
#define CS_SECURE(cs) (ISPL(cs) == SEL_UPL)
#define EFL_SECURE(ef, oef) ((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)