From 800d1c86ba3ff63435cf8733cd7bfbdfb35a9d52 Mon Sep 17 00:00:00 2001 From: avg Date: Sat, 8 Apr 2017 14:16:42 +0000 Subject: [PATCH] use msr 0xc001100c to discover multi-node AMD processors This is applicable only to the older processors that do not have the AMD Topology extension. Opteron 6100-series "Magny-Cours" processors had multiple nodes within a package and didn't have the Topology extension. Without this change FreeBSD would assume that those processors have a single L3 cache shared by all cores while, in fact, each node has its own L3 cache. Many thanks to Freddie Cash for providing valuable hardware information. MFC after: 2 weeks --- sys/x86/x86/mp_x86.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/sys/x86/x86/mp_x86.c b/sys/x86/x86/mp_x86.c index 2c3298d40b30..63146dc0173b 100644 --- a/sys/x86/x86/mp_x86.c +++ b/sys/x86/x86/mp_x86.c @@ -236,7 +236,9 @@ static void topo_probe_amd(void) { u_int p[4]; + uint64_t v; int level; + int nodes_per_socket; int share_count; int type; int i; @@ -295,13 +297,18 @@ topo_probe_amd(void) caches[1].present = 1; } if (((p[3] >> 18) & 0x3fff) != 0) { - - /* - * TODO: Account for dual-node processors - * where each node within a package has its own - * L3 cache. - */ - caches[2].id_shift = pkg_id_shift; + nodes_per_socket = 1; + if ((amd_feature2 & AMDID2_NODE_ID) != 0) { + /* + * Handle multi-node processors that + * have multiple chips, each with its + * own L3 cache, on the same die. + */ + v = rdmsr(0xc001100c); + nodes_per_socket = 1 + ((v >> 3) & 0x7); + } + caches[2].id_shift = + pkg_id_shift - mask_width(nodes_per_socket); caches[2].present = 1; } }