Add arm_sync_icache() and arm_drain_writebuf() sysarch syscall wrappers.
NetBSD and OpenBSD have libc wrapper functions for the ARM_SYNC_ICACHE and ARM_DRAIN_WRITEBUF sysarch operations. This change adds compatible functions to our library. This should make it easier for various upstream sources to support *BSD operating systems with a single variation of cache maintence code in tools like interpreters and JIT compilers. I consider the argument types passed to arm_sync_icache() to be especially unfortunate, but this is intended to match the other BSDs. Differential Revision: https://reviews.freebsd.org/D20906
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@ -41,6 +41,11 @@ FBSD_1.4 {
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dl_unwind_find_exidx;
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};
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FBSD_1.6 {
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arm_drain_writebuf;
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arm_sync_icache;
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};
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FBSDprivate_1.0 {
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/* PSEUDO syscalls */
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_getlogin;
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@ -8,6 +8,8 @@ SRCS+= \
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_setjmp.S \
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alloca.S \
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arm_initfini.c \
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arm_drain_writebuf.c \
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arm_sync_icache.c \
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fabs.c \
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flt_rounds.c \
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getcontextx.c \
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@ -18,6 +20,10 @@ SRCS+= \
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signalcontext.c \
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sigsetjmp.S \
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MAN+= \
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arm_drain_writebuf.2 \
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arm_sync_icache.2 \
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.if ${MACHINE_ARCH:Marmv[67]*} && (!defined(CPUTYPE) || ${CPUTYPE:M*soft*} == "")
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SRCS+= \
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77
lib/libc/arm/gen/arm_drain_writebuf.2
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77
lib/libc/arm/gen/arm_drain_writebuf.2
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@ -0,0 +1,77 @@
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.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 10, 2019
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.Dt ARM_DRAIN_WRITEBUF 2
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.Os
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.Sh NAME
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.Nm arm_drain_writebuf
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.Nd drain pending writes from cores and caches
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.Sh LIBRARY
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.Lb libc
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.Sh SYNOPSIS
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.In machine/sysarch.h
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.Ft int
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.Fn arm_drain_writebuf void
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.Sh DESCRIPTION
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The
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.Nm
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system call causes all pending writes from ARM cores and caches to be
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written out to main memory or memory-mapped I/O registers.
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Not all hardware supports buffered writes; on such systems the
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.Nm
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function is a no-op.
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.Pp
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On ARMv5 systems, this executes a cp15 coprocessor
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.Dq drain write buffer
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operation.
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On ARMv6 and ARMv7 systems, this executes a
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.Dq DSB SY
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synchronization barrier, followed by an L2 cache drain on
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systems where the DSB does not include L2 automatically.
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.Pp
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.Nm
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attempts to wait for the drain operation to complete, but cannot
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guarantee the writes have reached their ultimate destination on all hardware.
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For example, on an ARMv7 system,
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.Nm
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tells the L2 cache controller to drain its buffers, and it waits until
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the controller indicates that operation is complete.
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However, all the L2 controller knows is that the data was accepted for
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delivery by the AXI bus.
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If the ultimate destination of the write is a device on a subordinate
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bus connected to the AXI bus, more buffering or other delays may occur
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on that subordinate bus.
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The only way to be certain a pending write has reached its
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ultimate destination is to issue a read from that destination after
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.Nm
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returns.
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.Sh RETURN VALUES
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The
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.Nm
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system call cannot fail, and always returns 0.
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.Sh AUTHORS
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This man page was written by
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.An Ian Lepore .
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39
lib/libc/arm/gen/arm_drain_writebuf.c
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39
lib/libc/arm/gen/arm_drain_writebuf.c
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@ -0,0 +1,39 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <machine/sysarch.h>
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#include <stddef.h>
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int
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arm_drain_writebuf(void)
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{
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sysarch(ARM_DRAIN_WRITEBUF, NULL);
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return (0);
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}
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79
lib/libc/arm/gen/arm_sync_icache.2
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79
lib/libc/arm/gen/arm_sync_icache.2
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@ -0,0 +1,79 @@
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.\" Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd July 10, 2019
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.Dt ARM_sync_icache 2
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.Os
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.Sh NAME
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.Nm arm_sync_icache
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.Nd synchronize the data and instruction caches
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.Sh LIBRARY
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.Lb libc
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.Sh SYNOPSIS
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.In machine/sysarch.h
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.Ft int
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.Fn arm_sync_icache "u_int addr" "int len"
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.Sh DESCRIPTION
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The
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.Nm
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system call synchronizes the contents of any data and instructions caches
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with the contents of main memory for the given range.
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Use this after loading executable code or modifying existing code in memory,
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before attempting to execute that code.
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.Pp
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The
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.Va addr
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and
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.Va len
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arguments do not need to be aligned to any particular boundary, but
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cache operations will affect entire cache lines, even those which are only
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partially overlapped by the given range.
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.Pp
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This takes one or more of the following actions, depending on the requirements
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of the hardware:
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.Bl -bullet
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.It
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Write dirty data cache lines within the range back to main memory.
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.It
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Invalidate existing instruction cache contents for the range.
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.It
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Invalidate branch prediction caches for the range.
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.El
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.Pp
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On hardware which supports multiple synchronization points for cache
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operations, the caches are maintained to the point of unification,
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making the data in the range coherent amongst all cores.
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.Sh RETURN VALUES
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The
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.Nm
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system call always returns 0.
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.Sh ERRORS
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If a call refers to memory which the calling process does not have rights
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to access, or if the
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.Va len
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argument is negative, a SIGSEGV signal is delivered to the calling thread.
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.Sh AUTHORS
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This man page was written by
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.An Ian Lepore .
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44
lib/libc/arm/gen/arm_sync_icache.c
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44
lib/libc/arm/gen/arm_sync_icache.c
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@ -0,0 +1,44 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Ian Lepore <ian@FreeBSD.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/types.h>
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#include <machine/sysarch.h>
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#include <stddef.h>
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int
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arm_sync_icache(u_int addr, int len)
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{
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struct arm_sync_icache_args args;
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args.addr = addr;
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args.len = len;
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sysarch(ARM_SYNC_ICACHE, &args);
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return (0);
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}
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* in the range 5 to 9.
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*/
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#undef __FreeBSD_version
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#define __FreeBSD_version 1300035 /* Master, propagated to newvers */
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#define __FreeBSD_version 1300036 /* Master, propagated to newvers */
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/*
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* __FreeBSD_kernel__ indicates that this system uses the kernel of FreeBSD,
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