Add in the SGMII configuration code. The DB120 doesn't use it, so I
have no way to evaluate it. Obtained from: OpenWRT
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parent
c25a0a83ca
commit
810bdedd75
@ -406,6 +406,34 @@ ar8327_fetch_pdata_pad(struct arswitch_softc *sc,
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return (1);
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}
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/*
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* Fetch the SGMII configuration block from the boot hints.
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*/
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static int
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ar8327_fetch_pdata_sgmii(struct arswitch_softc *sc,
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struct ar8327_sgmii_cfg *scfg)
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{
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int val;
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/* sgmii_ctrl */
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val = 0;
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if (resource_int_value(device_get_name(sc->sc_dev),
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device_get_unit(sc->sc_dev),
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"sgmii.ctrl", &val) != 0)
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return (0);
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scfg->sgmii_ctrl = val;
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/* serdes_aen */
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val = 0;
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if (resource_int_value(device_get_name(sc->sc_dev),
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device_get_unit(sc->sc_dev),
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"sgmii.serdes_aen", &val) != 0)
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return (0);
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scfg->serdes_aen = val;
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return (1);
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}
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/*
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* Initialise the ar8327 specific hardware features from
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* the hints provided in the boot environment.
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@ -415,7 +443,8 @@ ar8327_init_pdata(struct arswitch_softc *sc)
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{
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struct ar8327_pad_cfg pc;
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struct ar8327_port_cfg port_cfg;
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uint32_t t;
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struct ar8327_sgmii_cfg scfg;
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uint32_t t, new_pos, pos;
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/* Port 0 */
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bzero(&port_cfg, sizeof(port_cfg));
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@ -454,9 +483,33 @@ ar8327_init_pdata(struct arswitch_softc *sc)
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t = ar8327_get_pad_cfg(&pc);
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arswitch_writereg(sc->sc_dev, AR8327_REG_PAD6_MODE, t);
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pos = arswitch_readreg(sc->sc_dev, AR8327_REG_POWER_ON_STRIP);
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new_pos = pos;
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/* XXX LED config */
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/* XXX SGMII config */
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/* SGMII config */
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bzero(&scfg, sizeof(scfg));
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if (ar8327_fetch_pdata_sgmii(sc, &scfg)) {
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t = scfg.sgmii_ctrl;
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if (sc->chip_rev == 1)
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t |= AR8327_SGMII_CTRL_EN_PLL |
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AR8327_SGMII_CTRL_EN_RX |
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AR8327_SGMII_CTRL_EN_TX;
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else
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t &= ~(AR8327_SGMII_CTRL_EN_PLL |
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AR8327_SGMII_CTRL_EN_RX |
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AR8327_SGMII_CTRL_EN_TX);
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arswitch_writereg(sc->sc_dev, AR8327_REG_SGMII_CTRL, t);
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if (scfg.serdes_aen)
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new_pos &= ~AR8327_POWER_ON_STRIP_SERDES_AEN;
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else
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new_pos |= AR8327_POWER_ON_STRIP_SERDES_AEN;
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}
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arswitch_writereg(sc->sc_dev, AR8327_REG_POWER_ON_STRIP, new_pos);
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return (0);
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}
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