- Optimize the amd64 cpu_switch() TD_LOCK blocking and releasing to
require fewer blocking loops. - Don't use atomic ops with 4BSD or on UP. - Only use the blocking loop if ULE is compiled in. - Use the correct memory barrier. Discussed with: attilio, jhb, ssouhlal Tested by: current@ Approved by: re
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@ -37,6 +37,7 @@
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#include <machine/specialreg.h>
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#include "assym.s"
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#include "opt_sched.h"
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/*****************************************************************************/
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/* Scheduling */
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@ -50,6 +51,12 @@
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#define LK
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#endif
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#if defined(SCHED_ULE) && defined(SMP)
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#define SETLK xchgq
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#else
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#define SETLK movq
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#endif
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/*
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* cpu_throw()
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*
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@ -148,13 +155,7 @@ ENTRY(cpu_switch)
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movq %cr3,%rax
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cmpq %rcx,%rax /* Same address space? */
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jne swinact
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movq %rdx, TD_LOCK(%rdi) /* Release the old thread */
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/* Wait for the new thread to become unblocked */
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movq $blocked_lock, %rdx
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1:
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movq TD_LOCK(%rsi),%rcx
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cmpq %rcx, %rdx
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je 1b
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SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
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jmp sw1
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swinact:
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movq %rcx,%cr3 /* new address space */
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@ -163,21 +164,24 @@ swinact:
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movq TD_PROC(%rdi), %rcx /* oldproc */
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movq P_VMSPACE(%rcx), %rcx
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LK btrl %eax, VM_PMAP+PM_ACTIVE(%rcx) /* clear old */
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movq %rdx, TD_LOCK(%rdi) /* Release the old thread */
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SETLK %rdx, TD_LOCK(%rdi) /* Release the old thread */
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swact:
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/* Wait for the new thread to become unblocked */
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movq $blocked_lock, %rdx
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1:
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movq TD_LOCK(%rsi),%rcx
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cmpq %rcx, %rdx
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je 1b
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/* Set bit in new pmap->pm_active */
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movq TD_PROC(%rsi),%rdx /* newproc */
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movq P_VMSPACE(%rdx), %rdx
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LK btsl %eax, VM_PMAP+PM_ACTIVE(%rdx) /* set new */
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sw1:
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#if defined(SCHED_ULE) && defined(SMP)
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/* Wait for the new thread to become unblocked */
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movq $blocked_lock, %rdx
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1:
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movq TD_LOCK(%rsi),%rcx
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cmpq %rcx, %rdx
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pause
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je 1b
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lfence
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#endif
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/*
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* At this point, we've switched address spaces and are ready
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* to load up the rest of the next context.
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