- Include <machine/prom.h> to get the prototype for prom_halt().
- If there is no gdb device, just return without trying to return any value since gdb_handle_exception() returns void. - When calling prom_halt(), pass in a value telling it to actually halt and not to randomly choose whether or not to halt or reboot depending on whatever value happened to be in a0 when the call was made.
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82da2f64b3
@ -99,6 +99,7 @@
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#include <sys/signal.h>
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#include <sys/cons.h>
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#include <machine/prom.h>
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#include <machine/reg.h>
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#include <ddb/ddb.h>
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@ -625,7 +626,7 @@ gdb_handle_exception (db_regs_t *raw_regs, int type, int code)
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while (1)
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{
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if (gdbdev == NODEV) /* somebody's removed it */
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return 1; /* get out of here */
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return; /* get out of here */
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remcomOutBuffer[0] = 0;
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getpacket (remcomInBuffer);
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@ -644,7 +645,7 @@ gdb_handle_exception (db_regs_t *raw_regs, int type, int code)
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return;
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case 'k':
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prom_halt();
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prom_halt(1);
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/*NOTREACHED*/
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break;
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@ -210,7 +210,6 @@ configure(void *dummy)
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void
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cpu_rootconf()
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{
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int order = 0;
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#if defined(NFS) && defined(NFS_ROOT)
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#if !defined(BOOTP_NFSROOT)
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if (nfs_diskless_valid)
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@ -267,10 +267,9 @@ static int
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getit(void)
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{
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int high, low;
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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/* Select timer0 and latch counter value. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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@ -278,7 +277,7 @@ getit(void)
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low = inb(TIMER_CNTR0);
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high = inb(TIMER_CNTR0);
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restore_intr(s);
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critical_exit(s);
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return ((high << 8) | low);
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}
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@ -369,10 +368,9 @@ static void
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set_timer_freq(u_int freq, int intr_freq)
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{
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int new_timer0_max_count;
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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timer_freq = freq;
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new_timer0_max_count = TIMER_DIV(intr_freq);
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if (new_timer0_max_count != timer0_max_count) {
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@ -381,15 +379,16 @@ set_timer_freq(u_int freq, int intr_freq)
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outb(TIMER_CNTR0, timer0_max_count & 0xff);
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outb(TIMER_CNTR0, timer0_max_count >> 8);
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}
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restore_intr(s);
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critical_exit(s);
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}
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static void
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handleclock(void* arg)
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{
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if (timecounter->tc_get_timecount == i8254_get_timecount) {
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int s = save_intr();
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disable_intr();
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critical_t s;
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s = critical_enter();
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if (i8254_ticked)
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i8254_ticked = 0;
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else {
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@ -397,7 +396,7 @@ handleclock(void* arg)
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i8254_lastcount = 0;
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}
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clkintr_pending = 0;
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restore_intr(s);
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critical_exit(s);
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}
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hardclock(arg);
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@ -567,10 +566,9 @@ i8254_get_timecount(struct timecounter *tc)
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{
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u_int count;
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u_int high, low;
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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/* Select timer0 and latch counter value. */
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outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
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@ -588,7 +586,7 @@ i8254_get_timecount(struct timecounter *tc)
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i8254_lastcount = count;
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count += i8254_offset;
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restore_intr(s);
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critical_exit(s);
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return (count);
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}
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@ -640,13 +638,14 @@ sysbeepstop(void *chan)
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int
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sysbeep(int pitch, int period)
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{
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int s = save_intr();
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disable_intr();
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critical_t s;
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s = critical_enter();
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if (acquire_timer2(TIMER_SQWAVE|TIMER_16BIT))
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if (!beeping) {
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/* Something else owns it. */
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restore_intr(s);
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critical_exit(s);
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return (-1); /* XXX Should be EBUSY, but nobody cares anyway. */
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}
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@ -660,7 +659,7 @@ sysbeep(int pitch, int period)
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beeping = period;
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timeout(sysbeepstop, (void *)NULL, period);
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}
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restore_intr(s);
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critical_exit(s);
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return (0);
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}
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@ -154,7 +154,7 @@ kdb_trap(a0, a1, a2, entry, regs)
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db_regs_t *regs;
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{
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int ddb_mode = !(boothowto & RB_GDB);
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int s;
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critical_t s;
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/*
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* Don't bother checking for usermode, since a benign entry
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@ -191,8 +191,7 @@ kdb_trap(a0, a1, a2, entry, regs)
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ddb_regs = *regs;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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#if 0
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db_printf("stopping %x\n", PCPU_GET(other_cpus));
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@ -215,7 +214,7 @@ kdb_trap(a0, a1, a2, entry, regs)
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restart_cpus(stopped_cpus);
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#endif
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restore_intr(s);
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critical_exit(s);
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*regs = ddb_regs;
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@ -269,8 +268,12 @@ db_write_bytes(addr, size, data)
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void
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Debugger(const char* msg)
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{
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u_int saveintr;
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printf("%s\n", msg);
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saveintr = alpha_pal_swpipl(ALPHA_PSL_IPL_HIGH);
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__asm("call_pal 0x81"); /* XXX bugchk */
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alpha_pal_swpipl(saveintr);
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}
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/*
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@ -76,7 +76,7 @@ ASSYM(GD_IDLEPCBPHYS, offsetof(struct globaldata, gd_idlepcbphys));
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ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock));
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ASSYM(MTX_RECURSE, offsetof(struct mtx, mtx_recurse));
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ASSYM(MTX_SAVEINTR, offsetof(struct mtx, mtx_saveintr));
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ASSYM(MTX_SAVECRIT, offsetof(struct mtx, mtx_savecrit));
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ASSYM(MTX_UNOWNED, MTX_UNOWNED);
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ASSYM(P_ADDR, offsetof(struct proc, p_addr));
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@ -116,7 +116,7 @@ interrupt(a0, a1, a2, framep)
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#endif
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case ALPHA_INTR_CLOCK: /* clock interrupt */
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CTR0(KTR_INTR, "clock interrupt");
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/* CTR0(KTR_INTR, "clock interrupt"); */
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if (PCPU_GET(cpuid) != hwrpb->rpb_primary_cpu_id) {
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CTR0(KTR_INTR, "ignoring clock on secondary");
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atomic_subtract_int(&p->p_intr_nesting_level, 1);
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* For SMP, we should check the fpcurproc of each cpu.
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*/
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#ifndef SMP
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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if (p->p_addr->u_pcb.pcb_hw.apcb_flags & ALPHA_PCB_FLAGS_FEN)
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if (p != PCPU_GET(fpcurproc))
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panic("alpha_check_fpcurproc: bogus");
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restore_intr(s);
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critical_exit(s);
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#endif
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}
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@ -2127,10 +2126,9 @@ alpha_fpstate_check(struct proc *p)
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void
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alpha_fpstate_save(struct proc *p, int write)
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{
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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if (p == PCPU_GET(fpcurproc)) {
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/*
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* If curproc != fpcurproc, then we need to enable FEN
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@ -2165,7 +2163,7 @@ alpha_fpstate_save(struct proc *p, int write)
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alpha_pal_wrfen(0);
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}
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}
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restore_intr(s);
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critical_exit(s);
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}
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/*
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@ -2176,10 +2174,9 @@ alpha_fpstate_save(struct proc *p, int write)
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void
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alpha_fpstate_drop(struct proc *p)
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{
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int s;
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critical_t s;
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s = save_intr();
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disable_intr();
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s = critical_enter();
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if (p == PCPU_GET(fpcurproc)) {
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if (p == curproc) {
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/*
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@ -2195,7 +2192,7 @@ alpha_fpstate_drop(struct proc *p)
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}
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PCPU_SET(fpcurproc, NULL);
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}
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restore_intr(s);
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critical_exit(s);
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}
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/*
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@ -2205,13 +2202,12 @@ alpha_fpstate_drop(struct proc *p)
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void
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alpha_fpstate_switch(struct proc *p)
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{
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int s;
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critical_t s;
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/*
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* Enable FEN so that we can access the fp registers.
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*/
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s = save_intr();
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disable_intr();
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s = critical_enter();
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alpha_pal_wrfen(1);
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if (PCPU_GET(fpcurproc)) {
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/*
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@ -2238,7 +2234,7 @@ alpha_fpstate_switch(struct proc *p)
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}
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p->p_md.md_flags |= MDP_FPUSED;
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restore_intr(s);
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critical_exit(s);
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}
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/*
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promcnattach(alpha_console);
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}
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static int enter_prom __P((void));
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static void leave_prom __P((int));
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static critical_t enter_prom __P((void));
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static void leave_prom __P((critical_t));
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/*
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@ -134,16 +134,16 @@ promcnputc(dev, c)
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{
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prom_return_t ret;
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unsigned char *to = (unsigned char *)0x20000000;
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int s;
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critical_t s;
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s = enter_prom(); /* disable_intr() and map prom */
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s = enter_prom(); /* critical_enter() and map prom */
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*to = c;
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do {
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ret.bits = prom_putstr(alpha_console, to, 1);
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} while ((ret.u.retval & 1) == 0);
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leave_prom(s); /* unmap prom and restore_intr(s) */
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leave_prom(s); /* unmap prom and critical_exit(s) */
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}
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/*
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@ -188,12 +188,13 @@ promcncheckc(dev)
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return (-1);
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}
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static int
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static critical_t
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enter_prom()
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{
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pt_entry_t *lev1map;
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int s = save_intr();
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disable_intr();
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critical_t s;
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s = critical_enter();
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if (!prom_mapped) {
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#ifdef SIMOS
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@ -219,8 +220,8 @@ enter_prom()
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}
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static void
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leave_prom __P((s))
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int s;
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leave_prom(s)
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critical_t s;
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{
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pt_entry_t *lev1map;
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@ -232,11 +233,11 @@ leave_prom __P((s))
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lev1map[0] = saved_pte[0]; /* XXX */
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prom_cache_sync(); /* XXX */
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}
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restore_intr(s);
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critical_exit(s);
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}
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static void
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prom_cache_sync __P((void))
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prom_cache_sync(void)
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{
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ALPHA_TBIA();
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alpha_pal_imb();
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@ -272,7 +273,7 @@ prom_halt(halt)
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/*
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* Turn off interrupts, for sanity.
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*/
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disable_intr();
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critical_enter();
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/*
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* Set "boot request" part of the CPU state depending on what
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@ -76,7 +76,7 @@ ASSYM(GD_IDLEPCBPHYS, offsetof(struct globaldata, gd_idlepcbphys));
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ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock));
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ASSYM(MTX_RECURSE, offsetof(struct mtx, mtx_recurse));
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ASSYM(MTX_SAVEINTR, offsetof(struct mtx, mtx_saveintr));
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ASSYM(MTX_SAVECRIT, offsetof(struct mtx, mtx_savecrit));
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ASSYM(MTX_UNOWNED, MTX_UNOWNED);
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ASSYM(P_ADDR, offsetof(struct proc, p_addr));
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