Initialize PxCMD on reset and make its read-only bits such.
MFC after: 2 weeks
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9b3d347cfb
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843dbc5981
@ -490,6 +490,9 @@ ahci_reset(struct pci_ahci_softc *sc)
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for (i = 0; i < sc->ports; i++) {
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sc->port[i].ie = 0;
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sc->port[i].is = 0;
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sc->port[i].cmd = (AHCI_P_CMD_SUD | AHCI_P_CMD_POD);
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if (sc->port[i].bctx)
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sc->port[i].cmd |= AHCI_P_CMD_CPS;
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sc->port[i].sctl = 0;
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ahci_port_reset(&sc->port[i]);
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}
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@ -1941,8 +1944,15 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
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break;
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case AHCI_P_CMD:
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{
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p->cmd = value;
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p->cmd &= ~(AHCI_P_CMD_ST | AHCI_P_CMD_SUD | AHCI_P_CMD_POD |
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AHCI_P_CMD_CLO | AHCI_P_CMD_FRE | AHCI_P_CMD_APSTE |
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AHCI_P_CMD_ATAPI | AHCI_P_CMD_DLAE | AHCI_P_CMD_ALPE |
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AHCI_P_CMD_ASP | AHCI_P_CMD_ICC_MASK);
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p->cmd |= (AHCI_P_CMD_ST | AHCI_P_CMD_SUD | AHCI_P_CMD_POD |
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AHCI_P_CMD_CLO | AHCI_P_CMD_FRE | AHCI_P_CMD_APSTE |
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AHCI_P_CMD_ATAPI | AHCI_P_CMD_DLAE | AHCI_P_CMD_ALPE |
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AHCI_P_CMD_ASP | AHCI_P_CMD_ICC_MASK) & value;
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if (!(value & AHCI_P_CMD_ST)) {
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ahci_port_stop(p);
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} else {
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@ -1970,6 +1980,10 @@ pci_ahci_port_write(struct pci_ahci_softc *sc, uint64_t offset, uint64_t value)
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p->cmd &= ~AHCI_P_CMD_CLO;
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}
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if (value & AHCI_P_CMD_ICC_MASK) {
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p->cmd &= ~AHCI_P_CMD_ICC_MASK;
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}
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ahci_handle_port(p);
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break;
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}
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