diff --git a/sys/amd64/amd64/intr_machdep.c b/sys/amd64/amd64/intr_machdep.c index 55e2751d2a70..da6ca17e83a6 100644 --- a/sys/amd64/amd64/intr_machdep.c +++ b/sys/amd64/amd64/intr_machdep.c @@ -446,10 +446,6 @@ intr_assign_next_cpu(struct intsrc *isrc) current_cpu++; if (current_cpu >= num_cpus) current_cpu = 0; - if (bootverbose) { - printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc)); - printf(" to local APIC %u\n", apic_id); - } pic->pic_assign_cpu(isrc, apic_id); } @@ -483,7 +479,7 @@ intr_shuffle_irqs(void *arg __unused) if (num_cpus <= 1) return; - /* Round-robin assign each enabled source a CPU. */ + /* Round-robin assign a CPU to each enabled source. */ mtx_lock_spin(&intr_table_lock); assign_cpu = 1; for (i = 0; i < NUM_IO_INTS; i++) { diff --git a/sys/amd64/amd64/io_apic.c b/sys/amd64/amd64/io_apic.c index 3a893cdc53be..b27db7e294e6 100644 --- a/sys/amd64/amd64/io_apic.c +++ b/sys/amd64/amd64/io_apic.c @@ -512,13 +512,6 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase) * be routed to other CPUs later after they are enabled. */ intpin->io_cpu = PCPU_GET(apic_id); - if (bootverbose && intpin->io_irq != IRQ_DISABLED) { - printf("ioapic%u: intpin %d -> ", io->io_id, i); - ioapic_print_irq(intpin); - printf(" (%s, %s)\n", intpin->io_edgetrigger ? - "edge" : "level", intpin->io_activehi ? "high" : - "low"); - } value = ioapic_read(apic, IOAPIC_REDTBL_LO(i)); ioapic_write(apic, IOAPIC_REDTBL_LO(i), value | IOART_INTMSET); } @@ -583,6 +576,8 @@ ioapic_set_bus(void *cookie, u_int pin, int bus_type) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) return (EINVAL); + if (io->io_pins[pin].io_bus == bus_type) + return (0); io->io_pins[pin].io_bus = bus_type; if (bootverbose) printf("ioapic%u: intpin %d bus %s\n", io->io_id, pin, @@ -666,13 +661,17 @@ int ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol) { struct ioapic *io; + int activehi; io = (struct ioapic *)cookie; if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) return (EINVAL); - io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH); + activehi = (pol == INTR_POLARITY_HIGH); + if (io->io_pins[pin].io_activehi == activehi) + return (0); + io->io_pins[pin].io_activehi = activehi; if (bootverbose) printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin, pol == INTR_POLARITY_HIGH ? "high" : "low"); @@ -683,13 +682,17 @@ int ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger) { struct ioapic *io; + int edgetrigger; io = (struct ioapic *)cookie; if (pin >= io->io_numintr || trigger == INTR_TRIGGER_CONFORM) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) - return (EINVAL); - io->io_pins[pin].io_edgetrigger = (trigger == INTR_TRIGGER_EDGE); + return (EINVAL); + edgetrigger = (trigger == INTR_TRIGGER_EDGE); + if (io->io_pins[pin].io_edgetrigger == edgetrigger) + return (0); + io->io_pins[pin].io_edgetrigger = edgetrigger; if (bootverbose) printf("ioapic%u: intpin %d trigger: %s\n", io->io_id, pin, trigger == INTR_TRIGGER_EDGE ? "edge" : "level"); diff --git a/sys/i386/i386/intr_machdep.c b/sys/i386/i386/intr_machdep.c index da94c69f7e81..ddb194f73ca8 100644 --- a/sys/i386/i386/intr_machdep.c +++ b/sys/i386/i386/intr_machdep.c @@ -412,10 +412,6 @@ intr_assign_next_cpu(struct intsrc *isrc) current_cpu++; if (current_cpu >= num_cpus) current_cpu = 0; - if (bootverbose) { - printf("INTR: Assigning IRQ %d", pic->pic_vector(isrc)); - printf(" to local APIC %u\n", apic_id); - } pic->pic_assign_cpu(isrc, apic_id); } @@ -449,7 +445,7 @@ intr_shuffle_irqs(void *arg __unused) if (num_cpus <= 1) return; - /* Round-robin assign each enabled source a CPU. */ + /* Round-robin assign a CPU to each enabled source. */ mtx_lock_spin(&intr_table_lock); assign_cpu = 1; for (i = 0; i < NUM_IO_INTS; i++) { diff --git a/sys/i386/i386/io_apic.c b/sys/i386/i386/io_apic.c index 3a893cdc53be..597383660696 100644 --- a/sys/i386/i386/io_apic.c +++ b/sys/i386/i386/io_apic.c @@ -512,13 +512,6 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase) * be routed to other CPUs later after they are enabled. */ intpin->io_cpu = PCPU_GET(apic_id); - if (bootverbose && intpin->io_irq != IRQ_DISABLED) { - printf("ioapic%u: intpin %d -> ", io->io_id, i); - ioapic_print_irq(intpin); - printf(" (%s, %s)\n", intpin->io_edgetrigger ? - "edge" : "level", intpin->io_activehi ? "high" : - "low"); - } value = ioapic_read(apic, IOAPIC_REDTBL_LO(i)); ioapic_write(apic, IOAPIC_REDTBL_LO(i), value | IOART_INTMSET); } @@ -583,6 +576,8 @@ ioapic_set_bus(void *cookie, u_int pin, int bus_type) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) return (EINVAL); + if (io->io_pins[pin].io_bus == bus_type) + return (0); io->io_pins[pin].io_bus = bus_type; if (bootverbose) printf("ioapic%u: intpin %d bus %s\n", io->io_id, pin, @@ -666,13 +661,17 @@ int ioapic_set_polarity(void *cookie, u_int pin, enum intr_polarity pol) { struct ioapic *io; + int activehi; io = (struct ioapic *)cookie; if (pin >= io->io_numintr || pol == INTR_POLARITY_CONFORM) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) return (EINVAL); - io->io_pins[pin].io_activehi = (pol == INTR_POLARITY_HIGH); + activehi = (pol == INTR_POLARITY_HIGH); + if (io->io_pins[pin].io_activehi == activehi) + return (0); + io->io_pins[pin].io_activehi = activehi; if (bootverbose) printf("ioapic%u: intpin %d polarity: %s\n", io->io_id, pin, pol == INTR_POLARITY_HIGH ? "high" : "low"); @@ -683,13 +682,17 @@ int ioapic_set_triggermode(void *cookie, u_int pin, enum intr_trigger trigger) { struct ioapic *io; + int edgetrigger; io = (struct ioapic *)cookie; if (pin >= io->io_numintr || trigger == INTR_TRIGGER_CONFORM) return (EINVAL); if (io->io_pins[pin].io_irq >= NUM_IO_INTS) return (EINVAL); - io->io_pins[pin].io_edgetrigger = (trigger == INTR_TRIGGER_EDGE); + edgetrigger = (trigger == INTR_TRIGGER_EDGE); + if (io->io_pins[pin].io_edgetrigger == edgetrigger) + return (0); + io->io_pins[pin].io_edgetrigger = edgetrigger; if (bootverbose) printf("ioapic%u: intpin %d trigger: %s\n", io->io_id, pin, trigger == INTR_TRIGGER_EDGE ? "edge" : "level");