Fix support for the old CMD 646 chips, interrupt setup was wrong.
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@ -314,10 +314,10 @@ ata_ali_ident(device_t dev)
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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struct ata_chip_id *idx;
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static struct ata_chip_id ids[] =
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{{ ATA_ALI_5229, 0xc4, 0, ALICABLE, ATA_UDMA5, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0xc2, 0, ALICABLE, ATA_UDMA4, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0x20, 0, ALIOLD, ATA_UDMA2, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0x00, 0, ALIOLD, ATA_WDMA2, "AcerLabs Aladdin" },
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{{ ATA_ALI_5229, 0xc4, 0, ALICABLE, ATA_UDMA5, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0xc2, 0, ALICABLE, ATA_UDMA4, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0x20, 0, ALIOLD, ATA_UDMA2, "AcerLabs Aladdin" },
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{ ATA_ALI_5229, 0x00, 0, ALIOLD, ATA_WDMA2, "AcerLabs Aladdin" },
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{ 0, 0, 0, 0, 0, 0}};
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char buffer[64];
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@ -1276,11 +1276,11 @@ ata_sii_ident(device_t dev)
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struct ata_pci_controller *ctlr = device_get_softc(dev);
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struct ata_chip_id *idx;
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static struct ata_chip_id ids[] =
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{{ ATA_SII0680, 0x00, SII_SETCLK, 0x00, ATA_UDMA6, "SiI 0680" },
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{ ATA_CMD649, 0x00, 0, SII_INTR, ATA_UDMA5, "CMD 649" },
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{ ATA_CMD648, 0x00, 0, SII_INTR, ATA_UDMA4, "CMD 648" },
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{ ATA_CMD646, 0x07, 0, 0x00, ATA_UDMA2, "CMD 646U2" },
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{ ATA_CMD646, 0x00, 0, 0x00, ATA_WDMA2, "CMD 646" },
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{{ ATA_SII0680, 0x00, 0, SII_SETCLK, ATA_UDMA6, "SiI 0680" },
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{ ATA_CMD649, 0x00, 0, SII_INTR, ATA_UDMA5, "CMD 649" },
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{ ATA_CMD648, 0x00, 0, SII_INTR, ATA_UDMA4, "CMD 648" },
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{ ATA_CMD646, 0x07, 0, SII_ENINTR, ATA_UDMA2, "CMD 646U2" },
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{ ATA_CMD646, 0x00, 0, SII_ENINTR, ATA_WDMA2, "CMD 646" },
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{ 0, 0, 0, 0, 0, 0}};
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char buffer[64];
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@ -1313,7 +1313,10 @@ ata_sii_chipinit(device_t dev)
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return ENXIO;
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}
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if (ctlr->chip->cfg1 == SII_SETCLK) {
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if (ctlr->chip->cfg2 & SII_ENINTR)
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pci_write_config(dev, 0x71, 0x01, 1);
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if (ctlr->chip->cfg2 & SII_SETCLK) {
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if ((pci_read_config(dev, 0x8a, 1) & 0x30) != 0x10)
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pci_write_config(dev, 0x8a,
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(pci_read_config(dev, 0x8a, 1) & 0x0F) | 0x10, 1);
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@ -220,8 +220,9 @@ struct ata_pci_controller {
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#define SWKS66 1
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#define SWKS100 2
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#define SII_SETCLK 1
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#define SII_INTR 0x01
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#define SII_SETCLK 0x02
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#define SII_ENINTR 0x04
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#define SIS_SOUTH 1
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#define SIS133NEW 2
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