Reduce diff with linux 3.8.13 on i915_drv.c
While here update the list of devices id to match the one in linux 3.8.13 Reviewed by: dumbbell Differential Revision: https://reviews.freebsd.org/D3489
This commit is contained in:
Baptiste Daroussin
parent
95fb5cf717
commit
85b8a32aea
@ -47,6 +47,11 @@ static drm_pci_id_list_t i915_pciidlist[] = {
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i915_PCI_IDS
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};
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#define INTEL_VGA_DEVICE(id, info_) { \
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.device = id, \
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.info = info_, \
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}
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static const struct intel_device_info intel_i830_info = {
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.gen = 2, .is_mobile = 1, .cursor_needs_physical = 1,
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.has_overlay = 1, .overlay_needs_physical = 1,
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@ -181,7 +186,6 @@ static const struct intel_device_info intel_ivybridge_m_info = {
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.has_pch_split = 1,
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};
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#if 0
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static const struct intel_device_info intel_valleyview_m_info = {
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.gen = 7, .is_mobile = 1,
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.need_gfx_hws = 1, .has_hotplug = 1,
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@ -199,7 +203,6 @@ static const struct intel_device_info intel_valleyview_d_info = {
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.has_blt_ring = 1,
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.is_valleyview = 1,
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};
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#endif
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static const struct intel_device_info intel_haswell_d_info = {
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.is_haswell = 1, .gen = 7,
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@ -221,42 +224,37 @@ static const struct intel_device_info intel_haswell_m_info = {
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.not_supported = 1,
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};
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#define INTEL_VGA_DEVICE(id, info_) { \
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.device = id, \
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.info = info_, \
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}
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static const struct intel_gfx_device_id {
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int device;
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const struct intel_device_info *info;
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} pciidlist[] = { /* aka */
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INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
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INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
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INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
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} pciidlist[] = { /* aka */
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INTEL_VGA_DEVICE(0x3577, &intel_i830_info), /* I830_M */
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INTEL_VGA_DEVICE(0x2562, &intel_845g_info), /* 845_G */
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INTEL_VGA_DEVICE(0x3582, &intel_i85x_info), /* I855_GM */
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INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
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INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
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INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
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INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
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INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
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INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
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INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
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INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
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INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
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INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
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INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
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INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
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INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
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INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
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INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
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INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
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INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
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INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
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INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2e92, &intel_g45_info),
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INTEL_VGA_DEVICE(0x2572, &intel_i865g_info), /* I865_G */
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INTEL_VGA_DEVICE(0x2582, &intel_i915g_info), /* I915_G */
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INTEL_VGA_DEVICE(0x258a, &intel_i915g_info), /* E7221_G */
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INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info), /* I915_GM */
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INTEL_VGA_DEVICE(0x2772, &intel_i945g_info), /* I945_G */
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INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info), /* I945_GM */
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INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info), /* I945_GME */
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INTEL_VGA_DEVICE(0x2972, &intel_i965g_info), /* I946_GZ */
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INTEL_VGA_DEVICE(0x2982, &intel_i965g_info), /* G35_G */
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INTEL_VGA_DEVICE(0x2992, &intel_i965g_info), /* I965_Q */
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INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info), /* I965_G */
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INTEL_VGA_DEVICE(0x29b2, &intel_g33_info), /* Q35_G */
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INTEL_VGA_DEVICE(0x29c2, &intel_g33_info), /* G33_G */
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INTEL_VGA_DEVICE(0x29d2, &intel_g33_info), /* Q33_G */
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INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info), /* I965_GM */
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INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info), /* I965_GME */
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INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info), /* GM45_G */
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INTEL_VGA_DEVICE(0x2e02, &intel_g45_info), /* IGD_E_G */
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INTEL_VGA_DEVICE(0x2e12, &intel_g45_info), /* Q45_G */
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INTEL_VGA_DEVICE(0x2e22, &intel_g45_info), /* G45_G */
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INTEL_VGA_DEVICE(0x2e32, &intel_g45_info), /* G41_G */
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INTEL_VGA_DEVICE(0x2e42, &intel_g45_info), /* B43_G */
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INTEL_VGA_DEVICE(0x2e92, &intel_g45_info), /* B43_G.1 */
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INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
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INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
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INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
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@ -276,11 +274,43 @@ static const struct intel_gfx_device_id {
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INTEL_VGA_DEVICE(0x016a, &intel_ivybridge_d_info), /* GT2 server */
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INTEL_VGA_DEVICE(0x0402, &intel_haswell_d_info), /* GT1 desktop */
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INTEL_VGA_DEVICE(0x0412, &intel_haswell_d_info), /* GT2 desktop */
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INTEL_VGA_DEVICE(0x0422, &intel_haswell_d_info), /* GT2 desktop */
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INTEL_VGA_DEVICE(0x040a, &intel_haswell_d_info), /* GT1 server */
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INTEL_VGA_DEVICE(0x041a, &intel_haswell_d_info), /* GT2 server */
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INTEL_VGA_DEVICE(0x042a, &intel_haswell_d_info), /* GT2 server */
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INTEL_VGA_DEVICE(0x0406, &intel_haswell_m_info), /* GT1 mobile */
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INTEL_VGA_DEVICE(0x0416, &intel_haswell_m_info), /* GT2 mobile */
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INTEL_VGA_DEVICE(0x0c16, &intel_haswell_d_info), /* SDV */
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INTEL_VGA_DEVICE(0x0426, &intel_haswell_m_info), /* GT2 mobile */
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INTEL_VGA_DEVICE(0x0C02, &intel_haswell_d_info), /* SDV GT1 desktop */
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INTEL_VGA_DEVICE(0x0C12, &intel_haswell_d_info), /* SDV GT2 desktop */
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INTEL_VGA_DEVICE(0x0C22, &intel_haswell_d_info), /* SDV GT2 desktop */
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INTEL_VGA_DEVICE(0x0C0A, &intel_haswell_d_info), /* SDV GT1 server */
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INTEL_VGA_DEVICE(0x0C1A, &intel_haswell_d_info), /* SDV GT2 server */
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INTEL_VGA_DEVICE(0x0C2A, &intel_haswell_d_info), /* SDV GT2 server */
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INTEL_VGA_DEVICE(0x0C06, &intel_haswell_m_info), /* SDV GT1 mobile */
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INTEL_VGA_DEVICE(0x0C16, &intel_haswell_m_info), /* SDV GT2 mobile */
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INTEL_VGA_DEVICE(0x0C26, &intel_haswell_m_info), /* SDV GT2 mobile */
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INTEL_VGA_DEVICE(0x0A02, &intel_haswell_d_info), /* ULT GT1 desktop */
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INTEL_VGA_DEVICE(0x0A12, &intel_haswell_d_info), /* ULT GT2 desktop */
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INTEL_VGA_DEVICE(0x0A22, &intel_haswell_d_info), /* ULT GT2 desktop */
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INTEL_VGA_DEVICE(0x0A0A, &intel_haswell_d_info), /* ULT GT1 server */
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INTEL_VGA_DEVICE(0x0A1A, &intel_haswell_d_info), /* ULT GT2 server */
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INTEL_VGA_DEVICE(0x0A2A, &intel_haswell_d_info), /* ULT GT2 server */
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INTEL_VGA_DEVICE(0x0A06, &intel_haswell_m_info), /* ULT GT1 mobile */
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INTEL_VGA_DEVICE(0x0A16, &intel_haswell_m_info), /* ULT GT2 mobile */
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INTEL_VGA_DEVICE(0x0A26, &intel_haswell_m_info), /* ULT GT2 mobile */
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INTEL_VGA_DEVICE(0x0D02, &intel_haswell_d_info), /* CRW GT1 desktop */
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INTEL_VGA_DEVICE(0x0D12, &intel_haswell_d_info), /* CRW GT2 desktop */
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INTEL_VGA_DEVICE(0x0D22, &intel_haswell_d_info), /* CRW GT2 desktop */
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INTEL_VGA_DEVICE(0x0D0A, &intel_haswell_d_info), /* CRW GT1 server */
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INTEL_VGA_DEVICE(0x0D1A, &intel_haswell_d_info), /* CRW GT2 server */
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INTEL_VGA_DEVICE(0x0D2A, &intel_haswell_d_info), /* CRW GT2 server */
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INTEL_VGA_DEVICE(0x0D06, &intel_haswell_m_info), /* CRW GT1 mobile */
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INTEL_VGA_DEVICE(0x0D16, &intel_haswell_m_info), /* CRW GT2 mobile */
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INTEL_VGA_DEVICE(0x0D26, &intel_haswell_m_info), /* CRW GT2 mobile */
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INTEL_VGA_DEVICE(0x0f30, &intel_valleyview_m_info),
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INTEL_VGA_DEVICE(0x0157, &intel_valleyview_m_info),
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INTEL_VGA_DEVICE(0x0155, &intel_valleyview_d_info),
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{0, 0}
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};
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@ -288,10 +318,8 @@ static int i915_enable_unsupported;
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static int i915_drm_freeze(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv;
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int error;
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struct drm_i915_private *dev_priv = dev->dev_private;
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dev_priv = dev->dev_private;
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drm_kms_helper_poll_disable(dev);
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#if 0
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@ -300,11 +328,11 @@ static int i915_drm_freeze(struct drm_device *dev)
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/* If KMS is active, we do the leavevt stuff here */
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if (drm_core_check_feature(dev, DRIVER_MODESET)) {
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error = i915_gem_idle(dev);
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int error = i915_gem_idle(dev);
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if (error) {
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device_printf(dev->dev,
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"GEM idle failed, resume might fail\n");
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return (error);
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"GEM idle failed, resume might fail\n");
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return error;
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}
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drm_irq_uninstall(dev);
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}
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@ -319,8 +347,7 @@ static int i915_drm_freeze(struct drm_device *dev)
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return 0;
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}
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static int
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i915_suspend(device_t kdev)
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static int i915_suspend(device_t kdev)
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{
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struct drm_device *dev;
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int error;
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@ -385,8 +412,7 @@ static int i915_drm_thaw(struct drm_device *dev)
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return error;
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}
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static int
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i915_resume(device_t kdev)
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static int i915_resume(device_t kdev)
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{
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struct drm_device *dev;
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int ret;
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@ -725,8 +751,7 @@ void vlv_force_wake_put(struct drm_i915_private *dev_priv)
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POSTING_READ(FORCEWAKE_VLV);
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}
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static int
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i8xx_do_reset(struct drm_device *dev)
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static int i8xx_do_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int onems;
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@ -761,8 +786,7 @@ i8xx_do_reset(struct drm_device *dev)
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return 0;
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}
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static int
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i965_reset_complete(struct drm_device *dev)
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static int i965_reset_complete(struct drm_device *dev)
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{
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u8 gdrst;
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@ -770,8 +794,7 @@ i965_reset_complete(struct drm_device *dev)
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return (gdrst & GRDOM_RESET_ENABLE) == 0;
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}
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static int
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i965_do_reset(struct drm_device *dev)
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static int i965_do_reset(struct drm_device *dev)
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{
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int ret;
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u8 gdrst;
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@ -793,18 +816,16 @@ i965_do_reset(struct drm_device *dev)
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gdrst = pci_read_config(dev->dev, I965_GDRST, 1);
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pci_write_config(dev->dev, I965_GDRST,
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gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE, 1);
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return wait_for(i965_reset_complete(dev), 500);
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return wait_for(i965_reset_complete(dev), 500);
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}
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static int
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ironlake_do_reset(struct drm_device *dev)
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static int ironlake_do_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv;
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struct drm_i915_private *dev_priv = dev->dev_private;
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u32 gdrst;
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int ret;
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dev_priv = dev->dev_private;
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gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
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I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
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gdrst | GRDOM_RENDER | GRDOM_RESET_ENABLE);
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@ -816,16 +837,13 @@ ironlake_do_reset(struct drm_device *dev)
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gdrst = I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR);
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I915_WRITE(MCHBAR_MIRROR_BASE + ILK_GDSR,
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gdrst | GRDOM_MEDIA | GRDOM_RESET_ENABLE);
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return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
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return wait_for(I915_READ(MCHBAR_MIRROR_BASE + ILK_GDSR) & 0x1, 500);
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}
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static int
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gen6_do_reset(struct drm_device *dev)
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static int gen6_do_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv;
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int ret;
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dev_priv = dev->dev_private;
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret;
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/* Hold gt_lock across reset to prevent any register access
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* with forcewake not set correctly
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@ -858,8 +876,7 @@ gen6_do_reset(struct drm_device *dev)
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return (ret);
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}
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int
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intel_gpu_reset(struct drm_device *dev)
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int intel_gpu_reset(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = dev->dev_private;
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int ret = -ENODEV;
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@ -894,13 +911,28 @@ intel_gpu_reset(struct drm_device *dev)
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return ret;
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}
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/**
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* i915_reset - reset chip after a hang
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* @dev: drm device to reset
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*
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* Reset the chip. Useful if a hang is detected. Returns zero on successful
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* reset or otherwise an error code.
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*
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* Procedure is fairly simple:
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* - reset the chip using the reset reg
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* - re-init context state
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* - re-init hardware status page
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* - re-init ring buffer
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* - re-init interrupt state
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* - re-init display
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*/
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int i915_reset(struct drm_device *dev)
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{
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drm_i915_private_t *dev_priv = dev->dev_private;
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int ret;
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if (!i915_try_reset)
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return (0);
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return 0;
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if (!sx_try_xlock(&dev->dev_struct_lock))
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return (-EBUSY);
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@ -919,11 +951,25 @@ int i915_reset(struct drm_device *dev)
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if (ret) {
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DRM_ERROR("Failed to reset chip.\n");
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DRM_UNLOCK(dev);
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return (ret);
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return ret;
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}
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/* Ok, now get things going again... */
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/*
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* Everything depends on having the GTT running, so we need to start
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* there. Fortunately we don't need to do this unless we reset the
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* chip at a PCI level.
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*
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* Next we need to restore the context, but we don't use those
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* yet either...
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*
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* Ring buffer needs to be re-initialized in the KMS case, or if X
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* was running at the time of the reset (i.e. we weren't VT
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* switched away).
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*/
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if (drm_core_check_feature(dev, DRIVER_MODESET) ||
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!dev_priv->mm.suspended) {
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!dev_priv->mm.suspended) {
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struct intel_ring_buffer *ring;
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int i;
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@ -937,6 +983,11 @@ int i915_reset(struct drm_device *dev)
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i915_gem_context_init(dev);
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i915_gem_init_ppgtt(dev);
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/*
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* It would make sense to re-init all the other hw state, at
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* least the rps/rc6/emon init done within modeset_init_hw. For
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* some unknown reason, this blows up my ilk, so don't.
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*/
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DRM_UNLOCK(dev);
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if (drm_core_check_feature(dev, DRIVER_MODESET))
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@ -944,10 +995,11 @@ int i915_reset(struct drm_device *dev)
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drm_irq_uninstall(dev);
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drm_irq_install(dev);
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} else
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} else {
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DRM_UNLOCK(dev);
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}
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return (0);
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return 0;
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}
|
||||
|
||||
/* We give fast paths for the really cool registers */
|
||||
|
||||
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Reference in New Issue
Block a user