rsu(4): Add support for 1T2R and 2T2R NICs.
This logic is mostly crimed from the reference driver and the linux r92su driver. I verified that it (a) worked on the rsu hardware I have, and (b) did traffic testing whilst watching what ath(4) sent as a hostap. It successfully sent MCS8..15 rates (which requires 2-stream reception) as well as MCS0..7 (which is 1-stream.) Tested: * RTL8712, 1T1R NIC, MCS rates 0..7. * RTL8712, 1T2R NIC, MCS rates 0..15 TODO: * Find a 2T2R NIC!
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@ -403,6 +403,7 @@ rsu_attach(device_t self)
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int error;
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uint8_t iface_index, bands;
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struct usb_interface *iface;
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const char *rft;
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device_set_usb_desc(self);
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sc->sc_udev = uaa->device;
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@ -462,8 +463,37 @@ rsu_attach(device_t self)
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device_printf(self, "could not read ROM\n");
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goto fail_rom;
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}
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/* Figure out TX/RX streams */
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switch (sc->rom[84]) {
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case 0x0:
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sc->sc_rftype = RTL8712_RFCONFIG_1T1R;
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sc->sc_nrxstream = 1;
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sc->sc_ntxstream = 1;
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rft = "1T1R";
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break;
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case 0x1:
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sc->sc_rftype = RTL8712_RFCONFIG_1T2R;
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sc->sc_nrxstream = 2;
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sc->sc_ntxstream = 1;
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rft = "1T2R";
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break;
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case 0x2:
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sc->sc_rftype = RTL8712_RFCONFIG_2T2R;
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sc->sc_nrxstream = 2;
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sc->sc_ntxstream = 2;
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rft = "2T2R";
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break;
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default:
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device_printf(sc->sc_dev,
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"%s: unknown board type (rfconfig=0x%02x)\n",
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__func__,
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sc->rom[84]);
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goto fail_rom;
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}
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IEEE80211_ADDR_COPY(ic->ic_macaddr, &sc->rom[0x12]);
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device_printf(self, "MAC/BB RTL8712 cut %d\n", sc->cut);
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device_printf(self, "MAC/BB RTL8712 cut %d %s\n", sc->cut, rft);
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ic->ic_softc = sc;
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ic->ic_name = device_get_nameunit(self);
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@ -494,8 +524,8 @@ rsu_attach(device_t self)
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ic->ic_htcaps |= IEEE80211_HTCAP_CHWIDTH40;
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/* set number of spatial streams */
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ic->ic_txstream = 1;
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ic->ic_rxstream = 1;
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ic->ic_txstream = sc->sc_ntxstream;
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ic->ic_rxstream = sc->sc_nrxstream;
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}
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/* Set supported .11b and .11g rates. */
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@ -2664,8 +2694,7 @@ rsu_load_firmware(struct rsu_softc *sc)
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dmem->hci_sel = R92S_HCI_SEL_USB | R92S_HCI_SEL_8172;
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dmem->nendpoints = sc->sc_nendpoints;
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dmem->chip_version = sc->cut;
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/* XXX TODO: rf_config should come from ROM */
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dmem->rf_config = 0x11; /* 1T1R */
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dmem->rf_config = sc->sc_rftype;
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dmem->vcs_type = R92S_VCS_TYPE_AUTO;
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dmem->vcs_mode = R92S_VCS_MODE_RTS_CTS;
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dmem->turbo_mode = 0;
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@ -157,6 +157,20 @@
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#define RW(var, field, val) \
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(((var) & ~field##_M) | SM(field, val))
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/*
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* ROM field with RF config.
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*/
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enum {
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RTL8712_RFCONFIG_1T = 0x10,
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RTL8712_RFCONFIG_2T = 0x20,
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RTL8712_RFCONFIG_1R = 0x01,
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RTL8712_RFCONFIG_2R = 0x02,
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RTL8712_RFCONFIG_1T1R = 0x11,
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RTL8712_RFCONFIG_1T2R = 0x12,
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RTL8712_RFCONFIG_TURBO = 0x92,
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RTL8712_RFCONFIG_2T2R = 0x22
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};
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/*
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* Firmware image header.
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*/
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@ -173,6 +187,7 @@ struct r92s_fw_priv {
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uint8_t chip_version;
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uint16_t custid;
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uint8_t rf_config;
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//0x11: 1T1R, 0x12: 1T2R, 0x92: 1T2R turbo, 0x22: 2T2R
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uint8_t nendpoints;
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/* QWORD1 */
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uint32_t regulatory;
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@ -755,6 +770,9 @@ struct rsu_softc {
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sc_scanning:1,
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sc_scan_pass:1;
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u_int cut;
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uint8_t sc_rftype;
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int8_t sc_nrxstream;
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int8_t sc_ntxstream;
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struct rsu_host_cmd_ring cmdq;
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struct rsu_data sc_rx[RSU_RX_LIST_COUNT];
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struct rsu_data sc_tx[RSU_TX_LIST_COUNT];
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