Patch #7 This is primarily about processing limit control.

- add a limit for both RX and TX, change the default to 256
- change the sysctl usage to be common, and now to be called
during init for each ring.
- the TX limit is not yet used, but the changes in the last
patch in this series uses the value.
- the motivation behind these changes is to improve data
locality in the final code.
- rxeof interface changes since it now gets limit from the
ring struct
This commit is contained in:
jfv 2012-11-30 23:28:01 +00:00
parent 24607bdcd0
commit 867ef5fd86
2 changed files with 28 additions and 17 deletions

View File

@ -47,7 +47,7 @@ int ixgbe_display_debug_stats = 0;
/********************************************************************* /*********************************************************************
* Driver version * Driver version
*********************************************************************/ *********************************************************************/
char ixgbe_driver_version[] = "2.5.0 - 6"; char ixgbe_driver_version[] = "2.5.0 - 7";
/********************************************************************* /*********************************************************************
* PCI Device ID Table * PCI Device ID Table
@ -150,7 +150,7 @@ static void ixgbe_enable_intr(struct adapter *);
static void ixgbe_disable_intr(struct adapter *); static void ixgbe_disable_intr(struct adapter *);
static void ixgbe_update_stats_counters(struct adapter *); static void ixgbe_update_stats_counters(struct adapter *);
static bool ixgbe_txeof(struct tx_ring *); static bool ixgbe_txeof(struct tx_ring *);
static bool ixgbe_rxeof(struct ix_queue *, int); static bool ixgbe_rxeof(struct ix_queue *);
static void ixgbe_rx_checksum(u32, struct mbuf *, u32); static void ixgbe_rx_checksum(u32, struct mbuf *, u32);
static void ixgbe_set_promisc(struct adapter *); static void ixgbe_set_promisc(struct adapter *);
static void ixgbe_set_multi(struct adapter *); static void ixgbe_set_multi(struct adapter *);
@ -163,7 +163,7 @@ static int ixgbe_set_thermal_test(SYSCTL_HANDLER_ARGS);
static int ixgbe_dma_malloc(struct adapter *, bus_size_t, static int ixgbe_dma_malloc(struct adapter *, bus_size_t,
struct ixgbe_dma_alloc *, int); struct ixgbe_dma_alloc *, int);
static void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *); static void ixgbe_dma_free(struct adapter *, struct ixgbe_dma_alloc *);
static void ixgbe_add_rx_process_limit(struct adapter *, const char *, static void ixgbe_add_process_limit(struct adapter *, const char *,
const char *, int *, int); const char *, int *, int);
static bool ixgbe_tx_ctx_setup(struct tx_ring *, struct mbuf *); static bool ixgbe_tx_ctx_setup(struct tx_ring *, struct mbuf *);
static bool ixgbe_tso_setup(struct tx_ring *, struct mbuf *, u32 *, u32 *); static bool ixgbe_tso_setup(struct tx_ring *, struct mbuf *, u32 *, u32 *);
@ -246,9 +246,13 @@ static int ixgbe_max_interrupt_rate = (4000000 / IXGBE_LOW_LATENCY);
TUNABLE_INT("hw.ixgbe.max_interrupt_rate", &ixgbe_max_interrupt_rate); TUNABLE_INT("hw.ixgbe.max_interrupt_rate", &ixgbe_max_interrupt_rate);
/* How many packets rxeof tries to clean at a time */ /* How many packets rxeof tries to clean at a time */
static int ixgbe_rx_process_limit = 128; static int ixgbe_rx_process_limit = 256;
TUNABLE_INT("hw.ixgbe.rx_process_limit", &ixgbe_rx_process_limit); TUNABLE_INT("hw.ixgbe.rx_process_limit", &ixgbe_rx_process_limit);
/* How many packets txeof tries to clean at a time */
static int ixgbe_tx_process_limit = 256;
TUNABLE_INT("hw.ixgbe.tx_process_limit", &ixgbe_tx_process_limit);
/* /*
** Smart speed setting, default to on ** Smart speed setting, default to on
** this only works as a compile option ** this only works as a compile option
@ -563,11 +567,6 @@ ixgbe_attach(device_t dev)
if (ixgbe_setup_interface(dev, adapter) != 0) if (ixgbe_setup_interface(dev, adapter) != 0)
goto err_late; goto err_late;
/* Sysctl for limiting the amount of work done in the taskqueue */
ixgbe_add_rx_process_limit(adapter, "rx_processing_limit",
"max number of rx packets to process", &adapter->rx_process_limit,
ixgbe_rx_process_limit);
/* Initialize statistics */ /* Initialize statistics */
ixgbe_update_stats_counters(adapter); ixgbe_update_stats_counters(adapter);
@ -1410,7 +1409,7 @@ ixgbe_handle_que(void *context, int pending)
bool more; bool more;
if (ifp->if_drv_flags & IFF_DRV_RUNNING) { if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
more = ixgbe_rxeof(que, adapter->rx_process_limit); more = ixgbe_rxeof(que);
IXGBE_TX_LOCK(txr); IXGBE_TX_LOCK(txr);
ixgbe_txeof(txr); ixgbe_txeof(txr);
#ifndef IXGBE_LEGACY_TX #ifndef IXGBE_LEGACY_TX
@ -1458,7 +1457,7 @@ ixgbe_legacy_irq(void *arg)
return; return;
} }
more_rx = ixgbe_rxeof(que, adapter->rx_process_limit); more_rx = ixgbe_rxeof(que);
IXGBE_TX_LOCK(txr); IXGBE_TX_LOCK(txr);
do { do {
@ -1504,7 +1503,7 @@ ixgbe_msix_que(void *arg)
ixgbe_disable_queue(adapter, que->msix); ixgbe_disable_queue(adapter, que->msix);
++que->irqs; ++que->irqs;
more_rx = ixgbe_rxeof(que, adapter->rx_process_limit); more_rx = ixgbe_rxeof(que);
IXGBE_TX_LOCK(txr); IXGBE_TX_LOCK(txr);
more_tx = ixgbe_txeof(txr); more_tx = ixgbe_txeof(txr);
@ -3083,6 +3082,11 @@ ixgbe_initialize_transmit_units(struct adapter *adapter)
u64 tdba = txr->txdma.dma_paddr; u64 tdba = txr->txdma.dma_paddr;
u32 txctrl; u32 txctrl;
/* Sysctl for limiting work done in tx clean */
ixgbe_add_process_limit(adapter, "tx_processing_limit",
"max number of packets to process", &txr->process_limit,
ixgbe_tx_process_limit);
IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i),
(tdba & 0x00000000ffffffffULL)); (tdba & 0x00000000ffffffffULL));
IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32)); IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
@ -4122,6 +4126,11 @@ ixgbe_initialize_receive_units(struct adapter *adapter)
for (int i = 0; i < adapter->num_queues; i++, rxr++) { for (int i = 0; i < adapter->num_queues; i++, rxr++) {
u64 rdba = rxr->rxdma.dma_paddr; u64 rdba = rxr->rxdma.dma_paddr;
/* Sysctl for limiting work done in rx clean */
ixgbe_add_process_limit(adapter, "rx_processing_limit",
"max number of packets to process", &rxr->process_limit,
ixgbe_rx_process_limit);
/* Setup the Base and Length of the Rx Descriptor Ring */ /* Setup the Base and Length of the Rx Descriptor Ring */
IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i),
(rdba & 0x00000000ffffffffULL)); (rdba & 0x00000000ffffffffULL));
@ -4341,7 +4350,7 @@ ixgbe_rx_discard(struct rx_ring *rxr, int i)
* Return TRUE for more work, FALSE for all clean. * Return TRUE for more work, FALSE for all clean.
*********************************************************************/ *********************************************************************/
static bool static bool
ixgbe_rxeof(struct ix_queue *que, int count) ixgbe_rxeof(struct ix_queue *que)
{ {
struct adapter *adapter = que->adapter; struct adapter *adapter = que->adapter;
struct rx_ring *rxr = que->rxr; struct rx_ring *rxr = que->rxr;
@ -4350,6 +4359,7 @@ ixgbe_rxeof(struct ix_queue *que, int count)
struct lro_entry *queued; struct lro_entry *queued;
int i, nextp, processed = 0; int i, nextp, processed = 0;
u32 staterr = 0; u32 staterr = 0;
u32 count = rxr->process_limit;
union ixgbe_adv_rx_desc *cur; union ixgbe_adv_rx_desc *cur;
struct ixgbe_rx_buf *rbuf, *nbuf; struct ixgbe_rx_buf *rbuf, *nbuf;
@ -5541,13 +5551,13 @@ ixgbe_set_flowcntl(SYSCTL_HANDLER_ARGS)
} }
static void static void
ixgbe_add_rx_process_limit(struct adapter *adapter, const char *name, ixgbe_add_process_limit(struct adapter *adapter, const char *name,
const char *description, int *limit, int value) const char *description, int *limit, int value)
{ {
*limit = value; *limit = value;
SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev), SYSCTL_ADD_UINT(device_get_sysctl_ctx(adapter->dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)), SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW, limit, value, description); OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RW, limit, value, description);
} }
/* /*

View File

@ -296,6 +296,7 @@ struct tx_ring {
IXGBE_QUEUE_WORKING, IXGBE_QUEUE_WORKING,
IXGBE_QUEUE_HUNG, IXGBE_QUEUE_HUNG,
} queue_status; } queue_status;
u32 process_limit;
int watchdog_time; int watchdog_time;
union ixgbe_adv_tx_desc *tx_base; union ixgbe_adv_tx_desc *tx_base;
struct ixgbe_dma_alloc txdma; struct ixgbe_dma_alloc txdma;
@ -338,6 +339,7 @@ struct rx_ring {
bool vtag_strip; bool vtag_strip;
u32 next_to_refresh; u32 next_to_refresh;
u32 next_to_check; u32 next_to_check;
u32 process_limit;
char mtx_name[16]; char mtx_name[16];
struct ixgbe_rx_buf *rx_buffers; struct ixgbe_rx_buf *rx_buffers;
bus_dma_tag_t tag; bus_dma_tag_t tag;
@ -444,7 +446,6 @@ struct adapter {
struct rx_ring *rx_rings; struct rx_ring *rx_rings;
int num_rx_desc; int num_rx_desc;
u64 que_mask; u64 que_mask;
u32 rx_process_limit;
/* Multicast array memory */ /* Multicast array memory */
u8 *mta; u8 *mta;