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- Update the CPU version check to recognize P4/EMT64 CPUs. [1]

Browse Source 
- Allow libpmc(3) to support P4/EMT64 PMCs on the amd64 architecture
  and AMD K8 PMCs on the i386. [2]

Submitted by:	ps [1]
Pointy hat:	myself [2]
Approved by:	re (scottl)
This commit is contained in:
Joseph Koshy 2005-07-03 16:33:22 +00:00
parent b4373150d9
commit 86a655492a
2 changed files with 13 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
lib/libpmc/libpmc.c
View File

@ -47,13 +47,13 @@ __FBSDID("$FreeBSD$");
static int k7_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
#endif
#if defined(__amd64__)
#if defined(__amd64__) || defined(__i386__)
static int k8_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int p4_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
#endif
#if defined(__i386__)
static int p4_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int p5_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
struct pmc_op_pmcallocate *_pmc_config);
static int p6_allocate_pmc(enum pmc_event _pe, char *_ctrspec,
@ -154,7 +154,7 @@ struct pmc_masks {
#define PMCMASK(N,V) { .pm_name = #N, .pm_value = (V) }
#define NULLMASK PMCMASK(NULL,0)
#if defined(__i386__) || defined(__amd64__)
#if defined(__amd64__) || defined(__i386__)
static int
pmc_parse_mask(const struct pmc_masks *pmask, char *p, uint32_t *evmask)
{
@ -301,7 +301,7 @@ k7_allocate_pmc(enum pmc_event pe, char *ctrspec,
#endif
#if defined(__amd64__)
#if defined(__amd64__) || defined(__i386__)
/*
* AMD K8 PMCs.
@ -670,7 +670,7 @@ k8_allocate_pmc(enum pmc_event pe, char *ctrspec,
#endif
#if defined(__i386__)
#if defined(__amd64__) || defined(__i386__)
/*
* Intel P4 PMCs
@ -1283,6 +1283,10 @@ p4_allocate_pmc(enum pmc_event pe, char *ctrspec,
return 0;
}
#endif
#if defined(__i386__)
/*
* Pentium style PMCs
*/
@ -1950,11 +1954,12 @@ pmc_init(void)
pmc_mdep_event_aliases = p6_aliases;
pmc_mdep_allocate_pmc = p6_allocate_pmc;
break;
#endif
#if defined(__amd64__) || defined(__i386__)
case PMC_CPU_INTEL_PIV:
pmc_mdep_event_aliases = p4_aliases;
pmc_mdep_allocate_pmc = p4_allocate_pmc;
break;
#elif defined(__amd64__)
case PMC_CPU_AMD_K8:
pmc_mdep_event_aliases = k8_aliases;
pmc_mdep_allocate_pmc = k8_allocate_pmc;

2
sys/dev/hwpmc/hwpmc_x86.c
View File

@ -91,7 +91,7 @@ pmc_intel_initialize(void)
#if defined(__i386__) || defined(__amd64__)
case 0xF00: /* P4 */
model = ((cpu_id & 0xF0000) >> 12) | ((cpu_id & 0xF0) >> 4);
if (model >= 0 && model <= 3) /* known models */
if (model >= 0 && model <= 4) /* known models */
cputype = PMC_CPU_INTEL_PIV;
break;
}