readelf: Add support for RISC-V specific e_flags
Reviewed by: markj Approved by: markj (mentor) MFC after: 3 days Differential Revision: https://reviews.freebsd.org/D20767
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@ -33,7 +33,7 @@
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* See: http://www.sco.com/developers/gabi/latest/ch4.intro.html
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* - The May 1998 (version 1.5) draft of "The ELF-64 object format".
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* - Processor-specific ELF ABI definitions for sparc, i386, amd64, mips,
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* ia64, and powerpc processors.
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* ia64, powerpc, and RISC-V processors.
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* - The "Linkers and Libraries Guide", from Sun Microsystems.
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*/
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@ -426,6 +426,22 @@ _ELF_DEFINE_EF(EF_PPC_RELOCATABLE, 0x00010000UL, \
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"-mrelocatable flag") \
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_ELF_DEFINE_EF(EF_PPC_RELOCATABLE_LIB, 0x00008000UL, \
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"-mrelocatable-lib flag") \
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_ELF_DEFINE_EF(EF_RISCV_RVC, 0x00000001UL, \
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"Compressed instruction extension") \
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_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_MASK, 0x00000006UL, \
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"Floating point ABI") \
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_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_SOFT, 0x00000000UL, \
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"Software emulated floating point") \
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_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_SINGLE, 0x00000002UL, \
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"Single precision floating point") \
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_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_DOUBLE, 0x00000004UL, \
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"Double precision floating point") \
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_ELF_DEFINE_EF(EF_RISCV_FLOAT_ABI_QUAD, 0x00000006UL, \
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"Quad precision floating point") \
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_ELF_DEFINE_EF(EF_RISCV_RVE, 0x00000008UL, \
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"Compressed instruction ABI") \
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_ELF_DEFINE_EF(EF_RISCV_TSO, 0x00000010UL, \
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"RVTSO memory consistency model") \
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_ELF_DEFINE_EF(EF_SPARC_EXT_MASK, 0x00ffff00UL, \
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"Vendor Extension mask") \
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_ELF_DEFINE_EF(EF_SPARC_32PLUS, 0x00000100UL, \
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@ -431,6 +431,13 @@ static struct eflags_desc powerpc_eflags_desc[] = {
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{0, NULL}
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};
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static struct eflags_desc riscv_eflags_desc[] = {
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{EF_RISCV_RVC, "RVC"},
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{EF_RISCV_RVE, "RVE"},
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{EF_RISCV_TSO, "TSO"},
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{0, NULL}
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};
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static struct eflags_desc sparc_eflags_desc[] = {
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{EF_SPARC_32PLUS, "v8+"},
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{EF_SPARC_SUN_US1, "ultrasparcI"},
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@ -2294,6 +2301,23 @@ dump_eflags(struct readelf *re, uint64_t e_flags)
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case EM_PPC64:
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edesc = powerpc_eflags_desc;
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break;
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case EM_RISCV:
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switch (e_flags & EF_RISCV_FLOAT_ABI_MASK) {
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case EF_RISCV_FLOAT_ABI_SOFT:
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printf(", soft-float ABI");
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break;
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case EF_RISCV_FLOAT_ABI_SINGLE:
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printf(", single-float ABI");
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break;
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case EF_RISCV_FLOAT_ABI_DOUBLE:
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printf(", double-float ABI");
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break;
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case EF_RISCV_FLOAT_ABI_QUAD:
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printf(", quad-float ABI");
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break;
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}
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edesc = riscv_eflags_desc;
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break;
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case EM_SPARC:
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case EM_SPARC32PLUS:
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case EM_SPARCV9:
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