From 87ca4fd49006199ab99b93b5f31a3a9909f7c46b Mon Sep 17 00:00:00 2001
From: "David E. O'Brien" <obrien@FreeBSD.org>
Date: Fri, 27 Dec 1996 07:14:11 +0000
Subject: [PATCH] Added "ie. 430FX" for Triton and "ie. 430HX" for Triton-II. 
 (this is correct, right?  also, does anyone know what the 430VX 
 chipset used in the ASUS P55TVP4 is?) Intel's URL for the VS440FX has
 changed.

---
 share/doc/handbook/hw.sgml | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/share/doc/handbook/hw.sgml b/share/doc/handbook/hw.sgml
index 7af8cf1b0d2d..e740f93171ad 100644
--- a/share/doc/handbook/hw.sgml
+++ b/share/doc/handbook/hw.sgml
@@ -1,4 +1,4 @@
-<!-- $Id: hw.sgml,v 1.53 1996/12/10 07:11:57 max Exp $ -->
+<!-- $Id: hw.sgml,v 1.54 1996/12/26 05:56:20 jkh Exp $ -->
 <!-- The FreeBSD Documentation Project -->
 
 <!--
@@ -290,15 +290,22 @@ Slippery when wet.  Beware of dog.
 		of course Intel's official answer, move to the
 		Triton chip set, we ``fixed it there''.
 
-	      <tag>Triton:</tag> No known cache coherency or bus
+	      <tag>Triton <em>(ie, 430FX)</em>:</tag>
+	        No known cache coherency or bus
 		master problems, chip set does not implement
 		parity checking.  Workaround for parity issue.
 		Use Triton-II based motherboards if you have the choice.
 
-	      <tag>Triton-II:</tag> All reports on motherboards using
-		this chipset have been favorable so far.  No known
-		problems.
-
+	      <tag>Triton-II <em>(ie, 430HX)</em>:</tag>
+	        All reports on motherboards using
+		this chipset have been favorable so far.  Although, some
+		have said that if you are using ECC memory, be sure to get a
+		motherboard with the A2 or later steppings of the 82439HX
+		Triton-II chipset.  Don't get this confused with the 82371SB
+		stepping - you have an A2 stepping if the 82439HX chip has a
+		marking of "SU102".  You have an A1 stepping if it's not
+		marked with an S-number or if the number is "SU087".
+		
 	      <tag>Orion:</tag> Early versions of this chipset suffered from
 	 	a PCI write-posting bug which can cause noticeable performance
 		degradation in applications where large amounts of PCI bus
@@ -306,7 +313,7 @@ Slippery when wet.  Beware of dog.
 		chipset fixed this problem.
 
 	      <tag><htmlurl
-	      url="http://www-cs.intel.com/oem_developer/motherbd/vs_index.htm" 
+	      url="http://www.intel.com/design/motherbd/vs/index.htm"
 	      name="VS440FX">:</tag>This <htmlurl
 	      url="http://www.intel.com/procs/ppro/intro/index.htm"
 	      name="Pentium Pro"> support chipset seems to work well,