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Update with latest ATA/ATAPI ver 6 rev 2 items.

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This commit is contained in:
Søren Schmidt 2001-10-06 11:07:04 +00:00
parent 300634ffe0
commit 8975eded26
8 changed files with 396 additions and 358 deletions
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179
sys/dev/ata/ata-all.c
View File

@ -76,7 +76,6 @@ static void ata_boot_attach(void);
static void ata_intr(void *);
static int ata_getparam(struct ata_softc *, int, u_int8_t);
static int ata_service(struct ata_softc *);
static char *active2str(int);
static void bswap(int8_t *, int);
static void btrim(int8_t *, int);
static void bpack(int8_t *, int8_t *, int);
@ -459,7 +458,7 @@ ata_getparam(struct ata_softc *scp, int device, u_int8_t command)
/* apparently some devices needs this repeated */
do {
if (ata_command(scp, device, command, 0, 0, 0, 0, 0, ATA_WAIT_INTR)) {
if (ata_command(scp, device, command, 0, 0, 0, ATA_WAIT_INTR)) {
ata_printf(scp, device, "%s identify failed\n",
command == ATA_C_ATAPI_IDENTIFY ? "ATAPI" : "ATA");
return -1;
@ -619,8 +618,9 @@ ata_intr(void *data)
static int intr_count = 0;
if (intr_count++ < 10)
ata_printf(scp, -1, "unwanted interrupt %d %sstatus = %02x\n",
intr_count, active2str(scp->active), scp->status);
ata_printf(scp, -1,
"unwanted interrupt #%d active=0x%x status=0x%02x\n",
intr_count, scp->active, scp->status);
}
#endif
}
@ -960,46 +960,22 @@ ata_wait(struct ata_softc *scp, int device, u_int8_t mask)
int
ata_command(struct ata_softc *scp, int device, u_int8_t command,
u_int16_t cylinder, u_int8_t head, u_int8_t sector,
u_int8_t count, u_int8_t feature, int flags)
u_int64_t lba, u_int16_t count, u_int8_t feature, int flags)
{
int error = 0;
#ifdef ATA_DEBUG
ata_printf(scp, device, "ata_command: addr=%04x, cmd=%02x, "
"c=%d, h=%d, s=%d, count=%d, feature=%d, flags=%02x\n",
rman_get_start(scp->r_io), command, cylinder, head, sector,
count, feature, flags);
/* sanity checks */
switch(scp->active) {
case ATA_IDLE:
break;
case ATA_CONTROL:
if (flags == ATA_WAIT_INTR || flags == ATA_WAIT_READY)
break;
goto out;
case ATA_ACTIVE_ATA:
case ATA_ACTIVE_ATAPI:
if (flags == ATA_IMMEDIATE)
break;
default:
out:
printf("ata_command called %s flags=%s cmd=%02x\n",
active2str(scp->active), active2str(flags), command);
break;
}
ata_printf(scp, device, "ata_command: addr=%04lx, cmd=%02x, "
"lba=%lld, count=%d, feature=%d, flags=%02x\n",
rman_get_start(scp->r_io), command, lba, count, feature, flags);
#endif
/* select device */
ATA_OUTB(scp->r_io, ATA_DRIVE, ATA_D_IBM | device);
/* disable interrupt from device */
if (scp->flags & ATA_QUEUED)
ATA_OUTB(scp->r_altio, ATA_ALTSTAT, ATA_A_IDS | ATA_A_4BIT);
/* select device */
ATA_OUTB(scp->r_io, ATA_DRIVE, ATA_D_IBM | device);
/* ready to issue command ? */
if (ata_wait(scp, device, 0) < 0) {
ata_printf(scp, device,
@ -1008,14 +984,69 @@ ata_command(struct ata_softc *scp, int device, u_int8_t command,
return -1;
}
ATA_OUTB(scp->r_io, ATA_FEATURE, feature);
ATA_OUTB(scp->r_io, ATA_COUNT, count);
ATA_OUTB(scp->r_io, ATA_SECTOR, sector);
ATA_OUTB(scp->r_io, ATA_CYL_MSB, cylinder >> 8);
ATA_OUTB(scp->r_io, ATA_CYL_LSB, cylinder);
ATA_OUTB(scp->r_io, ATA_DRIVE, ATA_D_IBM | device | head);
/* only use 48bit addressing if needed because of the overhead */
if ((lba > 268435455 || count > 256) &&
scp->dev_param[ATA_DEV(device)]->support.address48) {
ATA_OUTB(scp->r_io, ATA_FEATURE, (feature>>8) & 0xff);
ATA_OUTB(scp->r_io, ATA_FEATURE, feature);
ATA_OUTB(scp->r_io, ATA_COUNT, (count>>8) & 0xff);
ATA_OUTB(scp->r_io, ATA_COUNT, count & 0xff);
ATA_OUTB(scp->r_io, ATA_SECTOR, (lba>>24) & 0xff);
ATA_OUTB(scp->r_io, ATA_SECTOR, lba & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_LSB, (lba<<32) & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_LSB, (lba>>8) & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_MSB, (lba>>40) & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_MSB, (lba>>16) & 0xff);
ATA_OUTB(scp->r_io, ATA_DRIVE, ATA_D_LBA | device);
/* translate command into 48bit version */
switch (command) {
case ATA_C_READ:
command = ATA_C_READ48; break;
case ATA_C_READ_MUL:
command = ATA_C_READ_MUL48; break;
case ATA_C_READ_DMA:
command = ATA_C_READ_DMA48; break;
case ATA_C_READ_DMA_QUEUED:
command = ATA_C_READ_DMA_QUEUED48; break;
case ATA_C_WRITE:
command = ATA_C_WRITE48; break;
case ATA_C_WRITE_MUL:
command = ATA_C_WRITE_MUL48; break;
case ATA_C_WRITE_DMA:
command = ATA_C_WRITE_DMA48; break;
case ATA_C_WRITE_DMA_QUEUED:
command = ATA_C_WRITE_DMA_QUEUED48; break;
case ATA_C_FLUSHCACHE:
command = ATA_C_FLUSHCACHE48; break;
default:
ata_printf(scp, device, "can't translate cmd to 48bit version\n");
return -1;
}
}
else {
ATA_OUTB(scp->r_io, ATA_FEATURE, feature);
ATA_OUTB(scp->r_io, ATA_COUNT, count);
ATA_OUTB(scp->r_io, ATA_SECTOR, lba & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_LSB, (lba>>8) & 0xff);
ATA_OUTB(scp->r_io, ATA_CYL_MSB, (lba>>16) & 0xff);
if (flags & ATA_USE_CHS)
ATA_OUTB(scp->r_io, ATA_DRIVE,
ATA_D_IBM | device | ((lba>>24) & 0xf));
else
ATA_OUTB(scp->r_io, ATA_DRIVE,
ATA_D_IBM | ATA_D_LBA | device | ((lba>>24) & 0xf));
}
switch (flags & ATA_WAIT_MASK) {
case ATA_IMMEDIATE:
ATA_OUTB(scp->r_io, ATA_CMD, command);
/* enable interrupt */
if (scp->flags & ATA_QUEUED)
ATA_OUTB(scp->r_altio, ATA_ALTSTAT, ATA_A_4BIT);
break;
switch (flags) {
case ATA_WAIT_INTR:
scp->active |= ATA_WAIT_INTR;
ATA_OUTB(scp->r_io, ATA_CMD, command);
@ -1042,18 +1073,7 @@ ata_command(struct ata_softc *scp, int device, u_int8_t command,
}
scp->active &= ~ATA_WAIT_READY;
break;
case ATA_IMMEDIATE:
ATA_OUTB(scp->r_io, ATA_CMD, command);
break;
default:
ata_printf(scp, device, "DANGER: illegal interrupt flag=%s\n",
active2str(flags));
}
/* enable interrupt */
if (scp->flags & ATA_QUEUED)
ATA_OUTB(scp->r_altio, ATA_ALTSTAT, ATA_A_4BIT);
return error;
}
@ -1129,24 +1149,12 @@ ata_mode2str(int mode)
case ATA_UDMA2: return "UDMA33";
case ATA_UDMA4: return "UDMA66";
case ATA_UDMA5: return "UDMA100";
case ATA_UDMA6: return "UDMA133";
case ATA_DMA: return "BIOSDMA";
default: return "???";
}
}
int
ata_pio2mode(int pio)
{
switch (pio) {
default:
case 0: return ATA_PIO0;
case 1: return ATA_PIO1;
case 2: return ATA_PIO2;
case 3: return ATA_PIO3;
case 4: return ATA_PIO4;
}
}
int
ata_pmode(struct ata_params *ap)
{
@ -1156,11 +1164,11 @@ ata_pmode(struct ata_params *ap)
if (ap->apiomodes & 1)
return 3;
}
if (ap->opiomode == 2)
if (ap->retired_piomode == 2)
return 2;
if (ap->opiomode == 1)
if (ap->retired_piomode == 1)
return 1;
if (ap->opiomode == 0)
if (ap->retired_piomode == 0)
return 0;
return -1;
}
@ -1168,11 +1176,11 @@ ata_pmode(struct ata_params *ap)
int
ata_wmode(struct ata_params *ap)
{
if (ap->wdmamodes & 4)
if (ap->mwdmamodes & 0x04)
return 2;
if (ap->wdmamodes & 2)
if (ap->mwdmamodes & 0x02)
return 1;
if (ap->wdmamodes & 1)
if (ap->mwdmamodes & 0x01)
return 0;
return -1;
}
@ -1181,6 +1189,8 @@ int
ata_umode(struct ata_params *ap)
{
if (ap->atavalid & ATA_FLAG_88) {
if (ap->udmamodes & 0x40)
return 6;
if (ap->udmamodes & 0x20)
return 5;
if (ap->udmamodes & 0x10)
@ -1197,31 +1207,6 @@ ata_umode(struct ata_params *ap)
return -1;
}
static char *
active2str(int active)
{
static char buf[64];
bzero(buf, sizeof(buf));
if (active & ATA_IDLE)
strcat(buf, "ATA_IDLE ");
if (active & ATA_IMMEDIATE)
strcat(buf, "ATA_IMMEDIATE ");
if (active & ATA_WAIT_INTR)
strcat(buf, "ATA_WAIT_INTR ");
if (active & ATA_WAIT_READY)
strcat(buf, "ATA_WAIT_READY ");
if (active & ATA_ACTIVE)
strcat(buf, "ATA_ACTIVE ");
if (active & ATA_ACTIVE_ATA)
strcat(buf, "ATA_ACTIVE_ATA ");
if (active & ATA_ACTIVE_ATAPI)
strcat(buf, "ATA_ACTIVE_ATAPI ");
if (active & ATA_CONTROL)
strcat(buf, "ATA_CONTROL ");
return buf;
}
static void
bswap(int8_t *buf, int len)
{

55
sys/dev/ata/ata-all.h
View File

@ -63,7 +63,15 @@
#define ATA_C_F_AUTOPOLL 0x01 /* start autopoll function */
#define ATA_C_ATAPI_RESET 0x08 /* reset ATAPI device */
#define ATA_C_READ 0x20 /* read command */
#define ATA_C_READ48 0x24 /* read command */
#define ATA_C_READ_DMA48 0x25 /* read w/DMA command */
#define ATA_C_READ_DMA_QUEUED48 0x26 /* read w/DMA QUEUED command */
#define ATA_C_READ_MUL48 0x29 /* read multi command */
#define ATA_C_WRITE 0x30 /* write command */
#define ATA_C_WRITE48 0x34 /* write command */
#define ATA_C_WRITE_DMA48 0x35 /* write w/DMA command */
#define ATA_C_WRITE_DMA_QUEUED48 0x36 /* write w/DMA QUEUED command */
#define ATA_C_WRITE_MUL48 0x39 /* write multi command */
#define ATA_C_PACKET_CMD 0xa0 /* packet command */
#define ATA_C_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/
#define ATA_C_SERVICE 0xa2 /* service command */
@ -76,6 +84,7 @@
#define ATA_C_WRITE_DMA_QUEUED 0xcc /* write w/DMA QUEUED command */
#define ATA_C_SLEEP 0xe6 /* sleep command */
#define ATA_C_FLUSHCACHE 0xe7 /* flush cache to disk */
#define ATA_C_FLUSHCACHE48 0xea /* flush cache to disk */
#define ATA_C_ATA_IDENTIFY 0xec /* get ATA params */
#define ATA_C_SETFEATURES 0xef /* features command */
#define ATA_C_F_SETXFER 0x03 /* set transfer mode */
@ -130,28 +139,27 @@
#define ATA_DMA_EOT 0x80000000
#define ATA_BMCMD_PORT 0x00
#define ATA_BMCMD_START_STOP 0x01
#define ATA_BMCMD_WRITE_READ 0x08
#define ATA_BMCMD_START_STOP 0x01
#define ATA_BMCMD_WRITE_READ 0x08
#define ATA_BMDEVSPEC_0 0x01
#define ATA_BMSTAT_PORT 0x02
#define ATA_BMSTAT_ACTIVE 0x01
#define ATA_BMSTAT_ERROR 0x02
#define ATA_BMSTAT_INTERRUPT 0x04
#define ATA_BMSTAT_MASK 0x07
#define ATA_BMSTAT_DMA_MASTER 0x20
#define ATA_BMSTAT_DMA_SLAVE 0x40
#define ATA_BMSTAT_DMA_SIMPLEX 0x80
#define ATA_BMSTAT_ACTIVE 0x01
#define ATA_BMSTAT_ERROR 0x02
#define ATA_BMSTAT_INTERRUPT 0x04
#define ATA_BMSTAT_MASK 0x07
#define ATA_BMSTAT_DMA_MASTER 0x20
#define ATA_BMSTAT_DMA_SLAVE 0x40
#define ATA_BMSTAT_DMA_SIMPLEX 0x80
#define ATA_BMDEVSPEC_1 0x03
#define ATA_BMDTP_PORT 0x04
/* structure for holding DMA address data */
struct ata_dmaentry {
u_int32_t base;
u_int32_t count;
u_int32_t base;
u_int32_t count;
};
/* structure describing an ATA device */
@ -171,11 +179,11 @@ struct ata_softc {
void *dev_softc[2]; /* ptr to devices softc's */
int mode[2]; /* transfer mode for devices */
int flags; /* controller flags */
#define ATA_DMA_ACTIVE 0x01
#define ATA_ATAPI_DMA_RO 0x02
#define ATA_USE_16BIT 0x04
#define ATA_NO_SLAVE 0x08
#define ATA_QUEUED 0x10
#define ATA_NO_SLAVE 0x01
#define ATA_USE_16BIT 0x02
#define ATA_ATAPI_DMA_RO 0x04
#define ATA_QUEUED 0x08
#define ATA_DMA_ACTIVE 0x10
int devices; /* what is present */
#define ATA_ATA_MASTER 0x01
@ -190,10 +198,12 @@ struct ata_softc {
#define ATA_IMMEDIATE 0x0001
#define ATA_WAIT_INTR 0x0002
#define ATA_WAIT_READY 0x0004
#define ATA_ACTIVE 0x0008
#define ATA_ACTIVE_ATA 0x0010
#define ATA_ACTIVE_ATAPI 0x0020
#define ATA_CONTROL 0x0040
#define ATA_WAIT_MASK 0x0007
#define ATA_USE_CHS 0x0008
#define ATA_ACTIVE 0x0010
#define ATA_ACTIVE_ATA 0x0020
#define ATA_ACTIVE_ATAPI 0x0040
#define ATA_CONTROL 0x0080
TAILQ_HEAD(, ad_request) ata_queue; /* head of ATA queue */
TAILQ_HEAD(, atapi_request) atapi_queue; /* head of ATAPI queue */
@ -213,7 +223,7 @@ void ata_start(struct ata_softc *);
void ata_reset(struct ata_softc *);
int ata_reinit(struct ata_softc *);
int ata_wait(struct ata_softc *, int, u_int8_t);
int ata_command(struct ata_softc *, int, u_int8_t, u_int16_t, u_int8_t, u_int8_t, u_int8_t, u_int8_t, int);
int ata_command(struct ata_softc *, int, u_int8_t, u_int64_t, u_int16_t, u_int8_t, int);
int ata_printf(struct ata_softc *, int, const char *, ...) __printflike(3, 4);
void ata_set_name(struct ata_softc *, int, char *, int);
void ata_free_name(struct ata_softc *, int);
@ -221,7 +231,6 @@ int ata_get_lun(u_int32_t *);
int ata_test_lun(u_int32_t *, int);
void ata_free_lun(u_int32_t *, int);
char *ata_mode2str(int);
int ata_pio2mode(int);
int ata_pmode(struct ata_params *);
int ata_wmode(struct ata_params *);
int ata_umode(struct ata_params *);

118
sys/dev/ata/ata-disk.c
View File

@ -111,7 +111,6 @@ ad_attach(struct ata_softc *scp, int device)
{
struct ad_softc *adp;
dev_t dev;
int secsperint;
if (!(adp = malloc(sizeof(struct ad_softc), M_AD, M_NOWAIT | M_ZERO))) {
ata_printf(scp, device, "failed to allocate driver storage\n");
@ -128,37 +127,45 @@ ad_attach(struct ata_softc *scp, int device)
adp->heads = AD_PARAM->heads;
adp->sectors = AD_PARAM->sectors;
adp->total_secs = AD_PARAM->cylinders * adp->heads * adp->sectors;
if (AD_PARAM->cylinders == 16383 && adp->total_secs < AD_PARAM->lbasize)
adp->total_secs = AD_PARAM->lbasize;
if (ad_version(AD_PARAM->versmajor) &&
AD_PARAM->atavalid & ATA_FLAG_54_58 && AD_PARAM->lbasize)
adp->flags |= AD_F_LBA_ENABLED;
/* does this device need oldstyle CHS addressing */
if (!ad_version(AD_PARAM->version_major) ||
!(AD_PARAM->atavalid & ATA_FLAG_54_58) || !AD_PARAM->lba_size)
adp->flags |= AD_F_CHS_USED;
/* use the 28bit LBA size if valid */
if (AD_PARAM->cylinders == 16383 && adp->total_secs < AD_PARAM->lba_size)
adp->total_secs = AD_PARAM->lba_size;
/* use the 48bit LBA size if valid */
if (AD_PARAM->support.address48)
adp->total_secs = AD_PARAM->lba_size48;
/* use multiple sectors/interrupt if device supports it */
adp->transfersize = DEV_BSIZE;
if (ad_version(AD_PARAM->versmajor)) {
secsperint = max(1, min(AD_PARAM->nsecperint, 16));
if (ad_version(AD_PARAM->version_major)) {
int secsperint = max(1, min(AD_PARAM->sectors_intr, 16));
if (!ata_command(adp->controller, adp->unit, ATA_C_SET_MULTI,
0, 0, 0, secsperint, 0, ATA_WAIT_INTR) &&
0, secsperint, 0, ATA_WAIT_INTR) &&
!ata_wait(adp->controller, adp->unit, 0))
adp->transfersize *= secsperint;
}
/* enable read cacheing if not default on device */
if (ata_command(adp->controller, adp->unit, ATA_C_SETFEATURES,
0, 0, 0, 0, ATA_C_F_ENAB_RCACHE, ATA_WAIT_INTR))
0, 0, ATA_C_F_ENAB_RCACHE, ATA_WAIT_INTR))
ata_printf(scp, device, "enabling readahead cache failed\n");
/* enable write cacheing if allowed and not default on device */
if (ata_wc || ata_tags) {
if (ata_command(adp->controller, adp->unit, ATA_C_SETFEATURES,
0, 0, 0, 0, ATA_C_F_ENAB_WCACHE, ATA_WAIT_INTR))
0, 0, ATA_C_F_ENAB_WCACHE, ATA_WAIT_INTR))
ata_printf(scp, device, "enabling write cache failed\n");
}
else {
if (ata_command(adp->controller, adp->unit, ATA_C_SETFEATURES,
0, 0, 0, 0, ATA_C_F_DIS_WCACHE, ATA_WAIT_INTR))
0, 0, ATA_C_F_DIS_WCACHE, ATA_WAIT_INTR))
ata_printf(scp, device, "disabling write cache failed\n");
}
@ -175,10 +182,10 @@ ad_attach(struct ata_softc *scp, int device)
adp->flags |= AD_F_TAG_ENABLED;
adp->controller->flags |= ATA_QUEUED;
if (ata_command(adp->controller, adp->unit, ATA_C_SETFEATURES,
0, 0, 0, 0, ATA_C_F_DIS_RELIRQ, ATA_WAIT_INTR))
0, 0, ATA_C_F_DIS_RELIRQ, ATA_WAIT_INTR))
ata_printf(scp, device, "disabling release interrupt failed\n");
if (ata_command(adp->controller, adp->unit, ATA_C_SETFEATURES,
0, 0, 0, 0, ATA_C_F_DIS_SRVIRQ, ATA_WAIT_INTR))
0, 0, ATA_C_F_DIS_SRVIRQ, ATA_WAIT_INTR))
ata_printf(scp, device, "disabling service interrupt failed\n");
}
@ -240,7 +247,7 @@ ad_detach(struct ad_softc *adp, int flush)
devstat_remove_entry(&adp->stats);
if (flush) {
if (ata_command(adp->controller, adp->unit, ATA_C_FLUSHCACHE,
0, 0, 0, 0, 0, ATA_WAIT_READY))
0, 0, 0, ATA_WAIT_READY))
ata_printf(adp->controller, adp->unit,
"flushing cache on detach failed\n");
}
@ -265,7 +272,7 @@ adclose(dev_t dev, int flags, int fmt, struct thread *td)
struct ad_softc *adp = dev->si_drv1;
if (ata_command(adp->controller, adp->unit, ATA_C_FLUSHCACHE,
0, 0, 0, 0, 0, ATA_WAIT_READY))
0, 0, 0, ATA_WAIT_READY))
ata_printf(adp->controller, adp->unit,
"flushing cache on close failed\n");
return 0;
@ -417,14 +424,16 @@ int
ad_transfer(struct ad_request *request)
{
struct ad_softc *adp;
u_int32_t blkno, secsprcyl;
u_int32_t cylinder, head, sector, count, cmd;
u_int64_t lba;
u_int32_t count, max_count;
u_int8_t cmd;
int flags = ATA_IMMEDIATE;
/* get request params */
adp = request->device;
/* calculate transfer details */
blkno = request->blockaddr + (request->donecount / DEV_BSIZE);
lba = request->blockaddr + (request->donecount / DEV_BSIZE);
if (request->donecount == 0) {
@ -435,24 +444,22 @@ ad_transfer(struct ad_request *request)
request->timeout_handle =
timeout((timeout_t*)ad_timeout, request, 10 * hz);
/* setup transfer parameters */
/* setup transfer parameters !! 65536 for 48bit SOS XXX */
count = howmany(request->bytecount, DEV_BSIZE);
if (count > 256) {
count = 256;
max_count = AD_PARAM->support.address48 ? 65536 : 256;
if (count > max_count) {
ata_printf(adp->controller, adp->unit,
"count %d size transfers not supported\n", count);
count = max_count;
}
if (adp->flags & AD_F_LBA_ENABLED) {
sector = (blkno >> 0) & 0xff;
cylinder = (blkno >> 8) & 0xffff;
head = ((blkno >> 24) & 0xf) | ATA_D_LBA;
}
else {
secsprcyl = adp->sectors * adp->heads;
cylinder = blkno / secsprcyl;
head = (blkno % secsprcyl) / adp->sectors;
sector = (blkno % adp->sectors) + 1;
if (adp->flags & AD_F_CHS_USED) {
int sector = (lba % adp->sectors) + 1;
int cylinder = lba / (adp->sectors * adp->heads);
int head = (lba % (adp->sectors * adp->heads)) / adp->sectors;
lba = (sector&0xff) | ((cylinder&0xffff)<<8) | ((head&0xf)<<24);
flags |= ATA_USE_CHS;
}
/* setup first transfer length */
@ -473,9 +480,8 @@ ad_transfer(struct ad_request *request)
cmd = (request->flags & ADR_F_READ) ?
ATA_C_READ_DMA_QUEUED : ATA_C_WRITE_DMA_QUEUED;
if (ata_command(adp->controller, adp->unit, cmd,
cylinder, head, sector, request->tag << 3,
count, ATA_IMMEDIATE)) {
if (ata_command(adp->controller, adp->unit, cmd, lba,
request->tag << 3, count, flags)) {
ata_printf(adp->controller, adp->unit,
"error executing command");
goto transfer_failed;
@ -489,16 +495,15 @@ ad_transfer(struct ad_request *request)
/* if ATA bus RELEASE check for SERVICE */
if (adp->flags & AD_F_TAG_ENABLED &&
ATA_INB(adp->controller->r_io, ATA_IREASON) & ATA_I_RELEASE) {
ATA_INB(adp->controller->r_io, ATA_IREASON) & ATA_I_RELEASE)
return ad_service(adp, 1);
}
}
else {
cmd = (request->flags & ADR_F_READ) ?
ATA_C_READ_DMA : ATA_C_WRITE_DMA;
if (ata_command(adp->controller, adp->unit, cmd, cylinder,
head, sector, count, 0, ATA_IMMEDIATE)) {
if (ata_command(adp->controller, adp->unit,
cmd, lba, count, 0, flags)) {
ata_printf(adp->controller, adp->unit,
"error executing command");
goto transfer_failed;
@ -512,8 +517,8 @@ ad_transfer(struct ad_request *request)
* thats probably why tags doesn't work on the promise
* as this is needed there...
*/
if (ata_wait(adp->controller, adp->unit,
ATA_S_READY | ATA_S_DRQ)) {
if (ata_wait(adp->controller, adp->unit,
ATA_S_READY | ATA_S_DRQ)) {
ata_printf(adp->controller, adp->unit,
"timeout waiting for data phase\n");
goto transfer_failed;
@ -535,8 +540,7 @@ ad_transfer(struct ad_request *request)
else
cmd = request->flags&ADR_F_READ ? ATA_C_READ : ATA_C_WRITE;
if (ata_command(adp->controller, adp->unit, cmd,
cylinder, head, sector, count, 0, ATA_IMMEDIATE)) {
if (ata_command(adp->controller, adp->unit, cmd, lba, count, 0, flags)){
ata_printf(adp->controller, adp->unit, "error executing command");
goto transfer_failed;
}
@ -559,12 +563,12 @@ ad_transfer(struct ad_request *request)
/* output the data */
if (adp->controller->flags & ATA_USE_16BIT)
ATA_OUTSW(adp->controller->r_io, ATA_DATA,
(void *)((uintptr_t)request->data + request->donecount),
request->currentsize / sizeof(int16_t));
(void *)((uintptr_t)request->data + request->donecount),
request->currentsize / sizeof(int16_t));
else
ATA_OUTSL(adp->controller->r_io, ATA_DATA,
(void *)((uintptr_t)request->data + request->donecount),
request->currentsize / sizeof(int32_t));
(void *)((uintptr_t)request->data + request->donecount),
request->currentsize / sizeof(int32_t));
return ATA_OP_CONTINUES;
transfer_failed:
@ -707,7 +711,7 @@ ad_interrupt(struct ad_request *request)
if (request->bp->bio_flags & BIO_ORDERED) {
request->flags |= ADR_F_FLUSHCACHE;
if (ata_command(adp->controller, adp->unit, ATA_C_FLUSHCACHE,
0, 0, 0, 0, 0, ATA_IMMEDIATE))
0, 0, 0, ATA_IMMEDIATE))
ata_printf(adp->controller, adp->unit, "flushing cache failed\n");
else
return ATA_OP_CONTINUES;
@ -771,7 +775,7 @@ ad_service(struct ad_softc *adp, int change)
/* issue SERVICE cmd */
if (ata_command(adp->controller, adp->unit, ATA_C_SERVICE,
0, 0, 0, 0, 0, ATA_IMMEDIATE)) {
0, 0, 0, ATA_IMMEDIATE)) {
ata_printf(adp->controller, adp->unit,
"problem executing SERVICE cmd\n");
ad_invalidatequeue(adp, NULL);
@ -844,7 +848,7 @@ ad_invalidatequeue(struct ad_softc *adp, struct ad_request *request)
TAILQ_INSERT_HEAD(&adp->controller->ata_queue, tmpreq, chain);
}
if (ata_command(adp->controller, adp->unit, ATA_C_NOP,
0, 0, 0, 0, ATA_C_F_FLUSHQUEUE, ATA_WAIT_READY))
0, 0, ATA_C_F_FLUSHQUEUE, ATA_WAIT_READY))
ata_printf(adp->controller, adp->unit, "flush queue failed\n");
adp->outstanding = 0;
}
@ -866,7 +870,7 @@ ad_tagsupported(struct ad_softc *adp)
/* check that drive does DMA, has tags enabled, and is one we know works */
if (adp->controller->mode[ATA_DEV(adp->unit)] >= ATA_DMA &&
AD_PARAM->supqueued && AD_PARAM->enabqueued) {
AD_PARAM->support.queued && AD_PARAM->enabled.queued) {
while (drives[i] != NULL) {
if (!strncmp(AD_PARAM->model, drives[i], strlen(drives[i])))
return 1;
@ -929,7 +933,7 @@ ad_reinit(struct ad_softc *adp)
{
/* reinit disk parameters */
ad_invalidatequeue(adp, NULL);
ata_command(adp->controller, adp->unit, ATA_C_SET_MULTI, 0, 0, 0,
ata_command(adp->controller, adp->unit, ATA_C_SET_MULTI, 0,
adp->transfersize / DEV_BSIZE, 0, ATA_WAIT_INTR);
if (adp->controller->mode[ATA_DEV(adp->unit)] >= ATA_DMA)
ata_dmainit(adp->controller, adp->unit, ata_pmode(AD_PARAM),
@ -946,13 +950,13 @@ ad_print(struct ad_softc *adp, char *prepend)
ata_printf(adp->controller, adp->unit,
"<%.40s/%.8s> ATA-%d disk at ata%d-%s\n",
AD_PARAM->model, AD_PARAM->revision,
ad_version(AD_PARAM->versmajor),
ad_version(AD_PARAM->version_major),
device_get_unit(adp->controller->dev),
(adp->unit == ATA_MASTER) ? "master" : "slave");
if (prepend) printf("%s", prepend);
ata_printf(adp->controller, adp->unit,
"%luMB (%u sectors), %u C, %u H, %u S, %u B\n",
"%lluMB (%llu sectors), %llu C, %u H, %u S, %u B\n",
adp->total_secs / ((1024L*1024L)/DEV_BSIZE), adp->total_secs,
adp->total_secs / (adp->heads * adp->sectors),
adp->heads, adp->sectors, DEV_BSIZE);
@ -968,12 +972,12 @@ ad_print(struct ad_softc *adp, char *prepend)
ata_printf(adp->controller, adp->unit,
"piomode=%d dmamode=%d udmamode=%d cblid=%d\n",
ata_pmode(AD_PARAM), ata_wmode(AD_PARAM),
ata_umode(AD_PARAM), AD_PARAM->cblid);
ata_umode(AD_PARAM), AD_PARAM->hwres_cblid);
}
else
ata_printf(adp->controller, adp->unit,
"%luMB <%.40s> [%d/%d/%d] at ata%d-%s %s%s\n",
"%lluMB <%.40s> [%lld/%d/%d] at ata%d-%s %s%s\n",
adp->total_secs / ((1024L * 1024L) / DEV_BSIZE),
AD_PARAM->model, adp->total_secs / (adp->heads*adp->sectors),
adp->heads, adp->sectors,

4
sys/dev/ata/ata-disk.h
View File

@ -58,7 +58,7 @@ struct ad_softc {
struct ata_softc *controller; /* ptr to parent ctrl */
int unit; /* ATA_MASTER or ATA_SLAVE */
int lun; /* logical unit number */
u_int32_t total_secs; /* total # of sectors (LBA) */
u_int64_t total_secs; /* total # of sectors (LBA) */
u_int8_t heads;
u_int8_t sectors;
u_int32_t transfersize; /* size of each transfer */
@ -66,7 +66,7 @@ struct ad_softc {
int flags; /* drive flags */
#define AD_F_LABELLING 0x0001
#define AD_F_DETACHING 0x0002
#define AD_F_LBA_ENABLED 0x0004
#define AD_F_CHS_USED 0x0004
#define AD_F_32B_ENABLED 0x0008
#define AD_F_TAG_ENABLED 0x0010
#define AD_F_RAID_SUBDISK 0x0020

116
sys/dev/ata/ata-dma.c
View File

@ -103,7 +103,7 @@ ata_dmainit(struct ata_softc *scp, int device,
/* DMA engine address alignment is usually 1 word (2 bytes) */
scp->alignment = 0x1;
if (udmamode > 2 && !ATA_PARAM(scp, device)->cblid) {
if (udmamode > 2 && !ATA_PARAM(scp, device)->hwres_cblid) {
ata_printf(scp, device,
"DMA limited to UDMA33, non-ATA66 compliant cable\n");
udmamode = 2;
@ -119,7 +119,7 @@ ata_dmainit(struct ata_softc *scp, int device,
word54 = pci_read_config(parent, 0x54, 2);
if (word54 & (0x10 << devno)) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER,ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -149,7 +149,7 @@ ata_dmainit(struct ata_softc *scp, int device,
word54 = pci_read_config(parent, 0x54, 2);
if (word54 & (0x10 << devno)) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER,ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -178,7 +178,7 @@ ata_dmainit(struct ata_softc *scp, int device,
if (udmamode >= 2) {
int32_t mask48, new48;
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA2 on Intel chip\n",
@ -218,7 +218,7 @@ ata_dmainit(struct ata_softc *scp, int device,
pci_write_config(parent, 0x40, new40, 4);
pci_write_config(parent, 0x44, new44, 4);
}
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting WDMA2 on Intel chip\n",
@ -267,7 +267,7 @@ ata_dmainit(struct ata_softc *scp, int device,
((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1))
break;
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -289,7 +289,7 @@ ata_dmainit(struct ata_softc *scp, int device,
break;
}
if (udmamode >= 5 && pci_get_revid(parent) >= 0xC4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -310,7 +310,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 4 && pci_get_revid(parent) >= 0xC2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -331,7 +331,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 2 && pci_get_revid(parent) >= 0x20) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -356,7 +356,7 @@ ata_dmainit(struct ata_softc *scp, int device,
~(0x0008 << (devno << 2)), 2);
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -377,7 +377,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x74111022: /* AMD 766 */
if (udmamode >= 5) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -393,7 +393,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x74091022: /* AMD 756 */
if (udmamode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -411,7 +411,7 @@ ata_dmainit(struct ata_softc *scp, int device,
if (ata_find_dev(parent, 0x06861106, 0x40) ||
ata_find_dev(parent, 0x30741106, 0)) { /* 82C686b */
if (udmamode >= 5) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -424,7 +424,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -437,7 +437,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -453,7 +453,7 @@ ata_dmainit(struct ata_softc *scp, int device,
else if (ata_find_dev(parent, 0x06861106, 0) || /* 82C686a */
ata_find_dev(parent, 0x05961106, 0x12)) { /* 82C596b */
if (udmamode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -466,7 +466,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -483,7 +483,7 @@ ata_dmainit(struct ata_softc *scp, int device,
ata_find_dev(parent, 0x05861106, 0x03)) { /* 82C586b */
via_82c586:
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA2 on %s chip\n",
@ -498,7 +498,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting WDMA2 on %s chip\n",
@ -516,7 +516,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x55131039: /* SiS 5591 */
if (udmamode >= 2 && pci_get_revid(parent) > 0xc1) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -529,7 +529,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (wdmamode >=2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -548,7 +548,7 @@ ata_dmainit(struct ata_softc *scp, int device,
if (udmamode >= 5) {
u_int8_t umode;
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n",
@ -568,7 +568,7 @@ ata_dmainit(struct ata_softc *scp, int device,
if (udmamode >= 4) {
u_int8_t umode;
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n",
@ -585,7 +585,7 @@ ata_dmainit(struct ata_softc *scp, int device,
if (udmamode >= 2) {
u_int8_t umode;
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n",
@ -607,7 +607,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x06461095: /* CMD 646 ATA controller */
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting WDMA2 on CMD chip\n",
@ -625,7 +625,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0xc6931080: /* Cypress 82c693 ATA controller */
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -643,7 +643,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x01021078: /* Cyrix 5530 ATA33 controller */
scp->alignment = 0xf; /* DMA engine requires 16 byte alignment */
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting UDMA2 on Cyrix chip\n",
@ -655,7 +655,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting WDMA2 on Cyrix chip\n",
@ -666,20 +666,20 @@ ata_dmainit(struct ata_softc *scp, int device,
return;
}
}
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
ata_pio2mode(apiomode), ATA_C_F_SETXFER,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_PIO0 + apiomode, ATA_C_F_SETXFER,
ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting %s on Cyrix chip\n",
(error) ? "failed" : "success",
ata_mode2str(ata_pio2mode(apiomode)));
cyrix_timing(scp, devno, ata_pio2mode(apiomode));
scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
ata_mode2str(ATA_PIO0 + apiomode));
cyrix_timing(scp, devno, ATA_PIO0 + apiomode);
scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
return;
case 0x02111166: /* ServerWorks ROSB4 ATA33 controller */
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -700,7 +700,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -727,7 +727,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x6268105a: /* Promise TX2v2 ATA100 controllers */
ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b);
if (udmamode >= 4 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA + max(udmamode, 5), ATA_C_F_SETXFER,
ATA_WAIT_READY);
if (bootverbose)
@ -740,7 +740,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting %s on Promise chip\n",
@ -751,7 +751,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting %s on Promise chip\n",
@ -767,7 +767,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x0d30105a: /* Promise OEM ATA100 controllers */
if (!ATAPI_DEVICE(scp, device) && udmamode >= 5 &&
!(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -784,7 +784,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */
if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 &&
!(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -800,7 +800,7 @@ ata_dmainit(struct ata_softc *scp, int device,
case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */
if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -813,7 +813,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -825,23 +825,23 @@ ata_dmainit(struct ata_softc *scp, int device,
return;
}
}
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
ata_pio2mode(apiomode),
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_PIO0 + apiomode,
ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
"%s setting PIO%d on Promise chip\n",
(error) ? "failed" : "success",
(apiomode >= 0) ? apiomode : 0);
promise_timing(scp, devno, ata_pio2mode(apiomode));
scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
promise_timing(scp, devno, ATA_PIO0 + apiomode);
scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
return;
case 0x00041103: /* HighPoint HPT366/368/370 controllers */
if (!ATAPI_DEVICE(scp, device) &&
udmamode >=5 && pci_get_revid(parent) >= 0x03 &&
!(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -855,7 +855,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
if (!ATAPI_DEVICE(scp, device) && udmamode >=4 &&
!(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -868,7 +868,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -881,7 +881,7 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -893,15 +893,15 @@ ata_dmainit(struct ata_softc *scp, int device,
return;
}
}
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
ata_pio2mode(apiomode),
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_PIO0 + apiomode,
ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting PIO%d on HighPoint chip\n",
(error) ? "failed" : "success",
(apiomode >= 0) ? apiomode : 0);
hpt_timing(scp, devno, ata_pio2mode(apiomode));
scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
hpt_timing(scp, devno, ATA_PIO0 + apiomode);
scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
return;
default: /* unknown controller chip */
@ -922,7 +922,7 @@ ata_dmainit(struct ata_softc *scp, int device,
/* well, we have no support for this, but try anyways */
if ((wdmamode >= 2 && apiomode >= 4) && scp->r_bmio) {
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
error = ata_command(scp, device, ATA_C_SETFEATURES, 0,
ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device,
@ -934,13 +934,13 @@ ata_dmainit(struct ata_softc *scp, int device,
}
}
}
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, 0, 0,
ata_pio2mode(apiomode), ATA_C_F_SETXFER,ATA_WAIT_READY);
error = ata_command(scp, device, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode,
ATA_C_F_SETXFER,ATA_WAIT_READY);
if (bootverbose)
ata_printf(scp, device, "%s setting PIO%d on generic chip\n",
(error) ? "failed" : "success", apiomode < 0 ? 0 : apiomode);
if (!error)
scp->mode[ATA_DEV(device)] = ata_pio2mode(apiomode);
scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode;
else {
if (bootverbose)
ata_printf(scp, device, "using PIO mode set by BIOS\n");

5
sys/dev/ata/ata-raid.c
View File

@ -549,9 +549,8 @@ int
ar_read(struct ad_softc *adp, u_int32_t lba, int count, char *data)
{
if (ata_command(adp->controller, adp->unit | ATA_D_LBA,
(count > DEV_BSIZE) ? ATA_C_READ_MUL : ATA_C_READ,
(lba >> 8) & 0xffff, (lba >> 24) & 0xff, lba & 0xff,
count / DEV_BSIZE, 0, ATA_WAIT_INTR)) {
(count > DEV_BSIZE) ? ATA_C_READ_MUL : ATA_C_READ,
lba, count / DEV_BSIZE, 0, ATA_WAIT_INTR)) {
ata_printf(adp->controller, adp->unit, "RAID read config failed\n");
return 1;
}

26
sys/dev/ata/atapi-all.c
View File

@ -81,21 +81,21 @@ atapi_attach(struct ata_softc *scp, int device)
ata_printf(scp, device,
"piomode=%d dmamode=%d udmamode=%d dmaflag=%d\n",
ata_pmode(ATP_PARAM), ata_wmode(ATP_PARAM),
ata_umode(ATP_PARAM), ATP_PARAM->dmaflag);
ata_umode(ATP_PARAM), ATP_PARAM->support_dma);
if (atapi_dma && !(ATP_PARAM->drqtype == ATAPI_DRQT_INTR)){
if (atapi_dma && !(ATP_PARAM->drq_type == ATAPI_DRQT_INTR)) {
ata_dmainit(atp->controller, atp->unit,
(ata_pmode(ATP_PARAM) < 0) ?
(ATP_PARAM->dmaflag ? 4 : 0) : ata_pmode(ATP_PARAM),
(ATP_PARAM->support_dma ? 4 : 0) : ata_pmode(ATP_PARAM),
(ata_wmode(ATP_PARAM) < 0) ?
(ATP_PARAM->dmaflag ? 2 : 0) : ata_wmode(ATP_PARAM),
(ATP_PARAM->support_dma ? 2 : 0) : ata_wmode(ATP_PARAM),
ata_umode(ATP_PARAM));
}
else
ata_dmainit(atp->controller, atp->unit,
ata_pmode(ATP_PARAM) < 0 ? 0 : ata_pmode(ATP_PARAM), -1,-1);
switch (ATP_PARAM->device_type) {
switch (ATP_PARAM->type) {
#ifdef DEV_ATAPICD
case ATAPI_TYPE_CDROM:
if (acdattach(atp))
@ -118,7 +118,7 @@ atapi_attach(struct ata_softc *scp, int device)
default:
ata_printf(scp, device, "<%.40s/%.8s> %s device - NO DRIVER!\n",
ATP_PARAM->model, ATP_PARAM->revision,
atapi_type(ATP_PARAM->device_type));
atapi_type(ATP_PARAM->type));
free(atp, M_ATAPI);
atp = NULL;
}
@ -134,7 +134,7 @@ atapi_detach(struct atapi_softc *atp)
atp->flags |= ATAPI_F_DETACHING;
ata_printf(atp->controller, atp->unit, "removed from configuration\n");
switch (ATP_PARAM->device_type) {
switch (ATP_PARAM->type) {
#ifdef DEV_ATAPICD
case ATAPI_TYPE_CDROM:
acddetach(atp);
@ -186,7 +186,7 @@ atapi_queue_cmd(struct atapi_softc *atp, int8_t *ccb, caddr_t data,
request->bytecount = count;
request->flags = flags;
request->timeout = timeout * hz;
request->ccbsize = (ATP_PARAM->cmdsize) ? 16 : 12;
request->ccbsize = (ATP_PARAM->packet_size) ? 16 : 12;
bcopy(ccb, request->ccb, request->ccbsize);
if (callback) {
request->callback = callback;
@ -232,7 +232,7 @@ atapi_queue_cmd(struct atapi_softc *atp, int8_t *ccb, caddr_t data,
void
atapi_start(struct atapi_softc *atp)
{
switch (ATP_PARAM->device_type) {
switch (ATP_PARAM->type) {
#ifdef DEV_ATAPICD
case ATAPI_TYPE_CDROM:
acd_start(atp);
@ -299,7 +299,7 @@ atapi_transfer(struct atapi_request *request)
/* start ATAPI operation */
if (ata_command(atp->controller, atp->unit, ATA_C_PACKET_CMD,
request->bytecount, 0, 0, 0,
request->bytecount, 0,
(request->flags & ATPR_F_DMA_USED) ? ATA_F_DMA : 0,
ATA_IMMEDIATE))
ata_printf(atp->controller, atp->unit,
@ -310,7 +310,7 @@ atapi_transfer(struct atapi_request *request)
request->dmatab, request->flags & ATPR_F_READ);
/* command interrupt device ? just return */
if (ATP_PARAM->drqtype == ATAPI_DRQT_INTR)
if (ATP_PARAM->drq_type == ATAPI_DRQT_INTR)
return ATA_OP_CONTINUES;
/* ready to write ATAPI command */
@ -496,9 +496,9 @@ atapi_reinit(struct atapi_softc *atp)
if (atp->controller->mode[ATA_DEV(atp->unit)] >= ATA_DMA)
ata_dmainit(atp->controller, atp->unit,
(ata_pmode(ATP_PARAM) < 0) ?
(ATP_PARAM->dmaflag ? 4 : 0) : ata_pmode(ATP_PARAM),
(ATP_PARAM->support_dma ? 4 : 0) : ata_pmode(ATP_PARAM),
(ata_wmode(ATP_PARAM) < 0) ?
(ATP_PARAM->dmaflag ? 2 : 0) : ata_wmode(ATP_PARAM),
(ATP_PARAM->support_dma ? 2 : 0) : ata_wmode(ATP_PARAM),
ata_umode(ATP_PARAM));
else
ata_dmainit(atp->controller, atp->unit,

251
sys/sys/ata.h
View File

@ -35,134 +35,174 @@
/* ATA/ATAPI device parameter information */
struct ata_params {
u_int8_t cmdsize :2; /* packet command size */
/*000*/ u_int16_t packet_size :2; /* packet command size */
#define ATAPI_PSIZE_12 0 /* 12 bytes */
#define ATAPI_PSIZE_16 1 /* 16 bytes */
u_int8_t :3;
u_int8_t drqtype :2; /* DRQ type */
u_int16_t incomplete :1;
u_int16_t :2;
u_int16_t drq_type :2; /* DRQ type */
#define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */
#define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */
#define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */
u_int8_t removable :1; /* device is removable */
u_int8_t device_type :5; /* device type */
u_int16_t removable :1; /* device is removable */
u_int16_t type :5; /* device type */
#define ATAPI_TYPE_DIRECT 0 /* disk/floppy */
#define ATAPI_TYPE_TAPE 1 /* streaming tape */
#define ATAPI_TYPE_CDROM 5 /* CD-ROM device */
#define ATAPI_TYPE_OPTICAL 7 /* optical disk */
u_int8_t :1;
u_int8_t proto :2; /* command protocol */
#define ATAPI_PROTO_ATAPI 2
u_int16_t :2;
u_int16_t cmd_protocol :1; /* command protocol */
#define ATA_PROTO_ATA 0
#define ATA_PROTO_ATAPI 1
u_int16_t cylinders; /* number of cylinders */
u_int16_t reserved2;
u_int16_t heads; /* # heads */
u_int16_t unfbytespertrk; /* # unformatted bytes/track */
u_int16_t unfbytes; /* # unformatted bytes/sector */
u_int16_t sectors; /* # sectors/track */
u_int16_t vendorunique0[3];
u_int8_t serial[20]; /* serial number */
u_int16_t buffertype; /* buffer type */
#define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */
#define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */
#define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */
/*001*/ u_int16_t cylinders; /* # of cylinders */
u_int16_t reserved2;
/*003*/ u_int16_t heads; /* # heads */
u_int16_t obsolete4;
u_int16_t obsolete5;
/*006*/ u_int16_t sectors; /* # sectors/track */
/*007*/ u_int16_t vendor7[3];
/*010*/ u_int8_t serial[20]; /* serial number */
u_int16_t retired20;
u_int16_t retired21;
u_int16_t obsolete22;
/*023*/ u_int8_t revision[8]; /* firmware revision */
/*027*/ u_int8_t model[40]; /* model name */
/*047*/ u_int16_t sectors_intr:8; /* sectors per interrupt */
u_int16_t :8;
u_int16_t buffersize; /* buf size, 512-byte units */
u_int16_t necc; /* ecc bytes appended */
u_int8_t revision[8]; /* firmware revision */
u_int8_t model[40]; /* model name */
u_int8_t nsecperint; /* sectors per interrupt */
u_int8_t vendorunique1;
u_int16_t usedmovsd; /* double word read/write? */
/*048*/ u_int16_t usedmovsd; /* double word read/write? */
/*049*/ u_int16_t retired49:8;
u_int16_t support_dma :1; /* DMA supported */
u_int16_t support_lba :1; /* LBA supported */
u_int16_t disable_iordy :1; /* IORDY may be disabled */
u_int16_t support_iordy :1; /* IORDY supported */
u_int16_t softreset :1; /* needs softreset when busy */
u_int16_t stdby_ovlap :1; /* standby/overlap supported */
u_int16_t support_queueing:1; /* supports queuing overlap */
u_int16_t support_idma :1; /* interleaved DMA supported */
u_int8_t vendorcap; /* vendor capabilities */
u_int8_t dmaflag :1; /* DMA supported - always 1 */
u_int8_t lbaflag :1; /* LBA supported - always 1 */
u_int8_t iordydis :1; /* IORDY may be disabled */
u_int8_t iordyflag :1; /* IORDY supported */
u_int8_t softreset :1; /* needs softreset when busy */
u_int8_t stdby_ovlap :1; /* standby/overlap supported */
u_int8_t queueing :1; /* supports queuing overlap */
u_int8_t idmaflag :1; /* interleaved DMA supported */
u_int16_t capvalidate; /* validation for above */
/*050*/ u_int16_t device_stdby_min:1;
u_int16_t :13;
u_int16_t capability_one:1;
u_int16_t capability_zero:1;
u_int8_t vendorunique3;
u_int8_t opiomode; /* PIO modes 0-2 */
u_int8_t vendorunique4;
u_int8_t odmamode; /* old DMA modes, not ATA-3 */
u_int16_t atavalid; /* fields valid */
/*051*/ u_int16_t vendor51:8;
u_int16_t retired_piomode:8; /* PIO modes 0-2 */
/*052*/ u_int16_t vendor52:8;
u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */
/*053*/ u_int16_t atavalid; /* fields valid */
#define ATA_FLAG_54_58 1 /* words 54-58 valid */
#define ATA_FLAG_64_70 2 /* words 64-70 valid */
#define ATA_FLAG_88 4 /* word 88 valid */
u_int16_t currcyls;
u_int16_t currheads;
u_int16_t currsectors;
u_int16_t currsize0;
u_int16_t currsize1;
u_int8_t currmultsect;
u_int8_t multsectvalid;
u_int32_t lbasize;
u_int16_t obsolete54[5];
/*059*/ u_int16_t multi_count:8;
u_int16_t multi_valid:1;
u_int16_t :7;
u_int16_t sdmamodes; /* singleword DMA modes */
u_int16_t wdmamodes; /* multiword DMA modes */
u_int16_t apiomodes; /* advanced PIO modes */
/*060*/ u_int32_t lba_size;
u_int16_t obsolete62;
/*063*/ u_int16_t mwdmamodes; /* multiword DMA modes */
/*064*/ u_int16_t apiomodes; /* advanced PIO modes */
u_int16_t mwdmamin; /* min. M/W DMA time/word ns */
u_int16_t mwdmarec; /* rec. M/W DMA time ns */
u_int16_t pioblind; /* min. PIO cycle w/o flow */
u_int16_t pioiordy; /* min. PIO cycle IORDY flow */
/*065*/ u_int16_t mwdmamin; /* min. M/W DMA time/word ns */
/*066*/ u_int16_t mwdmarec; /* rec. M/W DMA time ns */
/*067*/ u_int16_t pioblind; /* min. PIO cycle w/o flow */
/*068*/ u_int16_t pioiordy; /* min. PIO cycle IORDY flow */
u_int16_t reserved69;
u_int16_t reserved70;
/*071*/ u_int16_t rlsovlap; /* rel time (us) for overlap */
/*072*/ u_int16_t rlsservice; /* rel time (us) for service */
u_int16_t reserved73;
u_int16_t reserved74;
u_int16_t reserved69;
u_int16_t reserved70;
u_int16_t rlsovlap; /* rel time (us) for overlap */
u_int16_t rlsservice; /* rel time (us) for service */
u_int16_t reserved73;
u_int16_t reserved74;
u_int16_t queuelen:5;
u_int16_t :11;
u_int16_t reserved76;
u_int16_t reserved77;
u_int16_t reserved78;
u_int16_t reserved79;
u_int16_t versmajor;
u_int16_t versminor;
u_int16_t featsupp1; /* 82 */
u_int16_t supmicrocode:1;
u_int16_t supqueued:1;
u_int16_t supcfa:1;
u_int16_t supapm:1;
u_int16_t suprmsn:1;
u_int16_t :11;
u_int16_t featsupp3; /* 84 */
u_int16_t featenab1; /* 85 */
u_int16_t enabmicrocode:1;
u_int16_t enabqueued:1;
u_int16_t enabcfa:1;
u_int16_t enabapm:1;
u_int16_t enabrmsn:1;
u_int16_t :11;
u_int16_t featenab3; /* 87 */
u_int16_t udmamodes; /* UltraDMA modes */
u_int16_t erasetime;
u_int16_t enherasetime;
u_int16_t apmlevel;
u_int16_t masterpasswdrev;
u_int16_t masterhwres :8;
u_int16_t slavehwres :5;
u_int16_t cblid :1;
u_int16_t reserved93_1415 :2;
u_int16_t reserved94[32];
u_int16_t rmvstat;
u_int16_t securstat;
u_int16_t reserved129[30];
u_int16_t cfapwrmode;
u_int16_t reserved160[85];
u_int16_t integrity;
u_int16_t reserved246[10];
/*075*/ u_int16_t queuelen:5;
u_int16_t :11;
u_int16_t reserved76;
u_int16_t reserved77;
u_int16_t reserved78;
u_int16_t reserved79;
/*080*/ u_int16_t version_major;
/*081*/ u_int16_t version_minor;
struct {
/*082/085*/ u_int16_t smart:1;
u_int16_t security:1;
u_int16_t removable:1;
u_int16_t power_mngt:1;
u_int16_t packet:1;
u_int16_t write_cache:1;
u_int16_t look_ahead:1;
u_int16_t release_irq:1;
u_int16_t service_irq:1;
u_int16_t reset:1;
u_int16_t protected:1;
u_int16_t :1;
u_int16_t write_buffer:1;
u_int16_t read_buffer:1;
u_int16_t nop:1;
u_int16_t :1;
/*083/086*/ u_int16_t microcode:1;
u_int16_t queued:1;
u_int16_t cfa:1;
u_int16_t apm:1;
u_int16_t notify:1;
u_int16_t standby:1;
u_int16_t spinup:1;
u_int16_t :1;
u_int16_t max_security:1;
u_int16_t auto_acoustic:1;
u_int16_t address48:1;
u_int16_t config_overlay:1;
u_int16_t flush_cache:1;
u_int16_t flush_cache48:1;
u_int16_t support_one:1;
u_int16_t support_zero:1;
/*084/087*/ u_int16_t smart_error_log:1;
u_int16_t smart_self_test:1;
u_int16_t media_serial_no:1;
u_int16_t media_card_pass:1;
u_int16_t streaming:1;
u_int16_t logging:1;
u_int16_t :8;
u_int16_t extended_one:1;
u_int16_t extended_zero:1;
} support, enabled;
/*088*/ u_int16_t udmamodes; /* UltraDMA modes */
/*089*/ u_int16_t erase_time;
/*090*/ u_int16_t enhanced_erase_time;
/*091*/ u_int16_t apm_value;
/*092*/ u_int16_t master_passwd_revision;
/*093*/ u_int16_t hwres_master :8;
u_int16_t hwres_slave :5;
u_int16_t hwres_cblid :1;
u_int16_t hwres_valid:2;
/*094*/ u_int16_t current_acoustic:8;
u_int16_t vendor_acoustic:8;
/*095*/ u_int16_t stream_min_req_size;
/*096*/ u_int16_t stream_transfer_time;
/*097*/ u_int16_t stream_access_latency;
/*098*/ u_int32_t stream_granularity;
/*100*/ u_int64_t lba_size48;
u_int16_t reserved104[23];
/*127*/ u_int16_t removable_status;
/*128*/ u_int16_t security_status;
u_int16_t reserved129[31];
/*160*/ u_int16_t cfa_powermode1;
u_int16_t reserved161[14];
/*176*/ u_int16_t media_serial[30];
u_int16_t reserved206[49];
/*255*/ u_int16_t integrity;
};
#define ATA_MODE_MASK 0x0f
@ -180,6 +220,7 @@ struct ata_params {
#define ATA_UDMA2 0x42
#define ATA_UDMA4 0x44
#define ATA_UDMA5 0x45
#define ATA_UDMA6 0x46
struct ata_cmd {
int channel;