Teach the compiler how to shift TSC value efficiently. As noted in r220631,
some times compiler inserts redundant instructions to preserve unused upper 32 bits even when it is casted to a 32-bit value. Unfortunately, it seems the problem becomes more serious when it is shifted, especially on amd64.
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@ -461,7 +461,7 @@ init_TSC_tc(void)
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tsc_timecounter.tc_quality = 1000;
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init:
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for (shift = 0; shift < 32 && (tsc_freq >> shift) > max_freq; shift++)
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for (shift = 0; shift < 31 && (tsc_freq >> shift) > max_freq; shift++)
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;
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if (shift > 0) {
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tsc_timecounter.tc_get_timecount = tsc_get_timecount_low;
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@ -579,6 +579,9 @@ tsc_get_timecount(struct timecounter *tc __unused)
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static u_int
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tsc_get_timecount_low(struct timecounter *tc)
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{
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uint32_t rv;
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return (rdtsc() >> (int)(intptr_t)tc->tc_priv);
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__asm __volatile("rdtsc; shrd %%cl, %%edx, %0"
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: "=a" (rv) : "c" ((int)(intptr_t)tc->tc_priv) : "edx");
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return (rv);
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}
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