Remove the incomplete Tegra 2 code, nobody was maintaining it. The AC100
never booted to single user mode. It can be brought back if someone is willing to get it into a stable state and maintain it.
This commit is contained in:
Andrew Turner
parent
811985398d
commit
8b04766b28
@ -1,98 +0,0 @@
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#
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# Custom kernel for Toshiba AC100
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#
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# $FreeBSD$
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#
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ident AC100
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include "../tegra/std.tegra2"
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makeoptions MODULES_OVERRIDE=""
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makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
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makeoptions WERROR="-Werror"
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#options SCHED_ULE # ULE scheduler
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options SCHED_4BSD # 4BSD scheduler
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options INET # InterNETworking
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#options INET6 # IPv6 communications protocols
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options FFS # Berkeley Fast Filesystem
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#options NFSCL # Network Filesystem Client
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#options NFSLOCKD # Network Lock Manager
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#options NFS_ROOT # NFS usable as /, requires NFSCLIENT
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#options BOOTP
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#options BOOTP_NFSROOT
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#options BOOTP_NFSV3
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#options BOOTP_WIRED_TO=mge0
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options TMPFS # Efficient memory filesystem
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options GEOM_PART_BSD # BSD partition scheme
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options GEOM_PART_MBR # MBR partition scheme
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options GEOM_PART_GPT
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options ROOTDEVNAME=\"ufs:/dev/da0p1\"
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options SYSVSHM # SYSV-style shared memory
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options SYSVMSG # SYSV-style message queues
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options SYSVSEM # SYSV-style semaphores
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options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions
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options MUTEX_NOINLINE
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options RWLOCK_NOINLINE
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options NO_FFS_SNAPSHOT
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options NO_SWAPPING
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#options SMP
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# Debugging
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options VERBOSE_SYSINIT
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#options ALT_BREAK_TO_DEBUGGER
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options DDB
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options GDB
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options DIAGNOSTIC
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options INVARIANTS # Enable calls of extra sanity checking
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options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS
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options KDB
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options KDB_TRACE
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#options KTR
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#options KTR_VERBOSE=0
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#options KTR_ENTRIES=16384
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#options KTR_MASK=(KTR_SPARE2)
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#options KTR_COMPILE=KTR_ALL
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options WITNESS # Enable checks to detect deadlocks and cycles
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options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed
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#options WITNESS_KDB
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options MUTEX_DEBUG
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# Pseudo devices
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device random
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device pty
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device loop
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device md
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# USB
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#options USB_DEBUG # enable debug msgs
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#device usb
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#device ehci
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#device umass
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#device scbus
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#device pass
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#device da
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# SATA
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#device ata
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#device mvs
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# Serial ports
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device uart
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# I2C (TWSI)
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#device iic
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#device iicbus
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#Network
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device ether
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#FDT
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options FDT
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options FDT_DTB_STATIC
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makeoptions FDT_DTS_FILE=tegra20-paz00.dts
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@ -1,18 +0,0 @@
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# $FreeBSD$
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arm/arm/bus_space_asm_generic.S standard
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arm/arm/bus_space_generic.c standard
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arm/arm/bus_space-v6.c standard
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arm/arm/cpufunc_asm_armv5.S standard
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arm/arm/cpufunc_asm_arm11.S standard
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arm/arm/cpufunc_asm_armv7.S standard
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arm/arm/gic.c standard
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arm/arm/mpcore_timer.c standard
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arm/tegra/tegra2_common.c standard
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arm/tegra/tegra2_machdep.c standard
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kern/kern_clocksource.c standard
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dev/uart/uart_dev_ns8250.c optional uart
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@ -1,14 +0,0 @@
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# nVidia Tegra 2 common options
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#$FreeBSD$
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cpu CPU_CORTEXA
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machine arm armv6
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options PHYSADDR=0x00000000
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makeoptions KERNPHYSADDR=0x00200000
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options KERNPHYSADDR=0x00200000
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makeoptions KERNVIRTADDR=0xc0200000
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options KERNVIRTADDR=0xc0200000
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files "../tegra/files.tegra2"
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@ -1,80 +0,0 @@
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/*-
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* Copyright (c) 2011 The FreeBSD Foundation
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* All rights reserved.
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*
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* Developed by Damjan Marion <damjan.marion@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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/* FIXME move to header file */
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#define TEGRA2_CLK_RST_PA_BASE 0x60006000
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void
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cpu_reset(void)
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{
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bus_space_handle_t bsh;
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printf("Resetting...\n");
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bus_space_map(fdtbus_bs_tag,TEGRA2_CLK_RST_PA_BASE, 0x1000, 0, &bsh);
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bus_space_write_4(fdtbus_bs_tag, bsh, 4, 4);
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while(1);
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}
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struct fdt_fixup_entry fdt_fixup_table[] = {
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{ NULL, NULL }
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};
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static int
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fdt_pic_decode_ic(phandle_t node, pcell_t *intr, int *interrupt, int *trig,
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int *pol)
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{
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if (!fdt_is_compatible(node, "arm,gic"))
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return (ENXIO);
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*interrupt = fdt32_to_cpu(intr[0]);
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*trig = INTR_TRIGGER_CONFORM;
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*pol = INTR_POLARITY_CONFORM;
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return (0);
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}
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fdt_pic_decode_t fdt_pic_table[] = {
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&fdt_pic_decode_ic,
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NULL
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};
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@ -1,150 +0,0 @@
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/*-
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* Copyright (c) 2011 Damjan Marion.
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* Copyright (c) 1994-1998 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: FreeBSD: //depot/projects/arm/src/sys/arm/mv/mv_machdep.c
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*/
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#include "opt_ddb.h"
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#define _ARM32_BUS_DMA_PRIVATE
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/devmap.h>
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#include <machine/machdep.h>
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#include <machine/platform.h>
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#include <dev/fdt/fdt_common.h>
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#define TEGRA2_CLK_RST_PA_BASE 0x60006000
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#define TEGRA2_CLK_RST_OSC_FREQ_DET_REG 0x58
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#define TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG 0x5C
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#define OSC_FREQ_DET_TRIG (1U<<31)
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#define OSC_FREQ_DET_BUSY (1U<<31)
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#if 0
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static int
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tegra2_osc_freq_detect(void)
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{
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bus_space_handle_t bsh;
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uint32_t c;
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uint32_t r=0;
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int i=0;
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struct {
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uint32_t val;
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uint32_t freq;
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} freq_det_cnts[] = {
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{ 732, 12000000 },
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{ 794, 13000000 },
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{1172, 19200000 },
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{1587, 26000000 },
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{ -1, 0 },
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};
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printf("Measuring...\n");
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bus_space_map(fdtbus_bs_tag,TEGRA2_CLK_RST_PA_BASE, 0x1000, 0, &bsh);
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bus_space_write_4(fdtbus_bs_tag, bsh, TEGRA2_CLK_RST_OSC_FREQ_DET_REG,
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OSC_FREQ_DET_TRIG | 1 );
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do {} while (bus_space_read_4(fdtbus_bs_tag, bsh,
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TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG) & OSC_FREQ_DET_BUSY);
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c = bus_space_read_4(fdtbus_bs_tag, bsh, TEGRA2_CLK_RST_OSC_FREQ_DET_STAT_REG);
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while (freq_det_cnts[i].val > 0) {
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if (((freq_det_cnts[i].val - 3) < c) && (c < (freq_det_cnts[i].val + 3)))
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r = freq_det_cnts[i].freq;
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i++;
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}
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printf("c=%u r=%u\n",c,r );
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bus_space_free(fdtbus_bs_tag, bsh, 0x1000);
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return r;
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}
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#endif
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vm_offset_t
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platform_lastaddr(void)
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{
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return (arm_devmap_lastaddr());
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}
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void
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platform_probe_and_attach(void)
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{
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}
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void
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platform_gpio_init(void)
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{
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}
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void
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platform_late_init(void)
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{
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}
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/*
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* Add a static mapping for the register range that includes the debug uart.
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* It's not clear this is needed, but the original code established this mapping
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* before conversion to the newer arm_devmap_add_entry() routine.
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*/
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int
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platform_devmap_init(void)
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{
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arm_devmap_add_entry(0x70000000, 0x00100000);
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return (0);
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}
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struct arm32_dma_range *
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bus_dma_get_range(void)
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{
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return (NULL);
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}
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int
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bus_dma_get_range_nb(void)
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{
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return (0);
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}
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||||||
Loading…
x
Reference in New Issue
Block a user