[PowerPC64] Minor correctness fix in rstcode.

TRAP_ENTRY(0) should be TRAP_GENTRAP(0) here.

However, in practice, it doesn't matter, as the only time TRAP_ENTRY and
TRAP_GENTRAP can differ is when bridge mode is active, which is impossible
on the 64 bit kernel.

Fix it anyway in case we ever need to add a trap preamble on PPC64.
This commit is contained in:
Brandon Bergren 2020-05-12 01:04:50 +00:00
parent 9cfae28ebc
commit 8b4b91df3f

View File

@ -318,7 +318,7 @@ CNAME(rstcode):
* It is software reset when 46:47 = 0b00
*/
/* 0x00 */
ld %r2,TRAP_ENTRY(0) /* Real-mode &generictrap */
ld %r2,TRAP_GENTRAP(0) /* Real-mode &generictrap */
mfsrr1 %r9 /* Load SRR1 into r9 */
andis. %r9,%r9,0x3 /* Logic AND with 46:47 bits */