Bring MIPS INTRNG support back up again, in line with D5370
Reviewed by: kan Approved by: adrian (mentor) Sponsored by: Smartcom - Bulgaria AD Differential Revision: https://reviews.freebsd.org/D5838
This commit is contained in:
sgalabov
parent
fa19c68f9f
commit
8b5422550f
@ -71,15 +71,24 @@ __FBSDID("$FreeBSD$");
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static int mips_pic_intr(void *);
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struct mips_pic_irqsrc {
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struct intr_irqsrc isrc;
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struct resource *res;
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u_int irq;
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};
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struct mips_pic_softc {
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device_t pic_dev;
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struct intr_irqsrc * pic_irqs[NREAL_IRQS];
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struct mtx mutex;
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uint32_t nirqs;
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device_t pic_dev;
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struct mips_pic_irqsrc pic_irqs[NREAL_IRQS];
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struct rman pic_irq_rman;
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struct mtx mutex;
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uint32_t nirqs;
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};
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static struct mips_pic_softc *pic_sc;
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#define PIC_INTR_ISRC(sc, irq) (&(sc)->pic_irqs[(irq)].isrc)
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#ifdef FDT
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static struct ofw_compat_data compat_data[] = {
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{"mti,cpu-interrupt-controller", true},
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@ -142,6 +151,39 @@ pic_xref(device_t dev)
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#endif
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}
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static int
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mips_pic_register_isrcs(struct mips_pic_softc *sc)
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{
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int error;
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uint32_t irq, i;
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struct intr_irqsrc *isrc;
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const char *name;
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name = device_get_nameunit(sc->pic_dev);
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for (irq = 0; irq < sc->nirqs; irq++) {
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sc->pic_irqs[irq].irq = irq;
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sc->pic_irqs[irq].res = rman_reserve_resource(&sc->pic_irq_rman,
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irq, irq, 1, RF_ACTIVE, sc->pic_dev);
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if (sc->pic_irqs[irq].res == NULL) {
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device_printf(sc->pic_dev,
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"%s failed to alloc resource for irq %d",
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__func__, irq);
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return (ENOMEM);
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}
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isrc = PIC_INTR_ISRC(sc, irq);
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error = intr_isrc_register(isrc, sc->pic_dev, 0, "%s", name);
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if (error != 0) {
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for (i = 0; i < irq; i++) {
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intr_isrc_deregister(PIC_INTR_ISRC(sc, i));
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}
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device_printf(sc->pic_dev, "%s failed", __func__);
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return (error);
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}
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}
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return (0);
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}
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static int
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mips_pic_attach(device_t dev)
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{
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@ -162,6 +204,21 @@ mips_pic_attach(device_t dev)
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/* Set the number of interrupts */
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sc->nirqs = nitems(sc->pic_irqs);
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/* Init the IRQ rman */
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sc->pic_irq_rman.rm_type = RMAN_ARRAY;
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sc->pic_irq_rman.rm_descr = "MIPS PIC IRQs";
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if (rman_init(&sc->pic_irq_rman) != 0 ||
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rman_manage_region(&sc->pic_irq_rman, 0, sc->nirqs - 1) != 0) {
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device_printf(dev, "failed to setup IRQ rman\n");
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goto cleanup;
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}
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/* Register the interrupts */
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if (mips_pic_register_isrcs(sc) != 0) {
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device_printf(dev, "could not register PIC ISRCs\n");
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goto cleanup;
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}
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/*
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* Now, when everything is initialized, it's right time to
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* register interrupt controller to interrupt framefork.
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@ -174,7 +231,7 @@ mips_pic_attach(device_t dev)
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/* Claim our root controller role */
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if (intr_pic_claim_root(dev, xref, mips_pic_intr, sc, 0) != 0) {
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device_printf(dev, "could not set PIC as a root\n");
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intr_pic_unregister(dev, xref);
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intr_pic_deregister(dev, xref);
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goto cleanup;
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}
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@ -189,7 +246,6 @@ mips_pic_intr(void *arg)
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{
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struct mips_pic_softc *sc = arg;
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register_t cause, status;
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struct intr_irqsrc *isrc;
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int i, intr;
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cause = mips_rd_cause();
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@ -205,15 +261,13 @@ mips_pic_intr(void *arg)
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i--; /* Get a 0-offset interrupt. */
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intr &= ~(1 << i);
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isrc = sc->pic_irqs[i];
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if (isrc == NULL) {
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if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
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curthread->td_intr_frame) != 0) {
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device_printf(sc->pic_dev,
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"Stray interrupt %u detected\n", i);
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pic_irq_mask(sc, i);
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continue;
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}
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intr_irq_dispatch(isrc, curthread->td_intr_frame);
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}
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KASSERT(i == 0, ("all interrupts handled"));
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@ -228,178 +282,56 @@ mips_pic_intr(void *arg)
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return (FILTER_HANDLED);
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}
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static int
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pic_attach_isrc(struct mips_pic_softc *sc, struct intr_irqsrc *isrc, u_int irq)
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{
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/*
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* 1. The link between ISRC and controller must be set atomically.
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* 2. Just do things only once in rare case when consumers
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* of shared interrupt came here at the same moment.
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*/
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mtx_lock_spin(&sc->mutex);
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if (sc->pic_irqs[irq] != NULL) {
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mtx_unlock_spin(&sc->mutex);
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return (sc->pic_irqs[irq] == isrc ? 0 : EEXIST);
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}
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sc->pic_irqs[irq] = isrc;
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isrc->isrc_data = irq;
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mtx_unlock_spin(&sc->mutex);
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if (irq < NSOFT_IRQS)
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intr_irq_set_name(isrc, "sint%u", irq);
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else if (irq < NREAL_IRQS)
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intr_irq_set_name(isrc, "int%u", irq - NSOFT_IRQS);
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else
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panic("Invalid irq %u", irq);
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return (0);
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}
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static int
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pic_detach_isrc(struct mips_pic_softc *sc, struct intr_irqsrc *isrc, u_int irq)
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{
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mtx_lock_spin(&sc->mutex);
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if (sc->pic_irqs[irq] != isrc) {
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mtx_unlock_spin(&sc->mutex);
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return (sc->pic_irqs[irq] == NULL ? 0 : EINVAL);
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}
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sc->pic_irqs[irq] = NULL;
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isrc->isrc_data = 0;
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mtx_unlock_spin(&sc->mutex);
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intr_irq_set_name(isrc, "%s", "");
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return (0);
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}
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static int
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pic_irq_from_nspc(struct mips_pic_softc *sc, u_int type, u_int num, u_int *irqp)
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{
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switch (type) {
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case INTR_IRQ_NSPC_PLAIN:
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*irqp = num;
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return (*irqp < sc->nirqs ? 0 : EINVAL);
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case INTR_IRQ_NSPC_SWI:
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*irqp = num;
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return (num < NSOFT_IRQS ? 0 : EINVAL);
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case INTR_IRQ_NSPC_IRQ:
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*irqp = num + NSOFT_IRQS;
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return (num < NHARD_IRQS ? 0 : EINVAL);
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default:
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return (EINVAL);
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}
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}
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static int
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pic_map_nspc(struct mips_pic_softc *sc, struct intr_irqsrc *isrc, u_int *irqp)
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{
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int error;
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error = pic_irq_from_nspc(sc, isrc->isrc_nspc_type, isrc->isrc_nspc_num,
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irqp);
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if (error != 0)
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return (error);
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return (pic_attach_isrc(sc, isrc, *irqp));
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}
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#ifdef FDT
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static int
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pic_map_fdt(struct mips_pic_softc *sc, struct intr_irqsrc *isrc, u_int *irqp)
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static void
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mips_pic_disable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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int error;
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irq = isrc->isrc_cells[0];
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if (irq >= sc->nirqs)
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return (EINVAL);
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error = pic_attach_isrc(sc, isrc, irq);
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if (error != 0)
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return (error);
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isrc->isrc_nspc_type = INTR_IRQ_NSPC_PLAIN;
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isrc->isrc_nspc_num = irq;
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isrc->isrc_trig = INTR_TRIGGER_CONFORM;
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isrc->isrc_pol = INTR_POLARITY_CONFORM;
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*irqp = irq;
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return (0);
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}
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#endif
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static int
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mips_pic_register(device_t dev, struct intr_irqsrc *isrc, boolean_t *is_percpu)
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{
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struct mips_pic_softc *sc = device_get_softc(dev);
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u_int irq;
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int error;
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if (isrc->isrc_type == INTR_ISRCT_NAMESPACE)
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error = pic_map_nspc(sc, isrc, &irq);
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#ifdef FDT
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else if (isrc->isrc_type == INTR_ISRCT_FDT)
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error = pic_map_fdt(sc, isrc, &irq);
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#endif
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else
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return (EINVAL);
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if (error == 0)
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*is_percpu = TRUE;
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return (error);
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irq = ((struct mips_pic_irqsrc *)isrc)->irq;
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pic_irq_mask(device_get_softc(dev), irq);
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}
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static void
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mips_pic_enable_intr(device_t dev, struct intr_irqsrc *isrc)
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{
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u_int irq;
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if (isrc->isrc_trig == INTR_TRIGGER_CONFORM)
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isrc->isrc_trig = INTR_TRIGGER_LEVEL;
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}
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static void
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mips_pic_enable_source(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mips_pic_softc *sc = device_get_softc(dev);
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u_int irq = isrc->isrc_data;
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pic_irq_unmask(sc, irq);
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}
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static void
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mips_pic_disable_source(device_t dev, struct intr_irqsrc *isrc)
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{
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struct mips_pic_softc *sc = device_get_softc(dev);
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u_int irq = isrc->isrc_data;
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pic_irq_mask(sc, irq);
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irq = ((struct mips_pic_irqsrc *)isrc)->irq;
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pic_irq_unmask(device_get_softc(dev), irq);
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}
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static int
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mips_pic_unregister(device_t dev, struct intr_irqsrc *isrc)
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mips_pic_map_intr(device_t dev, struct intr_map_data *data,
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struct intr_irqsrc **isrcp)
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{
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struct mips_pic_softc *sc = device_get_softc(dev);
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u_int irq = isrc->isrc_data;
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#ifdef FDT
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struct mips_pic_softc *sc;
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return (pic_detach_isrc(sc, isrc, irq));
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sc = device_get_softc(dev);
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if (data == NULL || data->type != INTR_MAP_DATA_FDT ||
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data->fdt.ncells != 1 || data->fdt.cells[0] >= sc->nirqs)
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return (EINVAL);
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*isrcp = PIC_INTR_ISRC(sc, data->fdt.cells[0]);
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return (0);
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#else
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return (EINVAL);
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#endif
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}
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static void
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mips_pic_pre_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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mips_pic_disable_source(dev, isrc);
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mips_pic_disable_intr(dev, isrc);
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}
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static void
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mips_pic_post_ithread(device_t dev, struct intr_irqsrc *isrc)
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{
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mips_pic_enable_source(dev, isrc);
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mips_pic_enable_intr(dev, isrc);
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}
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static void
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@ -407,19 +339,6 @@ mips_pic_post_filter(device_t dev, struct intr_irqsrc *isrc)
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{
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}
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#ifdef SMP
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static int
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mips_pic_bind(device_t dev, struct intr_irqsrc *isrc)
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{
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return (EOPNOTSUPP);
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}
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static void
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mips_pic_ipi_send(device_t dev, struct intr_irqsrc *isrc, cpuset_t cpus)
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{
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}
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#endif
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static device_method_t mips_pic_methods[] = {
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/* Device interface */
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#ifndef FDT
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@ -427,20 +346,15 @@ static device_method_t mips_pic_methods[] = {
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#endif
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DEVMETHOD(device_probe, mips_pic_probe),
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DEVMETHOD(device_attach, mips_pic_attach),
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/* Interrupt controller interface */
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DEVMETHOD(pic_disable_source, mips_pic_disable_source),
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DEVMETHOD(pic_disable_intr, mips_pic_disable_intr),
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DEVMETHOD(pic_enable_intr, mips_pic_enable_intr),
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DEVMETHOD(pic_enable_source, mips_pic_enable_source),
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DEVMETHOD(pic_post_filter, mips_pic_post_filter),
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DEVMETHOD(pic_post_ithread, mips_pic_post_ithread),
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DEVMETHOD(pic_map_intr, mips_pic_map_intr),
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DEVMETHOD(pic_pre_ithread, mips_pic_pre_ithread),
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DEVMETHOD(pic_register, mips_pic_register),
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DEVMETHOD(pic_unregister, mips_pic_unregister),
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#ifdef SMP
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DEVMETHOD(pic_bind, mips_pic_bind),
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DEVMETHOD(pic_init_secondary, mips_pic_init_secondary),
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DEVMETHOD(pic_ipi_send, mips_pic_ipi_send),
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#endif
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DEVMETHOD(pic_post_ithread, mips_pic_post_ithread),
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DEVMETHOD(pic_post_filter, mips_pic_post_filter),
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{ 0, 0 }
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};
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@ -469,7 +383,6 @@ void
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cpu_establish_hardintr(const char *name, driver_filter_t *filt,
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void (*handler)(void*), void *arg, int irq, int flags, void **cookiep)
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{
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u_int vec;
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int res;
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/*
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@ -479,17 +392,11 @@ cpu_establish_hardintr(const char *name, driver_filter_t *filt,
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panic("%s called for unknown hard intr %d", __func__, irq);
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KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
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vec = intr_namespace_map_irq(pic_sc->pic_dev, INTR_IRQ_NSPC_IRQ, irq);
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KASSERT(vec != NIRQ, ("Unable to map hard IRQ %d\n", irq));
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res = intr_irq_add_handler(pic_sc->pic_dev, filt, handler, arg, vec,
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flags, cookiep);
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irq += NSOFT_IRQS;
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res = intr_setup_irq(pic_sc->pic_dev, pic_sc->pic_irqs[irq].res, filt,
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handler, arg, flags, cookiep);
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if (res != 0) panic("Unable to add hard IRQ %d handler", irq);
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(void)pic_irq_from_nspc(pic_sc, INTR_IRQ_NSPC_IRQ, irq, &vec);
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KASSERT(pic_sc->pic_irqs[vec] != NULL,
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("Hard IRQ %d not registered\n", irq));
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intr_irq_set_name(pic_sc->pic_irqs[vec], "%s", name);
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}
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void
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@ -497,23 +404,15 @@ cpu_establish_softintr(const char *name, driver_filter_t *filt,
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void (*handler)(void*), void *arg, int irq, int flags,
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void **cookiep)
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{
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u_int vec;
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int res;
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if (irq < 0 || irq > NSOFT_IRQS)
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panic("%s called for unknown soft intr %d", __func__, irq);
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KASSERT(pic_sc != NULL, ("%s: no pic", __func__));
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vec = intr_namespace_map_irq(pic_sc->pic_dev, INTR_IRQ_NSPC_SWI, irq);
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KASSERT(vec <= NIRQ, ("Unable to map soft IRQ %d\n", irq));
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intr_irq_add_handler(pic_sc->pic_dev, filt, handler, arg, vec,
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flags, cookiep);
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res = intr_setup_irq(pic_sc->pic_dev, pic_sc->pic_irqs[irq].res, filt,
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handler, arg, flags, cookiep);
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if (res != 0) panic("Unable to add soft IRQ %d handler", irq);
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(void)pic_irq_from_nspc(pic_sc, INTR_IRQ_NSPC_SWI, irq, &vec);
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KASSERT(pic_sc->pic_irqs[vec] != NULL,
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("Soft IRQ %d not registered\n", irq));
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intr_irq_set_name(pic_sc->pic_irqs[vec], "%s", name);
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}
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@ -457,14 +457,11 @@ static int
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nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
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driver_filter_t *filt, driver_intr_t *intr, void *arg, void **cookiep)
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{
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int irq;
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#ifdef MIPS_INTRNG
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for (irq = rman_get_start(res); irq <= rman_get_end(res); irq++) {
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intr_irq_add_handler(child, filt, intr, arg, irq, flags,
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cookiep);
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}
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return (intr_setup_irq(child, res, filt, intr, arg, flags, cookiep));
|
||||
#else
|
||||
int irq;
|
||||
register_t s;
|
||||
|
||||
s = intr_disable();
|
||||
@ -477,8 +474,9 @@ nexus_setup_intr(device_t dev, device_t child, struct resource *res, int flags,
|
||||
cpu_establish_hardintr(device_get_nameunit(child), filt, intr, arg,
|
||||
irq, flags, cookiep);
|
||||
intr_restore(s);
|
||||
#endif
|
||||
|
||||
return (0);
|
||||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
@ -486,7 +484,7 @@ nexus_teardown_intr(device_t dev, device_t child, struct resource *r, void *ih)
|
||||
{
|
||||
|
||||
#ifdef MIPS_INTRNG
|
||||
return (intr_irq_remove_handler(child, rman_get_start(r), ih));
|
||||
return (intr_teardown_irq(child, r, ih));
|
||||
#else
|
||||
printf("Unimplemented %s at %s:%d\n", __func__, __FILE__, __LINE__);
|
||||
return (0);
|
||||
@ -499,7 +497,8 @@ nexus_config_intr(device_t dev, int irq, enum intr_trigger trig,
|
||||
enum intr_polarity pol)
|
||||
{
|
||||
|
||||
return (intr_irq_config(irq, trig, pol));
|
||||
device_printf(dev, "bus_config_intr is obsolete and not supported!\n");
|
||||
return (EOPNOTSUPP);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -507,7 +506,7 @@ nexus_describe_intr(device_t dev, device_t child, struct resource *irq,
|
||||
void *cookie, const char *descr)
|
||||
{
|
||||
|
||||
return (intr_irq_describe(rman_get_start(irq), cookie, descr));
|
||||
return (intr_describe_irq(child, irq, cookie, descr));
|
||||
}
|
||||
|
||||
#ifdef SMP
|
||||
@ -515,7 +514,7 @@ static int
|
||||
nexus_bind_intr(device_t dev, device_t child, struct resource *irq, int cpu)
|
||||
{
|
||||
|
||||
return (intr_irq_bind(rman_get_start(irq), cpu));
|
||||
return (intr_bind_irq(child, irq, cpu));
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user