Intel 4965 wireless driver (derived from openbsd driver of the same name)
This commit is contained in:
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parent
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@ -136,6 +136,7 @@ MAN= aac.4 \
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isp.4 \
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ispfw.4 \
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iwi.4 \
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iwn.4 \
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ixgb.4 \
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joy.4 \
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k8temp.4 \
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161
share/man/man4/iwn.4
Normal file
161
share/man/man4/iwn.4
Normal file
@ -0,0 +1,161 @@
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.\" Copyright (c) 2004-2006
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.\" Damien Bergamini <damien.bergamini@free.fr>. All rights reserved.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice unmodified, this list of conditions, and the following
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.\" disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd Apri 13, 2008
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.Os
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.Dt IWN 4
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.Sh NAME
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.Nm iwn
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.Nd "Intel Wireless WiFI Link 4965AGN IEEE 802.11n driver"
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.Sh SYNOPSIS
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To compile this driver into the kernel,
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include the following lines in your
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kernel configuration file:
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.Bd -ragged -offset indent
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.Cd "device iwn"
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.Cd "device iwnfw"
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.Cd "device pci"
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.Cd "device wlan"
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.Cd "device firmware"
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.Ed
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.Pp
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Alternatively, to load the driver as a
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module at boot time, place the following line in
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.Xr loader.conf 5 :
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.Bd -literal -offset indent
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if_iwn_load="YES"
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.Ed
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.Pp
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In both cases, place the following line in
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.Xr loader.conf 5
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to acknowledge the firmware license (see below):
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.Bd -literal -offset indent
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legal.intel_iwn.license_ack=1
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.Ed
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.Sh DESCRIPTION
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The
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.Nm
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driver provides support for
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.Tn Intel
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Wireless WiFI Link 4965AGN PCI-Express network adapters.
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.Nm
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supports
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.Cm station ,
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.Cm adhoc ,
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and
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.Cm monitor
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mode operation.
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Only one virtual interface may be configured at any time.
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For more information on configuring this device, see
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.Xr ifconfig 8 .
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.Pp
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This driver requires the firmware built with the
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.Nm iwnfw
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module to work.
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For the loaded firmware to be enabled for use the license at
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.Pa /usr/share/doc/legal/intel_iwn/LICENSE
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must be agreed by adding the following line to
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.Xr loader.conf 5 :
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.Pp
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.Dl "legal.intel_iwn.license_ack=1"
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.Sh FILES
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.Bl -tag -width ".Pa /usr/share/doc/legal/intel_iwn/LICENSE" -compact
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.It Pa /usr/share/doc/legal/intel_iwn/LICENSE
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.Nm
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firmware license
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.El
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.Sh EXAMPLES
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Join an existing BSS network (i.e., connect to an access point):
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.Pp
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.Bd -literal -offset indent
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ifconfig wlan create wlandev iwn0 inet 192.168.0.20 \e
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netmask 0xffffff00
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.Ed
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.Pp
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Join a specific BSS network with network name
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.Dq Li my_net :
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.Pp
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.Dl "ifconfig wlan create wlandev iwn0 ssid my_net up"
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.Pp
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Join a specific BSS network with 64-bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig wlan create wlandev iwn0 ssid my_net \e
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wepmode on wepkey 0x1234567890 weptxkey 1 up
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.Ed
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.Pp
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Join a specific BSS network with 128-bit WEP encryption:
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.Bd -literal -offset indent
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ifconfig wlan create wlandev iwn0 wlanmode adhoc ssid my_net \e
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wepmode on wepkey 0x01020304050607080910111213 weptxkey 1
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.Ed
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.Sh DIAGNOSTICS
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.Bl -diag
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.It "iwn%d: device timeout"
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The driver will reset the hardware.
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This should not happen.
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.It "iwn%d: firmware error"
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The onboard microcontroller crashed for some reason.
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The driver will reset the hardware.
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This should not happen.
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.It "iwn%d: timeout waiting for firmware initialization to complete"
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The onboard microcontroller failed to initialize in time.
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This should not happen.
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.It "iwn%d: could not load firmware image '%s'"
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The driver failed to load the firmware image using the
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.Xr firmware 9
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subsystem.
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Verify the
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.Xr iwnfw 4
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firmware module is installed and the license agreement
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.Xr loader 8
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tunable has been set.
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.It "iwn%d: could not load boot firmware"
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An attempt to upload the boot firmware image to the onboard microcontroller
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failed.
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This should not happen.
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.It "iwn%d: could not load microcode"
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An attempt to upload the microcode image to the onboard microcontroller failed.
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This should not happen.
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.It "iwn%d: could not load main firmware"
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An attempt to upload the main firmware image to the onboard microcontroller
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failed.
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This should not happen.
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.El
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.Sh SEE ALSO
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.Xr iwnfw 4 ,
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.Xr pci 4 ,
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.Xr wlan 4 ,
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.Xr wlan_ccmp 4 ,
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.Xr wlan_tkip 4 ,
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.Xr wlan_wep 4 ,
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.Xr ifconfig 8 ,
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.Xr wpa_supplicant 8 .
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.Sh AUTHORS
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The original
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.Nm
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driver was written by
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.An Damien Bergamini Aq damien.bergamini@free.fr
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@ -302,6 +302,7 @@ options DRM_DEBUG # Include debug printfs (slow)
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# (requires miibus)
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# ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter
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# iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters
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# iwn: Intel Wireless WiFi Link 4965AGN 802.11 network adapters
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# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
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# nve: nVidia nForce MCP on-board Ethernet Networking
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# ral: Ralink Technology IEEE 802.11 wireless adapter
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@ -313,6 +314,7 @@ options ED_3C503
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options ED_HPP
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options ED_SIC
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device iwi
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device iwn
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device ipw
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device nfe # nVidia nForce MCP on-board Ethernet Networking
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device nve # nVidia nForce MCP on-board Ethernet Networking
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@ -830,6 +830,21 @@ iwi_monitor.fw optional iwimonitorfw | iwifw \
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compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwi/ipw2200-sniffer.fw.uu" \
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no-obj no-implicit-rule \
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clean "iwi_monitor.fw"
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dev/iwn/if_iwn.c optional iwn
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iwnfw.c optional iwnfw \
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compile-with "${AWK} -f $S/tools/fw_stub.awk iwn.fw:iwnfw:44417 -lintel_iwn -miwn -c${.TARGET}" \
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no-implicit-rule before-depend local \
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clean "iwnfw.c"
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iwnfw.fwo optional iwnfw \
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dependency "iwn.fw" \
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compile-with "${LD} -b binary -d -warn-common -r -d -o ${.TARGET} iwn.fw" \
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no-implicit-rule \
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clean "iwn.fwo"
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iwn.fw optional iwnfw \
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dependency ".PHONY" \
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compile-with "uudecode -o ${.TARGET} $S/contrib/dev/iwn/iwlwifi-4965-4.44.17.fw.uu" \
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no-obj no-implicit-rule \
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clean "iwn.fw"
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dev/ixgb/if_ixgb.c optional ixgb
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dev/ixgb/ixgb_ee.c optional ixgb
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dev/ixgb/ixgb_hw.c optional ixgb
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39
sys/contrib/dev/iwn/LICENSE
Normal file
39
sys/contrib/dev/iwn/LICENSE
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@ -0,0 +1,39 @@
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Copyright (c) 2006, Intel Corporation.
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All rights reserved.
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Redistribution. Redistribution and use in binary form, without
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modification, are permitted provided that the following conditions are
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met:
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* Redistributions must reproduce the above copyright notice and the
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following disclaimer in the documentation and/or other materials
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provided with the distribution.
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* Neither the name of Intel Corporation nor the names of its suppliers
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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* No reverse engineering, decompilation, or disassembly of this software
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is permitted.
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Limited patent license. Intel Corporation grants a world-wide,
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royalty-free, non-exclusive license under patents it now or hereafter
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owns or controls to make, have made, use, import, offer to sell and
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sell ("Utilize") this software, but solely to the extent that any
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such patent is necessary to Utilize the software alone, or in
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combination with an operating system licensed under an approved Open
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Source license as listed by the Open Source Initiative at
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http://opensource.org/licenses. The patent license shall not apply to
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any other combinations which include this software. No hardware per
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se is licensed hereunder.
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DISCLAIMER. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
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CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING,
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BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND
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FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
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TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
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USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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DAMAGE.
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3398
sys/contrib/dev/iwn/iwlwifi-4965-4.44.17.fw.uu
Normal file
3398
sys/contrib/dev/iwn/iwlwifi-4965-4.44.17.fw.uu
Normal file
File diff suppressed because it is too large
Load Diff
4615
sys/dev/iwn/if_iwn.c
Normal file
4615
sys/dev/iwn/if_iwn.c
Normal file
File diff suppressed because it is too large
Load Diff
970
sys/dev/iwn/if_iwnreg.h
Normal file
970
sys/dev/iwn/if_iwnreg.h
Normal file
@ -0,0 +1,970 @@
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/* $FreeBSD$ */
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/* $OpenBSD: if_iwnreg.h,v 1.9 2007/11/27 20:59:40 damien Exp $ */
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/*-
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* Copyright (c) 2007
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* Damien Bergamini <damien.bergamini@free.fr>
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*
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* Permission to use, copy, modify, and distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#define EDCA_NUM_AC 4
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#define IWN_TX_RING_COUNT 256
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#define IWN_RX_RING_COUNT 64
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#define IWN_NTXQUEUES 16
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#define IWN_NTXCHAINS 2
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/*
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* Rings must be aligned on a 256-byte boundary.
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*/
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#define IWN_RING_DMA_ALIGN 256
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/* maximum scatter/gather */
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#define IWN_MAX_SCATTER 20
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/* Rx buffers must be large enough to hold a full 4K A-MPDU */
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#define IWN_RBUF_SIZE (4 * 1024)
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/*
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* Control and status registers.
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*/
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#define IWN_HWCONFIG 0x000
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#define IWN_INTR_MIT 0x004
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#define IWN_INTR 0x008
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#define IWN_MASK 0x00c
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#define IWN_INTR_STATUS 0x010
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#define IWN_RESET 0x020
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#define IWN_GPIO_CTL 0x024
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#define IWN_EEPROM_CTL 0x02c
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#define IWN_UCODE_CLR 0x05c
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#define IWN_CHICKEN 0x100
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#define IWN_QUEUE_OFFSET(qid) (0x380 + (qid) * 8)
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#define IWN_MEM_WADDR 0x410
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#define IWN_MEM_WDATA 0x418
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#define IWN_WRITE_MEM_ADDR 0x444
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#define IWN_READ_MEM_ADDR 0x448
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#define IWN_WRITE_MEM_DATA 0x44c
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#define IWN_READ_MEM_DATA 0x450
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#define IWN_TX_WIDX 0x460
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#define IWN_KW_BASE 0x197c
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#define IWN_TX_BASE(qid) (0x19d0 + (qid) * 4)
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#define IWN_RW_WIDX_PTR 0x1bc0
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#define IWN_RX_BASE 0x1bc4
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#define IWN_RX_WIDX 0x1bc8
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#define IWN_RX_CONFIG 0x1c00
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#define IWN_RX_STATUS 0x1c44
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#define IWN_TX_CONFIG(qid) (0x1d00 + (qid) * 32)
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#define IWN_TX_STATUS 0x1eb0
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#define IWN_SRAM_BASE 0xa02c00
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#define IWN_TX_ACTIVE (IWN_SRAM_BASE + 0x01c)
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#define IWN_QUEUE_RIDX(qid) (IWN_SRAM_BASE + 0x064 + (qid) * 4)
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#define IWN_SELECT_QCHAIN (IWN_SRAM_BASE + 0x0d0)
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#define IWN_QUEUE_INTR_MASK (IWN_SRAM_BASE + 0x0e4)
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#define IWN_TXQ_STATUS(qid) (IWN_SRAM_BASE + 0x104 + (qid) * 4)
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/*
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* NIC internal memory offsets.
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*/
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#define IWN_CLOCK_CTL 0x3000
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#define IWN_MEM_CLOCK2 0x3008
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#define IWN_MEM_POWER 0x300c
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#define IWN_MEM_PCIDEV 0x3010
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#define IWN_MEM_UCODE_CTL 0x3400
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#define IWN_MEM_UCODE_SRC 0x3404
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#define IWN_MEM_UCODE_DST 0x3408
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#define IWN_MEM_UCODE_SIZE 0x340c
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#define IWN_MEM_TEXT_BASE 0x3490
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#define IWN_MEM_TEXT_SIZE 0x3494
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#define IWN_MEM_DATA_BASE 0x3498
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#define IWN_MEM_DATA_SIZE 0x349c
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#define IWN_MEM_UCODE_BASE 0x3800
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/* possible flags for register IWN_HWCONFIG */
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#define IWN_HW_EEPROM_LOCKED (1 << 21)
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/* possible flags for registers IWN_READ_MEM_ADDR/IWN_WRITE_MEM_ADDR */
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#define IWN_MEM_4 ((sizeof (uint32_t) - 1) << 24)
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/* possible values for IWN_MEM_UCODE_DST */
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#define IWN_FW_TEXT 0x00000000
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/* possible flags for register IWN_RESET */
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#define IWN_NEVO_RESET (1 << 0)
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#define IWN_SW_RESET (1 << 7)
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#define IWN_MASTER_DISABLED (1 << 8)
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#define IWN_STOP_MASTER (1 << 9)
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/* possible flags for register IWN_GPIO_CTL */
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#define IWN_GPIO_CLOCK (1 << 0)
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#define IWN_GPIO_INIT (1 << 2)
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#define IWN_GPIO_MAC (1 << 3)
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#define IWN_GPIO_SLEEP (1 << 4)
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#define IWN_GPIO_PWR_STATUS 0x07000000
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#define IWN_GPIO_PWR_SLEEP (4 << 24)
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#define IWN_GPIO_RF_ENABLED (1 << 27)
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/* possible flags for register IWN_CHICKEN */
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#define IWN_CHICKEN_DISLOS (1 << 29)
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/* possible flags for register IWN_UCODE_CLR */
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#define IWN_RADIO_OFF (1 << 1)
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#define IWN_DISABLE_CMD (1 << 2)
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#define IWN_CTEMP_STOP_RF (1 << 3)
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/* possible flags for IWN_RX_STATUS */
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#define IWN_RX_IDLE (1 << 24)
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/* possible flags for register IWN_UC_CTL */
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#define IWN_UC_ENABLE (1 << 30)
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#define IWN_UC_RUN (1 << 31)
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/* possible flags for register IWN_INTR */
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#define IWN_ALIVE_INTR (1 << 0)
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#define IWN_WAKEUP_INTR (1 << 1)
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#define IWN_SW_RX_INTR (1 << 3)
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#define IWN_CT_REACHED (1 << 6)
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#define IWN_RF_TOGGLED (1 << 7)
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#define IWN_SW_ERROR (1 << 25)
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#define IWN_TX_INTR (1 << 27)
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#define IWN_HW_ERROR (1 << 29)
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#define IWN_RX_INTR (1 << 31)
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#define IWN_INTR_BITS "\20\1ALIVE\2WAKEUP\3SW_RX\6CT_REACHED\7RF_TOGGLED" \
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"\32SW_ERROR\34TX_INTR\36HW_ERROR\40RX_INTR"
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#define IWN_INTR_MASK \
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(IWN_SW_ERROR | IWN_HW_ERROR | IWN_TX_INTR | IWN_RX_INTR | \
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IWN_ALIVE_INTR | IWN_WAKEUP_INTR | IWN_SW_RX_INTR | \
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IWN_CT_REACHED | IWN_RF_TOGGLED)
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/* possible flags for register IWN_INTR_STATUS */
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#define IWN_STATUS_TXQ(x) (1 << (x))
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#define IWN_STATUS_RXQ(x) (1 << ((x) + 16))
|
||||
#define IWN_STATUS_PRI (1 << 30)
|
||||
/* shortcuts for the above */
|
||||
#define IWN_TX_STATUS_INTR \
|
||||
(IWN_STATUS_TXQ(0) | IWN_STATUS_TXQ(1) | IWN_STATUS_TXQ(6))
|
||||
#define IWN_RX_STATUS_INTR \
|
||||
(IWN_STATUS_RXQ(0) | IWN_STATUS_RXQ(1) | IWN_STATUS_RXQ(2) | \
|
||||
IWN_STATUS_PRI)
|
||||
|
||||
/* possible flags for register IWN_TX_STATUS */
|
||||
#define IWN_TX_IDLE(qid) (1 << ((qid) + 24) | 1 << ((qid) + 16))
|
||||
|
||||
/* possible flags/masks for register IWN_EEPROM_CTL */
|
||||
#define IWN_EEPROM_READY (1 << 0)
|
||||
#define IWN_EEPROM_MSK (1 << 1)
|
||||
|
||||
/* possible flags for register IWN_TXQ_STATUS */
|
||||
#define IWN_TXQ_STATUS_ACTIVE 0x0007fc01
|
||||
|
||||
/* possible flags for register IWN_MEM_POWER */
|
||||
#define IWN_POWER_RESET (1 << 26)
|
||||
|
||||
/* possible flags for register IWN_MEM_TEXT_SIZE */
|
||||
#define IWN_FW_UPDATED (1 << 31)
|
||||
|
||||
/* possible flags for device-specific PCI register 0xe8 */
|
||||
#define IWN_DIS_NOSNOOP (1 << 11)
|
||||
|
||||
/* possible flags for device-specific PCI register 0xf0 */
|
||||
#define IWN_ENA_L1 (1 << 1)
|
||||
|
||||
|
||||
#define IWN_TX_WINDOW 64
|
||||
struct iwn_shared {
|
||||
uint16_t len[IWN_NTXQUEUES][512]; /* 16KB total */
|
||||
uint16_t closed_count;
|
||||
uint16_t closed_rx_count;
|
||||
uint16_t finished_count;
|
||||
uint16_t finished_rx_count;
|
||||
uint32_t reserved[2];
|
||||
} __packed;
|
||||
|
||||
struct iwn_tx_desc {
|
||||
uint32_t flags;
|
||||
struct {
|
||||
uint32_t w1;
|
||||
uint32_t w2;
|
||||
uint32_t w3;
|
||||
} __packed segs[IWN_MAX_SCATTER / 2];
|
||||
/* pad to 128 bytes */
|
||||
uint32_t reserved;
|
||||
} __packed;
|
||||
|
||||
#define IWN_SET_DESC_NSEGS(d, x) \
|
||||
(d)->flags = htole32(((x) & 0x1f) << 24)
|
||||
|
||||
/* set a segment physical address and length in a Tx descriptor */
|
||||
#define IWN_SET_DESC_SEG(d, n, addr, size) do { \
|
||||
if ((n) & 1) { \
|
||||
(d)->segs[(n) / 2].w2 |= \
|
||||
htole32(((addr) & 0xffff) << 16); \
|
||||
(d)->segs[(n) / 2].w3 = \
|
||||
htole32((((addr) >> 16) & 0xffff) | (size) << 20); \
|
||||
} else { \
|
||||
(d)->segs[(n) / 2].w1 = htole32(addr); \
|
||||
(d)->segs[(n) / 2].w2 = htole32((size) << 4); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
struct iwn_rx_desc {
|
||||
uint32_t len;
|
||||
uint8_t type;
|
||||
#define IWN_UC_READY 1
|
||||
#define IWN_ADD_NODE_DONE 24
|
||||
#define IWN_TX_DONE 28
|
||||
#define IWN_START_SCAN 130
|
||||
#define IWN_STOP_SCAN 132
|
||||
#define IWN_RX_STATISTICS 156
|
||||
#define IWN_BEACON_STATISTICS 157
|
||||
#define IWN_STATE_CHANGED 161
|
||||
#define IWN_BEACON_MISSED 162
|
||||
#define IWN_AMPDU_RX_START 192
|
||||
#define IWN_AMPDU_RX_DONE 193
|
||||
#define IWN_RX_DONE 195
|
||||
|
||||
uint8_t flags;
|
||||
uint8_t idx;
|
||||
uint8_t qid;
|
||||
} __packed;
|
||||
|
||||
/* possible Rx status flags */
|
||||
#define IWN_RX_NO_CRC_ERR (1 << 0)
|
||||
#define IWN_RX_NO_OVFL_ERR (1 << 1)
|
||||
/* shortcut for the above */
|
||||
#define IWN_RX_NOERROR (IWN_RX_NO_CRC_ERR | IWN_RX_NO_OVFL_ERR)
|
||||
|
||||
struct iwn_tx_cmd {
|
||||
uint8_t code;
|
||||
#define IWN_CMD_CONFIGURE 0x10 /* REPLY_RXON */
|
||||
#define IWN_CMD_ASSOCIATE 0x11 /* REPLY_RXON_ASSOC */
|
||||
#define IWN_CMD_EDCA_PARAMS 0x13 /* REPLY_QOS_PARAM */
|
||||
#define IWN_CMD_TSF 0x14 /* REPLY_RXON_TIMING */
|
||||
#define IWN_CMD_ADD_NODE 0x18 /* REPLY_ADD_STA */
|
||||
#define IWN_CMD_TX_DATA 0x1c /* REPLY_TX */
|
||||
#define IWN_CMD_TX_LINK_QUALITY 0x4e /* REPLY_TX_LINK_QUALITY_CMD */
|
||||
#define IWN_CMD_SET_LED 0x48 /* REPLY_LEDS_CMD */
|
||||
#define IWN_CMD_SET_POWER_MODE 0x77 /* POWER_TABLE_CMD */
|
||||
#define IWN_CMD_SCAN 0x80 /* REPLY_SCAN_CMD */
|
||||
#define IWN_CMD_TXPOWER 0x97 /* REPLY_TX_PWR_TABLE_CMD */
|
||||
#define IWN_CMD_BLUETOOTH 0x9b /* REPLY_BT_CONFIG */
|
||||
#define IWN_CMD_GET_STATISTICS 0x9c /* REPLY_STATISTICS_CMD */
|
||||
#define IWN_CMD_SET_CRITICAL_TEMP 0xa4 /* REPLY_CT_KILL_CONFIG_CMD */
|
||||
#define IWN_SENSITIVITY 0xa8 /* SENSITIVITY_CMD */
|
||||
#define IWN_PHY_CALIB 0xb0 /* REPLY_PHY_CALIBRATION_CMD */
|
||||
uint8_t flags;
|
||||
uint8_t idx;
|
||||
uint8_t qid;
|
||||
uint8_t data[136];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_CONFIGURE (aka RXON) */
|
||||
struct iwn_config {
|
||||
uint8_t myaddr[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved1;
|
||||
uint8_t bssid[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved2;
|
||||
uint8_t wlap[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved3;
|
||||
uint8_t mode;
|
||||
#define IWN_MODE_HOSTAP 1
|
||||
#define IWN_MODE_STA 3
|
||||
#define IWN_MODE_IBSS 4
|
||||
#define IWN_MODE_MONITOR 6
|
||||
uint8_t unused4; /* air propagation */
|
||||
uint16_t rxchain;
|
||||
#define IWN_RXCHAIN_VALID 0x000e /* which antennae are valid */
|
||||
#define IWN_RXCHAIN_VALID_S 1
|
||||
#define IWN_RXCHAIN_FORCE 0x0070
|
||||
#define IWN_RXCHAIN_FORCE_S 4
|
||||
#define IWN_RXCHAIN_FORCE_MIMO 0x0380
|
||||
#define IWN_RXCHAIN_FORCE_MIMO_S 7
|
||||
#define IWN_RXCHAIN_CNT 0x0c00
|
||||
#define IWN_RXCHAIN_CNT_S 10
|
||||
#define IWN_RXCHAIN_MIMO_CNT 0x3000
|
||||
#define IWN_RXCHAIN_MIMO_CNT_S 12
|
||||
#define IWN_RXCHAIN_MIMO_FORCE 0x4000
|
||||
#define IWN_RXCHAIN_MIMO_FORCE_S 14
|
||||
uint8_t ofdm_mask; /* basic rates */
|
||||
uint8_t cck_mask; /* basic rates */
|
||||
uint16_t associd;
|
||||
uint32_t flags;
|
||||
#define IWN_CONFIG_24GHZ 0x00000001 /* band */
|
||||
#define IWN_CONFIG_CCK 0x00000002 /* modulation */
|
||||
#define IWN_CONFIG_AUTO 0x00000004 /* 2.4-only auto-detect */
|
||||
#define IWN_CONFIG_HTPROT 0x00000008 /* xmit with HT protection */
|
||||
#define IWN_CONFIG_SHSLOT 0x00000010 /* short slot time */
|
||||
#define IWN_CONFIG_SHPREAMBLE 0x00000020 /* short premable */
|
||||
#define IWN_CONFIG_NODIVERSITY 0x00000080 /* disable antenna diversity */
|
||||
#define IWN_CONFIG_ANTENNA_A 0x00000100
|
||||
#define IWN_CONFIG_ANTENNA_B 0x00000200
|
||||
#define IWN_CONFIG_RADAR 0x00001000 /* enable radar detect */
|
||||
#define IWN_CONFIG_NARROW 0x00002000 /* MKK narrow band select */
|
||||
#define IWN_CONFIG_TSF 0x00008000
|
||||
#define IWN_CONFIG_HT 0x06400000
|
||||
#define IWN_CONFIG_HT20 0x02000000
|
||||
#define IWN_CONFIG_HT40U 0x04000000
|
||||
#define IWN_CONFIG_HT40D 0x04400000
|
||||
uint32_t filter;
|
||||
#define IWN_FILTER_PROMISC (1 << 0) /* pass all data frames */
|
||||
#define IWN_FILTER_CTL (1 << 1) /* pass ctl+mgt frames */
|
||||
#define IWN_FILTER_MULTICAST (1 << 2) /* pass multi-cast frames */
|
||||
#define IWN_FILTER_NODECRYPT (1 << 3) /* pass unicast undecrypted */
|
||||
#define IWN_FILTER_BSS (1 << 5) /* station is associated */
|
||||
#define IWN_FILTER_ALLBEACONS (1 << 6) /* pass overlapping bss beacons
|
||||
(must be associated) */
|
||||
uint16_t chan; /* IEEE channel # of control/primary */
|
||||
uint8_t ht_single_mask; /* single-stream basic rates */
|
||||
uint8_t ht_dual_mask; /* dual-stream basic rates */
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_ASSOCIATE */
|
||||
struct iwn_assoc {
|
||||
uint32_t flags;
|
||||
uint32_t filter;
|
||||
uint8_t ofdm_mask;
|
||||
uint8_t cck_mask;
|
||||
uint16_t reserved;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_EDCA_PARAMS */
|
||||
struct iwn_edca_params {
|
||||
uint32_t flags;
|
||||
#define IWN_EDCA_UPDATE (1 << 0)
|
||||
#define IWN_EDCA_TXOP (1 << 4)
|
||||
|
||||
struct {
|
||||
uint16_t cwmin;
|
||||
uint16_t cwmax;
|
||||
uint8_t aifsn;
|
||||
uint8_t reserved;
|
||||
uint16_t txoplimit;
|
||||
} __packed ac[EDCA_NUM_AC];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_TSF */
|
||||
struct iwn_cmd_tsf {
|
||||
uint64_t tstamp;
|
||||
uint16_t bintval;
|
||||
uint16_t atim;
|
||||
uint32_t binitval;
|
||||
uint16_t lintval;
|
||||
uint16_t reserved;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_ADD_NODE */
|
||||
struct iwn_node_info {
|
||||
uint8_t control;
|
||||
#define IWN_NODE_UPDATE (1 << 0)
|
||||
uint8_t reserved1[3];
|
||||
uint8_t macaddr[IEEE80211_ADDR_LEN];
|
||||
uint16_t reserved2;
|
||||
uint8_t id;
|
||||
#define IWN_ID_BSS 0
|
||||
#define IWN_ID_BROADCAST 31
|
||||
uint8_t flags;
|
||||
#define IWN_FLAG_SET_KEY (1 << 0)
|
||||
uint16_t reserved3;
|
||||
uint16_t security;
|
||||
uint8_t tsc2; /* TKIP TSC2 */
|
||||
uint8_t reserved4;
|
||||
uint16_t ttak[5];
|
||||
uint16_t reserved5;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint32_t htflags;
|
||||
#define IWN_MAXRXAMPDU_S 19
|
||||
#define IWN_MPDUDENSITY_S 23
|
||||
uint32_t mask;
|
||||
uint16_t tid;
|
||||
uint8_t rate; /* legacy rate/MCS */
|
||||
#define IWN_RATE_MCS 0x08 /* or'd to indicate MCS */
|
||||
uint8_t rflags;
|
||||
#define IWN_RFLAG_HT (1 << 0) /* use HT modulation */
|
||||
#define IWN_RFLAG_CCK (1 << 1) /* use CCK modulation */
|
||||
#define IWN_RFLAG_HT40 (1 << 3) /* use dual-stream */
|
||||
#define IWN_RFLAG_SGI (1 << 5) /* use short GI */
|
||||
#define IWN_RFLAG_ANT_A (1 << 6) /* start on antenna port A */
|
||||
#define IWN_RFLAG_ANT_B (1 << 7) /* start on antenna port B */
|
||||
uint8_t add_imm;
|
||||
uint8_t del_imm;
|
||||
uint16_t add_imm_start;
|
||||
uint32_t reserved6;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_TX_DATA */
|
||||
struct iwn_cmd_data {
|
||||
uint16_t len;
|
||||
uint16_t lnext;
|
||||
uint32_t flags;
|
||||
#define IWN_TX_NEED_RTS (1 << 1)
|
||||
#define IWN_TX_NEED_CTS (1 << 2)
|
||||
#define IWN_TX_NEED_ACK (1 << 3)
|
||||
#define IWN_TX_USE_NODE_RATE (1 << 4)
|
||||
#define IWN_TX_FULL_TXOP (1 << 7)
|
||||
#define IWN_TX_BT_DISABLE (1 << 12) /* bluetooth coexistence */
|
||||
#define IWN_TX_AUTO_SEQ (1 << 13)
|
||||
#define IWN_TX_INSERT_TSTAMP (1 << 16)
|
||||
#define IWN_TX_NEED_PADDING (1 << 20)
|
||||
|
||||
uint8_t ntries;
|
||||
uint8_t bluetooth;
|
||||
uint16_t reserved1;
|
||||
uint8_t rate;
|
||||
uint8_t rflags;
|
||||
uint16_t xrflags;
|
||||
uint8_t id;
|
||||
uint8_t security;
|
||||
#define IWN_CIPHER_WEP40 1
|
||||
#define IWN_CIPHER_CCMP 2
|
||||
#define IWN_CIPHER_TKIP 3
|
||||
#define IWN_CIPHER_WEP104 9
|
||||
|
||||
uint8_t ridx;
|
||||
uint8_t reserved2;
|
||||
uint8_t key[IEEE80211_KEYBUF_SIZE];
|
||||
uint16_t fnext;
|
||||
uint16_t reserved3;
|
||||
uint32_t lifetime;
|
||||
#define IWN_LIFETIME_INFINITE 0xffffffff
|
||||
|
||||
uint32_t loaddr;
|
||||
uint8_t hiaddr;
|
||||
uint8_t rts_ntries;
|
||||
uint8_t data_ntries;
|
||||
uint8_t tid;
|
||||
uint16_t timeout;
|
||||
uint16_t txop;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_TX_LINK_QUALITY */
|
||||
#define IWN_MAX_TX_RETRIES 16
|
||||
struct iwn_cmd_link_quality {
|
||||
uint8_t id;
|
||||
uint8_t reserved1;
|
||||
uint16_t ctl;
|
||||
uint8_t flags;
|
||||
uint8_t mimo; /* MIMO delimiter */
|
||||
uint8_t ssmask; /* single stream antenna mask */
|
||||
uint8_t dsmask; /* dual stream antenna mask */
|
||||
uint8_t ridx[EDCA_NUM_AC];/* starting rate index */
|
||||
uint16_t ampdu_limit; /* tx aggregation time limit */
|
||||
uint8_t ampdu_disable;
|
||||
uint8_t ampdu_max; /* frame count limit */
|
||||
uint32_t reserved2;
|
||||
struct {
|
||||
uint8_t rate;
|
||||
#define IWN_RATE_CCK1 0
|
||||
#define IWN_RATE_CCK11 3
|
||||
#define IWN_RATE_OFDM6 4
|
||||
#define IWN_RATE_OFDM54 11
|
||||
uint8_t rflags;
|
||||
uint16_t xrflags;
|
||||
} table[IWN_MAX_TX_RETRIES];
|
||||
uint32_t reserved3;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_SET_LED */
|
||||
struct iwn_cmd_led {
|
||||
uint32_t unit; /* multiplier (in usecs) */
|
||||
uint8_t which;
|
||||
#define IWN_LED_ACTIVITY 1
|
||||
#define IWN_LED_LINK 2
|
||||
|
||||
uint8_t off;
|
||||
uint8_t on;
|
||||
uint8_t reserved;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_SET_POWER_MODE */
|
||||
struct iwn_power {
|
||||
uint16_t flags;
|
||||
#define IWN_POWER_CAM 0 /* constantly awake mode */
|
||||
|
||||
uint8_t alive;
|
||||
uint8_t debug;
|
||||
uint32_t rx_timeout;
|
||||
uint32_t tx_timeout;
|
||||
uint32_t sleep[5];
|
||||
uint32_t beacons;
|
||||
} __packed;
|
||||
|
||||
/* structures for command IWN_CMD_SCAN */
|
||||
struct iwn_scan_essid {
|
||||
uint8_t id;
|
||||
uint8_t len;
|
||||
uint8_t data[IEEE80211_NWID_LEN];
|
||||
} __packed;
|
||||
|
||||
struct iwn_scan_hdr {
|
||||
uint16_t len;
|
||||
uint8_t reserved1;
|
||||
uint8_t nchan;
|
||||
uint16_t quiet;
|
||||
uint16_t plcp_threshold;
|
||||
uint16_t crc_threshold;
|
||||
uint16_t rxchain;
|
||||
uint32_t max_svc; /* background scans */
|
||||
uint32_t pause_svc; /* background scans */
|
||||
uint32_t flags;
|
||||
uint32_t filter;
|
||||
|
||||
/* followed by a struct iwn_cmd_data */
|
||||
/* followed by an array of 4x struct iwn_scan_essid */
|
||||
/* followed by probe request body */
|
||||
/* followed by nchan x struct iwn_scan_chan */
|
||||
} __packed;
|
||||
|
||||
struct iwn_scan_chan {
|
||||
uint8_t flags;
|
||||
#define IWN_CHAN_ACTIVE (1 << 0)
|
||||
#define IWN_CHAN_DIRECT (1 << 1)
|
||||
|
||||
uint8_t chan;
|
||||
uint8_t rf_gain;
|
||||
uint8_t dsp_gain;
|
||||
uint16_t active; /* msecs */
|
||||
uint16_t passive; /* msecs */
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_TXPOWER */
|
||||
#define IWN_RIDX_MAX 32
|
||||
struct iwn_cmd_txpower {
|
||||
uint8_t band;
|
||||
uint8_t reserved1;
|
||||
uint8_t chan;
|
||||
uint8_t reserved2;
|
||||
struct {
|
||||
uint8_t rf_gain[IWN_NTXCHAINS];
|
||||
uint8_t dsp_gain[IWN_NTXCHAINS];
|
||||
} power[IWN_RIDX_MAX + 1];
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_BLUETOOTH */
|
||||
struct iwn_bluetooth {
|
||||
uint8_t flags;
|
||||
uint8_t lead;
|
||||
uint8_t kill;
|
||||
uint8_t reserved;
|
||||
uint32_t ack;
|
||||
uint32_t cts;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_CMD_SET_CRITICAL_TEMP */
|
||||
struct iwn_critical_temp {
|
||||
uint32_t reserved;
|
||||
uint32_t tempM;
|
||||
uint32_t tempR;
|
||||
/* degK <-> degC conversion macros */
|
||||
#define IWN_CTOK(c) ((c) + 273)
|
||||
#define IWN_KTOC(k) ((k) - 273)
|
||||
#define IWN_CTOMUK(c) (((c) * 1000000) + 273150000)
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_SENSITIVITY */
|
||||
struct iwn_sensitivity_cmd {
|
||||
uint16_t which;
|
||||
#define IWN_SENSITIVITY_DEFAULTTBL 0
|
||||
#define IWN_SENSITIVITY_WORKTBL 1
|
||||
|
||||
uint16_t energy_cck;
|
||||
uint16_t energy_ofdm;
|
||||
uint16_t corr_ofdm_x1;
|
||||
uint16_t corr_ofdm_mrc_x1;
|
||||
uint16_t corr_cck_mrc_x4;
|
||||
uint16_t corr_ofdm_x4;
|
||||
uint16_t corr_ofdm_mrc_x4;
|
||||
uint16_t corr_barker;
|
||||
uint16_t corr_barker_mrc;
|
||||
uint16_t corr_cck_x4;
|
||||
uint16_t energy_ofdm_th;
|
||||
} __packed;
|
||||
|
||||
/* structure for command IWN_PHY_CALIB */
|
||||
struct iwn_phy_calib_cmd {
|
||||
uint8_t code;
|
||||
#define IWN_SET_DIFF_GAIN 7
|
||||
|
||||
uint8_t flags;
|
||||
uint16_t reserved1;
|
||||
int8_t gain[3];
|
||||
#define IWN_GAIN_SET (1 << 2)
|
||||
|
||||
uint8_t reserved2;
|
||||
} __packed;
|
||||
|
||||
|
||||
/* structure for IWN_UC_READY notification */
|
||||
#define IWN_NATTEN_GROUPS 5
|
||||
struct iwn_ucode_info {
|
||||
uint8_t minor;
|
||||
uint8_t major;
|
||||
uint16_t reserved1;
|
||||
uint8_t revision[8];
|
||||
uint8_t type;
|
||||
uint8_t subtype;
|
||||
#define IWN_UCODE_RUNTIME 0
|
||||
#define IWN_UCODE_INIT 9
|
||||
|
||||
uint16_t reserved2;
|
||||
uint32_t logptr;
|
||||
uint32_t errorptr;
|
||||
uint32_t tstamp;
|
||||
uint32_t valid;
|
||||
|
||||
/* the following fields are for UCODE_INIT only */
|
||||
int32_t volt;
|
||||
struct {
|
||||
int32_t chan20MHz;
|
||||
int32_t chan40MHz;
|
||||
} __packed temp[4];
|
||||
int32_t atten[IWN_NATTEN_GROUPS][IWN_NTXCHAINS];
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_TX_DONE notification */
|
||||
struct iwn_tx_stat {
|
||||
uint8_t nframes;
|
||||
uint8_t nkill;
|
||||
uint8_t nrts;
|
||||
uint8_t ntries;
|
||||
uint8_t rate;
|
||||
uint8_t rflags;
|
||||
uint16_t xrflags;
|
||||
uint16_t duration;
|
||||
uint16_t reserved;
|
||||
uint32_t power[2];
|
||||
uint32_t status;
|
||||
#define IWN_TX_SUCCESS 0x00
|
||||
#define IWN_TX_FAIL 0x80 /* all failures have 0x80 set */
|
||||
#define IWN_TX_FAIL_SHORT_LIMIT 0x82 /* too many RTS retries */
|
||||
#define IWN_TX_FAIL_LONG_LIMIT 0x83 /* too many retries */
|
||||
#define IWN_TX_FAIL_FIFO_UNDERRRUN 0x84 /* tx fifo not kept running */
|
||||
#define IWN_TX_FAIL_DEST_IN_PS 0x88 /* sta found in power save */
|
||||
#define IWN_TX_FAIL_TX_LOCKED 0x90 /* waiting to see traffic */
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_BEACON_MISSED notification */
|
||||
struct iwn_beacon_missed {
|
||||
uint32_t consecutive;
|
||||
uint32_t total;
|
||||
uint32_t expected;
|
||||
uint32_t received;
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_AMPDU_RX_DONE notification */
|
||||
struct iwn_rx_ampdu {
|
||||
uint16_t len;
|
||||
uint16_t reserved;
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_RX_DONE and IWN_AMPDU_RX_START notifications */
|
||||
struct iwn_rx_stat {
|
||||
uint8_t phy_len;
|
||||
uint8_t cfg_phy_len;
|
||||
#define IWN_STAT_MAXLEN 20
|
||||
|
||||
uint8_t id;
|
||||
uint8_t reserved1;
|
||||
uint64_t tstamp;
|
||||
uint32_t beacon;
|
||||
uint16_t flags;
|
||||
uint16_t chan;
|
||||
uint16_t antenna;
|
||||
uint16_t agc;
|
||||
uint8_t rssi[6];
|
||||
#define IWN_RSSI_TO_DBM 44
|
||||
|
||||
uint8_t reserved2[22];
|
||||
uint8_t rate;
|
||||
uint8_t rflags;
|
||||
uint16_t xrflags;
|
||||
uint16_t len;
|
||||
uint16_t reserve3;
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_START_SCAN notification */
|
||||
struct iwn_start_scan {
|
||||
uint64_t tstamp;
|
||||
uint32_t tbeacon;
|
||||
uint8_t chan;
|
||||
uint8_t band;
|
||||
uint16_t reserved;
|
||||
uint32_t status;
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_STOP_SCAN notification */
|
||||
struct iwn_stop_scan {
|
||||
uint8_t nchan;
|
||||
uint8_t status;
|
||||
uint8_t reserved;
|
||||
uint8_t chan;
|
||||
uint64_t tsf;
|
||||
} __packed;
|
||||
|
||||
/* structure for IWN_{RX,BEACON}_STATISTICS notification */
|
||||
struct iwn_rx_phy_stats {
|
||||
uint32_t ina;
|
||||
uint32_t fina;
|
||||
uint32_t bad_plcp;
|
||||
uint32_t bad_crc32;
|
||||
uint32_t overrun;
|
||||
uint32_t eoverrun;
|
||||
uint32_t good_crc32;
|
||||
uint32_t fa;
|
||||
uint32_t bad_fina_sync;
|
||||
uint32_t sfd_timeout;
|
||||
uint32_t fina_timeout;
|
||||
uint32_t no_rts_ack;
|
||||
uint32_t rxe_limit;
|
||||
uint32_t ack;
|
||||
uint32_t cts;
|
||||
uint32_t ba_resp;
|
||||
uint32_t dsp_kill;
|
||||
uint32_t bad_mh;
|
||||
uint32_t rssi_sum;
|
||||
uint32_t reserved;
|
||||
} __packed;
|
||||
|
||||
struct iwn_rx_general_stats {
|
||||
uint32_t bad_cts;
|
||||
uint32_t bad_ack;
|
||||
uint32_t not_bss;
|
||||
uint32_t filtered;
|
||||
uint32_t bad_chan;
|
||||
uint32_t beacons;
|
||||
uint32_t missed_beacons;
|
||||
uint32_t adc_saturated; /* time in 0.8us */
|
||||
uint32_t ina_searched; /* time in 0.8us */
|
||||
uint32_t noise[3];
|
||||
uint32_t flags;
|
||||
uint32_t load;
|
||||
uint32_t fa;
|
||||
uint32_t rssi[3];
|
||||
uint32_t energy[3];
|
||||
} __packed;
|
||||
|
||||
struct iwn_rx_ht_phy_stats {
|
||||
uint32_t bad_plcp;
|
||||
uint32_t overrun;
|
||||
uint32_t eoverrun;
|
||||
uint32_t good_crc32;
|
||||
uint32_t bad_crc32;
|
||||
uint32_t bad_mh;
|
||||
uint32_t good_ampdu_crc32;
|
||||
uint32_t ampdu;
|
||||
uint32_t fragment;
|
||||
uint32_t reserved;
|
||||
} __packed;
|
||||
|
||||
struct iwn_rx_stats {
|
||||
struct iwn_rx_phy_stats ofdm;
|
||||
struct iwn_rx_phy_stats cck;
|
||||
struct iwn_rx_general_stats general;
|
||||
struct iwn_rx_ht_phy_stats ht;
|
||||
} __packed;
|
||||
|
||||
struct iwn_tx_stats {
|
||||
uint32_t preamble;
|
||||
uint32_t rx_detected;
|
||||
uint32_t bt_defer;
|
||||
uint32_t bt_kill;
|
||||
uint32_t short_len;
|
||||
uint32_t cts_timeout;
|
||||
uint32_t ack_timeout;
|
||||
uint32_t exp_ack;
|
||||
uint32_t ack;
|
||||
uint32_t msdu;
|
||||
uint32_t busrt_err1;
|
||||
uint32_t burst_err2;
|
||||
uint32_t cts_collision;
|
||||
uint32_t ack_collision;
|
||||
uint32_t ba_timeout;
|
||||
uint32_t ba_resched;
|
||||
uint32_t query_ampdu;
|
||||
uint32_t query;
|
||||
uint32_t query_ampdu_frag;
|
||||
uint32_t query_mismatch;
|
||||
uint32_t not_ready;
|
||||
uint32_t underrun;
|
||||
uint32_t bt_ht_kill;
|
||||
uint32_t rx_ba_resp;
|
||||
uint32_t reserved[2];
|
||||
} __packed;
|
||||
|
||||
struct iwn_general_stats {
|
||||
uint32_t temp;
|
||||
uint32_t temp_m;
|
||||
uint32_t burst_check;
|
||||
uint32_t burst;
|
||||
uint32_t reserved1[4];
|
||||
uint32_t sleep;
|
||||
uint32_t slot_out;
|
||||
uint32_t slot_idle;
|
||||
uint32_t ttl_tstamp;
|
||||
uint32_t tx_ant_a;
|
||||
uint32_t tx_ant_b;
|
||||
uint32_t exec;
|
||||
uint32_t probe;
|
||||
uint32_t reserved2[2];
|
||||
uint32_t rx_enabled;
|
||||
uint32_t reserved3[3];
|
||||
} __packed;
|
||||
|
||||
struct iwn_stats {
|
||||
uint32_t flags;
|
||||
struct iwn_rx_stats rx;
|
||||
struct iwn_tx_stats tx;
|
||||
struct iwn_general_stats general;
|
||||
} __packed;
|
||||
|
||||
|
||||
/* firmware image header */
|
||||
struct iwn_firmware_hdr {
|
||||
uint32_t version;
|
||||
uint32_t main_textsz;
|
||||
uint32_t main_datasz;
|
||||
uint32_t init_textsz;
|
||||
uint32_t init_datasz;
|
||||
uint32_t boot_textsz;
|
||||
} __packed;
|
||||
|
||||
#define IWN_FW_MAIN_TEXT_MAXSZ (96 * 1024)
|
||||
#define IWN_FW_MAIN_DATA_MAXSZ (40 * 1024)
|
||||
#define IWN_FW_INIT_TEXT_MAXSZ (96 * 1024)
|
||||
#define IWN_FW_INIT_DATA_MAXSZ (40 * 1024)
|
||||
#define IWN_FW_BOOT_TEXT_MAXSZ 1024
|
||||
|
||||
|
||||
/*
|
||||
* Offsets into EEPROM.
|
||||
*/
|
||||
#define IWN_EEPROM_MAC 0x015
|
||||
#define IWN_EEPROM_DOMAIN 0x060
|
||||
#define IWN_EEPROM_BAND1 0x063
|
||||
#define IWN_EEPROM_BAND2 0x072
|
||||
#define IWN_EEPROM_BAND3 0x080
|
||||
#define IWN_EEPROM_BAND4 0x08d
|
||||
#define IWN_EEPROM_BAND5 0x099
|
||||
#define IWN_EEPROM_BAND6 0x0a0
|
||||
#define IWN_EEPROM_BAND7 0x0a8
|
||||
#define IWN_EEPROM_MAXPOW 0x0e8
|
||||
#define IWN_EEPROM_VOLTAGE 0x0e9
|
||||
#define IWN_EEPROM_BANDS 0x0ea
|
||||
|
||||
struct iwn_eeprom_chan {
|
||||
uint8_t flags;
|
||||
#define IWN_EEPROM_CHAN_VALID (1 << 0)
|
||||
#define IWN_EEPROM_CHAN_IBSS (1 << 1) /* adhoc permitted */
|
||||
/* NB: bit 2 is reserved */
|
||||
#define IWN_EEPROM_CHAN_ACTIVE (1 << 3) /* active/passive scan */
|
||||
#define IWN_EEPROM_CHAN_RADAR (1 << 4) /* DFS required */
|
||||
#define IWN_EEPROM_CHAN_WIDE (1 << 5) /* HT40 */
|
||||
#define IWN_EEPROM_CHAN_NARROW (1 << 6) /* HT20 */
|
||||
|
||||
int8_t maxpwr;
|
||||
} __packed;
|
||||
|
||||
#define IWN_NSAMPLES 3
|
||||
struct iwn_eeprom_chan_samples {
|
||||
uint8_t num;
|
||||
struct {
|
||||
uint8_t temp;
|
||||
uint8_t gain;
|
||||
uint8_t power;
|
||||
int8_t pa_det;
|
||||
} samples[IWN_NTXCHAINS][IWN_NSAMPLES];
|
||||
} __packed;
|
||||
|
||||
#define IWN_NBANDS 8
|
||||
struct iwn_eeprom_band {
|
||||
uint8_t lo; /* low channel number */
|
||||
uint8_t hi; /* high channel number */
|
||||
struct iwn_eeprom_chan_samples chans[2];
|
||||
} __packed;
|
||||
|
||||
#define IWN_MAX_PWR_INDEX 107
|
||||
|
||||
/*
|
||||
* RF Tx gain values from highest to lowest power (values obtained from
|
||||
* the reference driver.)
|
||||
*/
|
||||
static const uint8_t iwn_rf_gain_2ghz[IWN_MAX_PWR_INDEX + 1] = {
|
||||
0x3f, 0x3f, 0x3f, 0x3e, 0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c,
|
||||
0x3c, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 0x39, 0x39, 0x38,
|
||||
0x38, 0x38, 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x35, 0x35, 0x35,
|
||||
0x34, 0x34, 0x34, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x31, 0x31,
|
||||
0x31, 0x30, 0x30, 0x30, 0x06, 0x06, 0x06, 0x05, 0x05, 0x05, 0x04,
|
||||
0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x01, 0x01, 0x01,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
static const uint8_t iwn_rf_gain_5ghz[IWN_MAX_PWR_INDEX + 1] = {
|
||||
0x3f, 0x3f, 0x3f, 0x3f, 0x3f, 0x3e, 0x3e, 0x3e, 0x3d, 0x3d, 0x3d,
|
||||
0x3c, 0x3c, 0x3c, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39, 0x39,
|
||||
0x39, 0x38, 0x38, 0x38, 0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x35,
|
||||
0x35, 0x35, 0x34, 0x34, 0x34, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32,
|
||||
0x31, 0x31, 0x31, 0x30, 0x30, 0x30, 0x25, 0x25, 0x25, 0x24, 0x24,
|
||||
0x24, 0x23, 0x23, 0x23, 0x22, 0x18, 0x18, 0x17, 0x17, 0x17, 0x16,
|
||||
0x16, 0x16, 0x15, 0x15, 0x15, 0x14, 0x14, 0x14, 0x13, 0x13, 0x13,
|
||||
0x12, 0x08, 0x08, 0x07, 0x07, 0x07, 0x06, 0x06, 0x06, 0x05, 0x05,
|
||||
0x05, 0x04, 0x04, 0x04, 0x03, 0x03, 0x03, 0x02, 0x02, 0x02, 0x01,
|
||||
0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
|
||||
};
|
||||
|
||||
/*
|
||||
* DSP pre-DAC gain values from highest to lowest power (values obtained
|
||||
* from the reference driver.)
|
||||
*/
|
||||
static const uint8_t iwn_dsp_gain_2ghz[IWN_MAX_PWR_INDEX + 1] = {
|
||||
0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68,
|
||||
0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e,
|
||||
0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62,
|
||||
0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68,
|
||||
0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e,
|
||||
0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62,
|
||||
0x6e, 0x68, 0x62, 0x61, 0x60, 0x5f, 0x5e, 0x5d, 0x5c, 0x5b, 0x5a,
|
||||
0x59, 0x58, 0x57, 0x56, 0x55, 0x54, 0x53, 0x52, 0x51, 0x50, 0x4f,
|
||||
0x4e, 0x4d, 0x4c, 0x4b, 0x4a, 0x49, 0x48, 0x47, 0x46, 0x45, 0x44,
|
||||
0x43, 0x42, 0x41, 0x40, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b
|
||||
};
|
||||
|
||||
static const uint8_t iwn_dsp_gain_5ghz[IWN_MAX_PWR_INDEX + 1] = {
|
||||
0x7b, 0x75, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62,
|
||||
0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68,
|
||||
0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e,
|
||||
0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62,
|
||||
0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68,
|
||||
0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e,
|
||||
0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62,
|
||||
0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68,
|
||||
0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e, 0x68, 0x62, 0x6e,
|
||||
0x68, 0x62, 0x6e, 0x68, 0x62, 0x5d, 0x58, 0x53, 0x4e
|
||||
};
|
||||
|
||||
#define IWN_READ(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_st, (sc)->sc_sh, (reg))
|
||||
|
||||
#define IWN_WRITE(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_st, (sc)->sc_sh, (reg), (val))
|
||||
|
||||
#define IWN_WRITE_REGION_4(sc, offset, datap, count) \
|
||||
bus_space_write_region_4((sc)->sc_st, (sc)->sc_sh, (offset), \
|
||||
(datap), (count))
|
||||
242
sys/dev/iwn/if_iwnvar.h
Normal file
242
sys/dev/iwn/if_iwnvar.h
Normal file
@ -0,0 +1,242 @@
|
||||
/* $FreeBSD$ */
|
||||
/*-
|
||||
* Copyright (c) 2007
|
||||
* Damien Bergamini <damien.bergamini@free.fr>
|
||||
* Copyright (c) 2008 Sam Leffler, Errno Consulting
|
||||
*
|
||||
* Permission to use, copy, modify, and distribute this software for any
|
||||
* purpose with or without fee is hereby granted, provided that the above
|
||||
* copyright notice and this permission notice appear in all copies.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||
*/
|
||||
|
||||
struct iwn_rx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wr_ihdr;
|
||||
uint64_t wr_tsft;
|
||||
uint8_t wr_flags;
|
||||
uint8_t wr_rate;
|
||||
uint16_t wr_chan_freq;
|
||||
uint16_t wr_chan_flags;
|
||||
int8_t wr_dbm_antsignal;
|
||||
int8_t wr_dbm_antnoise;
|
||||
} __packed;
|
||||
|
||||
#define IWN_RX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_TSFT) | \
|
||||
(1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
|
||||
(1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
|
||||
|
||||
struct iwn_tx_radiotap_header {
|
||||
struct ieee80211_radiotap_header wt_ihdr;
|
||||
uint8_t wt_flags;
|
||||
uint8_t wt_rate;
|
||||
uint16_t wt_chan_freq;
|
||||
uint16_t wt_chan_flags;
|
||||
} __packed;
|
||||
|
||||
#define IWN_TX_RADIOTAP_PRESENT \
|
||||
((1 << IEEE80211_RADIOTAP_FLAGS) | \
|
||||
(1 << IEEE80211_RADIOTAP_RATE) | \
|
||||
(1 << IEEE80211_RADIOTAP_CHANNEL))
|
||||
|
||||
struct iwn_dma_info {
|
||||
bus_dma_tag_t tag;
|
||||
bus_dmamap_t map;
|
||||
bus_dma_segment_t seg;
|
||||
bus_addr_t paddr;
|
||||
caddr_t vaddr;
|
||||
bus_size_t size;
|
||||
};
|
||||
|
||||
struct iwn_tx_data {
|
||||
bus_dmamap_t map;
|
||||
struct mbuf *m;
|
||||
struct ieee80211_node *ni;
|
||||
};
|
||||
|
||||
struct iwn_tx_ring {
|
||||
struct iwn_dma_info desc_dma;
|
||||
struct iwn_dma_info cmd_dma;
|
||||
struct iwn_tx_desc *desc;
|
||||
struct iwn_tx_cmd *cmd;
|
||||
struct iwn_tx_data data[IWN_TX_RING_COUNT];
|
||||
bus_dma_tag_t data_dmat;
|
||||
int qid;
|
||||
int queued;
|
||||
int cur;
|
||||
};
|
||||
|
||||
struct iwn_rx_data {
|
||||
bus_dmamap_t map;
|
||||
struct mbuf *m;
|
||||
};
|
||||
|
||||
struct iwn_rx_ring {
|
||||
struct iwn_dma_info desc_dma;
|
||||
uint32_t *desc;
|
||||
struct iwn_rx_data data[IWN_RX_RING_COUNT];
|
||||
bus_dma_tag_t data_dmat;
|
||||
int cur;
|
||||
};
|
||||
|
||||
struct iwn_node {
|
||||
struct ieee80211_node ni; /* must be the first */
|
||||
struct ieee80211_amrr_node amn;
|
||||
};
|
||||
#define IWN_NODE(_ni) ((struct iwn_node *)(_ni))
|
||||
|
||||
struct iwn_calib_state {
|
||||
uint8_t state;
|
||||
#define IWN_CALIB_STATE_INIT 0
|
||||
#define IWN_CALIB_STATE_ASSOC 1
|
||||
#define IWN_CALIB_STATE_RUN 2
|
||||
u_int nbeacons;
|
||||
uint32_t noise[3];
|
||||
uint32_t rssi[3];
|
||||
uint32_t corr_ofdm_x1;
|
||||
uint32_t corr_ofdm_mrc_x1;
|
||||
uint32_t corr_ofdm_x4;
|
||||
uint32_t corr_ofdm_mrc_x4;
|
||||
uint32_t corr_cck_x4;
|
||||
uint32_t corr_cck_mrc_x4;
|
||||
uint32_t bad_plcp_ofdm;
|
||||
uint32_t fa_ofdm;
|
||||
uint32_t bad_plcp_cck;
|
||||
uint32_t fa_cck;
|
||||
uint32_t low_fa;
|
||||
uint8_t cck_state;
|
||||
#define IWN_CCK_STATE_INIT 0
|
||||
#define IWN_CCK_STATE_LOFA 1
|
||||
#define IWN_CCK_STATE_HIFA 2
|
||||
uint8_t noise_samples[20];
|
||||
u_int cur_noise_sample;
|
||||
uint8_t noise_ref;
|
||||
uint32_t energy_samples[10];
|
||||
u_int cur_energy_sample;
|
||||
uint32_t energy_cck;
|
||||
};
|
||||
|
||||
struct iwn_vap {
|
||||
struct ieee80211vap iv_vap;
|
||||
struct ieee80211_amrr iv_amrr;
|
||||
struct callout iv_amrr_to;
|
||||
|
||||
int (*iv_newstate)(struct ieee80211vap *,
|
||||
enum ieee80211_state, int);
|
||||
};
|
||||
#define IWN_VAP(_vap) ((struct iwn_vap *)(_vap))
|
||||
|
||||
struct iwn_softc {
|
||||
struct ifnet *sc_ifp;
|
||||
int sc_debug;
|
||||
struct callout sc_timer_to; /* calib+watchdog timer */
|
||||
int sc_tx_timer; /* tx watchdog timer/counter */
|
||||
const struct ieee80211_channel *sc_curchan;
|
||||
|
||||
struct iwn_rx_radiotap_header sc_rxtap;
|
||||
int sc_rxtap_len;
|
||||
struct iwn_tx_radiotap_header sc_txtap;
|
||||
int sc_txtap_len;
|
||||
|
||||
/* locks */
|
||||
struct mtx sc_mtx;
|
||||
|
||||
/* bus */
|
||||
device_t sc_dev;
|
||||
int mem_rid;
|
||||
int irq_rid;
|
||||
struct resource *mem;
|
||||
struct resource *irq;
|
||||
|
||||
/* shared area */
|
||||
struct iwn_dma_info shared_dma;
|
||||
struct iwn_shared *shared;
|
||||
|
||||
/* "keep warm" page */
|
||||
struct iwn_dma_info kw_dma;
|
||||
|
||||
/* firmware image */
|
||||
const struct firmware *fw_fp;
|
||||
|
||||
/* firmware DMA transfer */
|
||||
struct iwn_dma_info fw_dma;
|
||||
|
||||
/* rings */
|
||||
struct iwn_tx_ring txq[IWN_NTXQUEUES];
|
||||
struct iwn_rx_ring rxq;
|
||||
|
||||
bus_space_tag_t sc_st;
|
||||
bus_space_handle_t sc_sh;
|
||||
void *sc_ih;
|
||||
bus_size_t sc_sz;
|
||||
|
||||
/* command queue related variables */
|
||||
#define IWN_SCAN_START (1<<0)
|
||||
#define IWN_SCAN_CURCHAN (1<<1)
|
||||
#define IWN_SCAN_STOP (1<<2)
|
||||
#define IWN_SET_CHAN (1<<3)
|
||||
#define IWN_AUTH (1<<4)
|
||||
#define IWN_SCAN_NEXT (1<<5)
|
||||
#define IWN_RUN (1<<6)
|
||||
#define IWN_RADIO_ENABLE (1<<7)
|
||||
#define IWN_RADIO_DISABLE (1<<8)
|
||||
#define IWN_REINIT (1<<9)
|
||||
#define IWN_CMD_MAXOPS 10
|
||||
/* command queuing request type */
|
||||
#define IWN_QUEUE_NORMAL 0
|
||||
#define IWN_QUEUE_CLEAR 1
|
||||
int sc_cmd[IWN_CMD_MAXOPS];
|
||||
int sc_cmd_arg[IWN_CMD_MAXOPS];
|
||||
int sc_cmd_cur; /* current queued scan task */
|
||||
int sc_cmd_next; /* last queued scan task */
|
||||
struct mtx sc_cmdlock;
|
||||
|
||||
/* Task queues used to control the driver */
|
||||
struct taskqueue *sc_tq; /* Main command task queue */
|
||||
|
||||
/* Tasks used by the driver */
|
||||
struct task sc_ops_task; /* deferred ops */
|
||||
struct task sc_bmiss_task; /* beacon miss */
|
||||
|
||||
/* Thermal calibration */
|
||||
int calib_cnt;
|
||||
struct iwn_calib_state calib;
|
||||
|
||||
struct iwn_rx_stat last_rx_stat;
|
||||
int last_rx_valid;
|
||||
struct iwn_ucode_info ucode_info;
|
||||
struct iwn_config config;
|
||||
uint32_t rawtemp;
|
||||
int temp;
|
||||
int noise;
|
||||
uint8_t antmsk;
|
||||
|
||||
struct iwn_eeprom_band bands[IWN_NBANDS];
|
||||
int16_t eeprom_voltage;
|
||||
int8_t maxpwr2GHz;
|
||||
int8_t maxpwr5GHz;
|
||||
};
|
||||
|
||||
#define IWN_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->sc_dev), \
|
||||
MTX_NETWORK_LOCK, MTX_DEF)
|
||||
#define IWN_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
|
||||
#define IWN_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED)
|
||||
#define IWN_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
|
||||
#define IWN_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx)
|
||||
#define IWN_CMD_LOCK_INIT(_sc) \
|
||||
mtx_init(&(_sc)->sc_cmdlock, device_get_nameunit((_sc)->sc_dev), \
|
||||
NULL, MTX_DEF);
|
||||
#define IWN_CMD_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_cmdlock)
|
||||
#define IWN_CMD_LOCK(_sc) mtx_lock(&(_sc)->sc_cmdlock)
|
||||
#define IWN_CMD_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_cmdlock)
|
||||
@ -585,6 +585,7 @@ hint.mse.0.irq="5"
|
||||
# Intel EtherExpress
|
||||
# ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter
|
||||
# iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters
|
||||
# iwn: Intel Wireless WiFi Link 4965AGN 802.11 network adapters
|
||||
# nfe: nVidia nForce MCP on-board Ethernet Networking (BSD open source)
|
||||
# nve: nVidia nForce MCP on-board Ethernet Networking
|
||||
# oltr: Olicom ISA token-ring adapters OC-3115, OC-3117, OC-3118 and OC-3133.
|
||||
@ -638,6 +639,7 @@ hint.ie.2.port="0x300"
|
||||
hint.ie.2.irq="5"
|
||||
hint.ie.2.maddr="0xd0000"
|
||||
device iwi
|
||||
device iwn
|
||||
device ipw
|
||||
# Hint for the i386-only ISA front-end of le(4).
|
||||
hint.le.0.at="isa"
|
||||
|
||||
@ -137,6 +137,8 @@ SUBDIR= ${_3dfx} \
|
||||
ispfw \
|
||||
${_iwi} \
|
||||
${_iwifw} \
|
||||
${_iwn} \
|
||||
${_iwnfw} \
|
||||
${_ixgb} \
|
||||
joy \
|
||||
${_k8temp} \
|
||||
@ -468,6 +470,8 @@ _ipw= ipw
|
||||
_ipwfw= ipwfw
|
||||
_iwi= iwi
|
||||
_iwifw= iwifw
|
||||
_iwn= iwn
|
||||
_iwnfw= iwnfw
|
||||
_ixgb= ixgb
|
||||
_mly= mly
|
||||
_nfe= nfe
|
||||
@ -530,6 +534,8 @@ _ipmi= ipmi
|
||||
_ips= ips
|
||||
_ipw= ipw
|
||||
_ipwfw= ipwfw
|
||||
_iwn= iwn
|
||||
_iwnfw= iwnfw
|
||||
_ixgb= ixgb
|
||||
_k8temp= k8temp
|
||||
_linprocfs= linprocfs
|
||||
|
||||
8
sys/modules/iwn/Makefile
Normal file
8
sys/modules/iwn/Makefile
Normal file
@ -0,0 +1,8 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../dev/iwn
|
||||
|
||||
KMOD = if_iwn
|
||||
SRCS = if_iwn.c opt_bdg.h device_if.h bus_if.h pci_if.h
|
||||
CFLAGS += -g -DWITNESS -DINVARIANT_SUPPORT -DINVARIANTS -I${.CURDIR}/../../
|
||||
.include <bsd.kmod.mk>
|
||||
14
sys/modules/iwnfw/Makefile
Normal file
14
sys/modules/iwnfw/Makefile
Normal file
@ -0,0 +1,14 @@
|
||||
# $FreeBSD$
|
||||
|
||||
.PATH: ${.CURDIR}/../../contrib/dev/iwn
|
||||
|
||||
KMOD= iwnfw
|
||||
FIRMWS= iwlwifi-4965-4.44.17.fw:iwnfw:44417
|
||||
FIRMWARE_LICENSE= intel_iwn
|
||||
|
||||
CLEANFILES= iwlwifi-4965-4.44.17.fw
|
||||
|
||||
iwlwifi-4965-4.44.17.fw: ${.CURDIR}/../../contrib/dev/iwn/iwlwifi-4965-4.44.17.fw.uu
|
||||
uudecode -p ${.CURDIR}/../../contrib/dev/iwn/iwlwifi-4965-4.44.17.fw.uu > ${.TARGET}
|
||||
|
||||
.include <bsd.kmod.mk>
|
||||
Loading…
Reference in New Issue
Block a user