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Some PC Card variants of the 82365 don't seem to like setting the IRQ

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number in the irq register.  While there are other issues with these
variants, avoiding writing to it helps interrupt generation on at
least one card, and doesn't hurt on the others.  Flag ISA attachment
as needing INT_NO_REG written, and don't update the PC Card attachment
(which will have the effect of not touching it for PC Cards).

Document this in a comment, and tweak one or two formatting nits while
I'm here.
This commit is contained in:
imp 2008-08-24 00:22:42 +00:00
parent a3baa9b359
commit 8c6bf65efb
3 changed files with 18 additions and 10 deletions
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18
sys/dev/ex/if_ex.c
View File

@ -325,24 +325,30 @@ ex_init_locked(struct ex_softc *sc)
*/
CSR_WRITE_1(sc, CMD_REG, Bank2_Sel);
temp_reg = CSR_READ_1(sc, EEPROM_REG);
if (temp_reg & Trnoff_Enable) {
if (temp_reg & Trnoff_Enable)
CSR_WRITE_1(sc, EEPROM_REG, temp_reg & ~Trnoff_Enable);
}
for (i = 0; i < ETHER_ADDR_LEN; i++) {
for (i = 0; i < ETHER_ADDR_LEN; i++)
CSR_WRITE_1(sc, I_ADDR_REG0 + i, IF_LLADDR(sc->ifp)[i]);
}
/*
* - Setup transmit chaining and discard bad received frames.
* - Match broadcast.
* - Clear test mode.
* - Set receiving mode.
* - Set IRQ number.
*/
CSR_WRITE_1(sc, REG1, CSR_READ_1(sc, REG1) | Tx_Chn_Int_Md | Tx_Chn_ErStp | Disc_Bad_Fr);
CSR_WRITE_1(sc, REG2, CSR_READ_1(sc, REG2) | No_SA_Ins | RX_CRC_InMem);
CSR_WRITE_1(sc, REG3, CSR_READ_1(sc, REG3) & 0x3f /* XXX constants. */ );
/*
* - Set IRQ number, if this part has it. ISA devices have this,
* while PC Card devices don't seem to. Either way, we have to
* switch to Bank1 as the rest of this code relies on that.
*/
CSR_WRITE_1(sc, CMD_REG, Bank1_Sel);
CSR_WRITE_1(sc, INT_NO_REG, (CSR_READ_1(sc, INT_NO_REG) & 0xf8) | sc->irq2ee[sc->irq_no]);
if (sc->flags & HAS_INT_NO_REG)
CSR_WRITE_1(sc, INT_NO_REG,
(CSR_READ_1(sc, INT_NO_REG) & 0xf8) |
sc->irq2ee[sc->irq_no]);
/*
* Divide the available memory in the card into rcv and xmt buffers.

8
sys/dev/ex/if_ex_isa.c
View File

@ -247,12 +247,11 @@ ex_isa_probe(device_t dev)
tmp = ex_eeprom_read(sc, EE_W1) & EE_W1_INT_SEL;
irq = bus_get_resource_start(dev, SYS_RES_IRQ, 0);
if (irq > 0) {
/* This will happen if board is in PnP mode. */
if (ee2irq[tmp] != irq) {
printf("ex: WARNING: board's EEPROM is configured"
" for IRQ %d, using %d\n",
device_printf(dev,
"WARNING: IRQ mismatch: EEPROM %d, using %d\n",
ee2irq[tmp], irq);
}
} else {
@ -267,7 +266,7 @@ ex_isa_probe(device_t dev)
bad:;
ex_release_resources(dev);
return(error);
return (error);
}
static int
@ -280,6 +279,7 @@ ex_isa_attach(device_t dev)
sc->dev = dev;
sc->ioport_rid = 0;
sc->irq_rid = 0;
sc->flags |= HAS_INT_NO_REG;
if ((error = ex_alloc_resources(dev)) != 0) {
device_printf(dev, "ex_alloc_resources() failed!\n");

2
sys/dev/ex/if_exvar.h
View File

@ -68,6 +68,8 @@ struct ex_softc {
struct mtx lock;
struct callout timer;
int tx_timeout;
int flags;
#define HAS_INT_NO_REG 1
};
extern devclass_t ex_devclass;