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DMA synchronization fixes:

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- In bce_rx_intr(), use BUS_DMASYNC_POSTREAD instead of
   BUS_DMASYNC_POSTWRITE, as we want to "read" from the
   rx page chain pages.
 - Document why we need to do PREWRITE after we have updated
   the rx page chain pages.
 - In bce_intr(), use BUS_DMASYNC_POSTREAD and
   BUS_DMASYNC_PREREAD when before and after CPU "reading"
   the status block.
 - Adjust some nearby style mismatches/etc.

Pointed out by:	yongari
Approved by:	davidch (no objection) but bugs are mine :)
This commit is contained in:
delphij 2009-05-18 01:51:52 +00:00
parent c690953dc5
commit 8dd08ce265
1 changed files with 13 additions and 16 deletions
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29
sys/dev/bce/if_bce.c
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@ -4884,7 +4884,7 @@ bce_get_rx_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod,
KASSERT(nsegs == 1, ("%s(): Too many segments returned (%d)!",
__FUNCTION__, nsegs));
/* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREWRITE) here? */
/* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREREAD) here? */
/* Setup the rx_bd for the segment. */
rxbd = &sc->rx_bd_chain[RX_PAGE(*chain_prod)][RX_IDX(*chain_prod)];
@ -4993,7 +4993,7 @@ bce_get_pg_buf(struct bce_softc *sc, struct mbuf *m, u16 *prod,
goto bce_get_pg_buf_exit;
}
/* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREWRITE) here? */
/* ToDo: Do we need bus_dmamap_sync(,,BUS_DMASYNC_PREREAD) here? */
/*
* The page chain uses the same rx_bd data structure
@ -5270,13 +5270,11 @@ bce_init_rx_chain(struct bce_softc *sc)
rxbd->rx_bd_haddr_lo = htole32(BCE_ADDR_LO(sc->rx_bd_chain_paddr[j]));
}
/* Fill up the RX chain. */
/* Fill up the RX chain. */
bce_fill_rx_chain(sc);
for (i = 0; i < RX_PAGES; i++) {
bus_dmamap_sync(
sc->rx_bd_chain_tag,
sc->rx_bd_chain_map[i],
bus_dmamap_sync(sc->rx_bd_chain_tag, sc->rx_bd_chain_map[i],
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
@ -5447,9 +5445,7 @@ bce_init_pg_chain(struct bce_softc *sc)
bce_fill_pg_chain(sc);
for (i = 0; i < PG_PAGES; i++) {
bus_dmamap_sync(
sc->pg_bd_chain_tag,
sc->pg_bd_chain_map[i],
bus_dmamap_sync(sc->pg_bd_chain_tag, sc->pg_bd_chain_map[i],
BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
}
@ -5732,13 +5728,13 @@ bce_rx_intr(struct bce_softc *sc)
/* Prepare the RX chain pages to be accessed by the host CPU. */
for (int i = 0; i < RX_PAGES; i++)
bus_dmamap_sync(sc->rx_bd_chain_tag,
sc->rx_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
sc->rx_bd_chain_map[i], BUS_DMASYNC_POSTREAD);
#ifdef ZERO_COPY_SOCKETS
/* Prepare the page chain pages to be accessed by the host CPU. */
for (int i = 0; i < PG_PAGES; i++)
bus_dmamap_sync(sc->pg_bd_chain_tag,
sc->pg_bd_chain_map[i], BUS_DMASYNC_POSTWRITE);
sc->pg_bd_chain_map[i], BUS_DMASYNC_POSTREAD);
#endif
/* Get the hardware's view of the RX consumer index. */
@ -5765,9 +5761,8 @@ bce_rx_intr(struct bce_softc *sc)
sw_rx_cons_idx = RX_CHAIN_IDX(sw_rx_cons);
/* Unmap the mbuf from DMA space. */
bus_dmamap_sync(sc->rx_mbuf_tag,
sc->rx_mbuf_map[sw_rx_cons_idx],
BUS_DMASYNC_POSTREAD);
bus_dmamap_sync(sc->rx_mbuf_tag, sc->rx_mbuf_map[sw_rx_cons_idx],
BUS_DMASYNC_POSTREAD);
bus_dmamap_unload(sc->rx_mbuf_tag,
sc->rx_mbuf_map[sw_rx_cons_idx]);
@ -6011,6 +6006,7 @@ bce_rx_intr(struct bce_softc *sc)
sc->rx_cons = sw_rx_cons;
bce_fill_rx_chain(sc);
/* Prepare the page chain pages to be accessed by the NIC. */
for (int i = 0; i < RX_PAGES; i++)
bus_dmamap_sync(sc->rx_bd_chain_tag,
sc->rx_bd_chain_map[i], BUS_DMASYNC_PREWRITE);
@ -7023,8 +7019,9 @@ bce_intr(void *xsc)
DBRUN(sc->interrupts_generated++);
/* Synchnorize before we read from interface's status block */
bus_dmamap_sync(sc->status_tag, sc->status_map,
BUS_DMASYNC_POSTWRITE);
BUS_DMASYNC_POSTREAD);
/*
* If the hardware status block index
@ -7112,7 +7109,7 @@ bce_intr(void *xsc)
}
bus_dmamap_sync(sc->status_tag, sc->status_map,
BUS_DMASYNC_PREWRITE);
BUS_DMASYNC_PREREAD);
/* Re-enable interrupts. */
bce_enable_intr(sc, 0);