Add support for firmware dump (a.k.a grcdump)
MFC after:5 days
This commit is contained in:
davidcs
parent
e70f99228b
commit
8e2166bd86
@ -736,6 +736,8 @@ static __noinline int bxe_nic_unload(struct bxe_softc *sc,
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static void bxe_handle_sp_tq(void *context, int pending);
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static void bxe_handle_fp_tq(void *context, int pending);
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static int bxe_add_cdev(struct bxe_softc *sc);
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static void bxe_del_cdev(struct bxe_softc *sc);
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/* calculate crc32 on a buffer (NOTE: crc32_length MUST be aligned to 8) */
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uint32_t
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@ -4503,7 +4505,7 @@ bxe_nic_unload(struct bxe_softc *sc,
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sc->rx_mode = BXE_RX_MODE_NONE;
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/* XXX set rx mode ??? */
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if (IS_PF(sc)) {
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if (IS_PF(sc) && !sc->grcdump_done) {
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/* set ALWAYS_ALIVE bit in shmem */
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sc->fw_drv_pulse_wr_seq |= DRV_PULSE_ALWAYS_ALIVE;
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@ -4523,7 +4525,8 @@ bxe_nic_unload(struct bxe_softc *sc,
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; /* bxe_vfpf_close_vf(sc); */
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} else if (unload_mode != UNLOAD_RECOVERY) {
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/* if this is a normal/close unload need to clean up chip */
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bxe_chip_cleanup(sc, unload_mode, keep_link);
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if (!sc->grcdump_done)
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bxe_chip_cleanup(sc, unload_mode, keep_link);
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} else {
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/* Send the UNLOAD_REQUEST to the MCP */
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bxe_send_unload_req(sc, unload_mode);
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@ -16276,6 +16279,12 @@ bxe_add_sysctls(struct bxe_softc *sc)
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CTLFLAG_RW, &sc->debug,
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"debug logging mode");
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sc->trigger_grcdump = 0;
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SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "trigger_grcdump",
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CTLFLAG_RW, &sc->trigger_grcdump, 0,
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"set by driver when a grcdump is needed");
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sc->rx_budget = bxe_rx_budget;
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SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_budget",
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CTLFLAG_RW, &sc->rx_budget, 0,
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@ -16404,8 +16413,20 @@ bxe_attach(device_t dev)
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return (ENXIO);
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}
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if (bxe_add_cdev(sc) != 0) {
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if (sc->ifp != NULL) {
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ether_ifdetach(sc->ifp);
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}
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ifmedia_removeall(&sc->ifmedia);
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bxe_release_mutexes(sc);
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bxe_deallocate_bars(sc);
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pci_disable_busmaster(dev);
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return (ENXIO);
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}
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/* allocate device interrupts */
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if (bxe_interrupt_alloc(sc) != 0) {
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bxe_del_cdev(sc);
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if (sc->ifp != NULL) {
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ether_ifdetach(sc->ifp);
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}
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@ -16419,6 +16440,7 @@ bxe_attach(device_t dev)
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/* allocate ilt */
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if (bxe_alloc_ilt_mem(sc) != 0) {
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bxe_interrupt_free(sc);
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bxe_del_cdev(sc);
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if (sc->ifp != NULL) {
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ether_ifdetach(sc->ifp);
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}
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@ -16433,6 +16455,7 @@ bxe_attach(device_t dev)
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if (bxe_alloc_hsi_mem(sc) != 0) {
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bxe_free_ilt_mem(sc);
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bxe_interrupt_free(sc);
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bxe_del_cdev(sc);
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if (sc->ifp != NULL) {
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ether_ifdetach(sc->ifp);
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}
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@ -16504,6 +16527,8 @@ bxe_detach(device_t dev)
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return(EBUSY);
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}
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bxe_del_cdev(sc);
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/* stop the periodic callout */
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bxe_periodic_stop(sc);
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@ -18824,3 +18849,457 @@ ecore_storm_memset_struct(struct bxe_softc *sc,
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}
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}
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/*
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* character device - ioctl interface definitions
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*/
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#include "bxe_dump.h"
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#include "bxe_ioctl.h"
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#include <sys/conf.h>
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static int bxe_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
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struct thread *td);
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static struct cdevsw bxe_cdevsw = {
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.d_version = D_VERSION,
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.d_ioctl = bxe_eioctl,
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.d_name = "bxecnic",
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};
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#define BXE_PATH(sc) (CHIP_IS_E1x(sc) ? 0 : (sc->pcie_func & 1))
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#define DUMP_ALL_PRESETS 0x1FFF
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#define DUMP_MAX_PRESETS 13
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#define IS_E1_REG(chips) ((chips & DUMP_CHIP_E1) == DUMP_CHIP_E1)
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#define IS_E1H_REG(chips) ((chips & DUMP_CHIP_E1H) == DUMP_CHIP_E1H)
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#define IS_E2_REG(chips) ((chips & DUMP_CHIP_E2) == DUMP_CHIP_E2)
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#define IS_E3A0_REG(chips) ((chips & DUMP_CHIP_E3A0) == DUMP_CHIP_E3A0)
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#define IS_E3B0_REG(chips) ((chips & DUMP_CHIP_E3B0) == DUMP_CHIP_E3B0)
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#define IS_REG_IN_PRESET(presets, idx) \
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((presets & (1 << (idx-1))) == (1 << (idx-1)))
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static int
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bxe_get_preset_regs_len(struct bxe_softc *sc, uint32_t preset)
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{
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if (CHIP_IS_E1(sc))
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return dump_num_registers[0][preset-1];
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else if (CHIP_IS_E1H(sc))
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return dump_num_registers[1][preset-1];
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else if (CHIP_IS_E2(sc))
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return dump_num_registers[2][preset-1];
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else if (CHIP_IS_E3A0(sc))
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return dump_num_registers[3][preset-1];
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else if (CHIP_IS_E3B0(sc))
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return dump_num_registers[4][preset-1];
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else
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return 0;
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}
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static int
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bxe_get_max_regs_len(struct bxe_softc *sc)
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{
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uint32_t preset_idx;
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int regdump_len32, len32;
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regdump_len32 = bxe_get_preset_regs_len(sc, 1);
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/* Calculate the total preset regs length */
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for (preset_idx = 2; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
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len32 = bxe_get_preset_regs_len(sc, preset_idx);
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if (regdump_len32 < len32)
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regdump_len32 = len32;
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}
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return regdump_len32;
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}
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static int
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bxe_get_total_regs_len32(struct bxe_softc *sc)
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{
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uint32_t preset_idx;
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int regdump_len32 = 0;
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/* Calculate the total preset regs length */
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for (preset_idx = 1; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
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regdump_len32 += bxe_get_preset_regs_len(sc, preset_idx);
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}
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return regdump_len32;
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}
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static const uint32_t *
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__bxe_get_page_addr_ar(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return page_vals_e2;
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else if (CHIP_IS_E3(sc))
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return page_vals_e3;
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else
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return NULL;
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}
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static uint32_t
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__bxe_get_page_reg_num(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return PAGE_MODE_VALUES_E2;
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else if (CHIP_IS_E3(sc))
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return PAGE_MODE_VALUES_E3;
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else
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return 0;
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}
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static const uint32_t *
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__bxe_get_page_write_ar(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return page_write_regs_e2;
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else if (CHIP_IS_E3(sc))
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return page_write_regs_e3;
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else
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return NULL;
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}
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static uint32_t
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__bxe_get_page_write_num(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return PAGE_WRITE_REGS_E2;
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else if (CHIP_IS_E3(sc))
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return PAGE_WRITE_REGS_E3;
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else
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return 0;
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}
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static const struct reg_addr *
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__bxe_get_page_read_ar(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return page_read_regs_e2;
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else if (CHIP_IS_E3(sc))
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return page_read_regs_e3;
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else
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return NULL;
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}
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static uint32_t
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__bxe_get_page_read_num(struct bxe_softc *sc)
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{
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if (CHIP_IS_E2(sc))
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return PAGE_READ_REGS_E2;
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else if (CHIP_IS_E3(sc))
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return PAGE_READ_REGS_E3;
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else
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return 0;
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}
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static bool
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bxe_is_reg_in_chip(struct bxe_softc *sc, const struct reg_addr *reg_info)
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{
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if (CHIP_IS_E1(sc))
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return IS_E1_REG(reg_info->chips);
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else if (CHIP_IS_E1H(sc))
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return IS_E1H_REG(reg_info->chips);
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else if (CHIP_IS_E2(sc))
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return IS_E2_REG(reg_info->chips);
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else if (CHIP_IS_E3A0(sc))
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return IS_E3A0_REG(reg_info->chips);
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else if (CHIP_IS_E3B0(sc))
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return IS_E3B0_REG(reg_info->chips);
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else
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return 0;
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}
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static bool
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bxe_is_wreg_in_chip(struct bxe_softc *sc, const struct wreg_addr *wreg_info)
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{
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if (CHIP_IS_E1(sc))
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return IS_E1_REG(wreg_info->chips);
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else if (CHIP_IS_E1H(sc))
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return IS_E1H_REG(wreg_info->chips);
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else if (CHIP_IS_E2(sc))
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return IS_E2_REG(wreg_info->chips);
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else if (CHIP_IS_E3A0(sc))
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return IS_E3A0_REG(wreg_info->chips);
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else if (CHIP_IS_E3B0(sc))
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return IS_E3B0_REG(wreg_info->chips);
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else
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return 0;
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}
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/**
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* bxe_read_pages_regs - read "paged" registers
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*
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* @bp device handle
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* @p output buffer
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*
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* Reads "paged" memories: memories that may only be read by first writing to a
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* specific address ("write address") and then reading from a specific address
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* ("read address"). There may be more than one write address per "page" and
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* more than one read address per write address.
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*/
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static void
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bxe_read_pages_regs(struct bxe_softc *sc, uint32_t *p, uint32_t preset)
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{
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uint32_t i, j, k, n;
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/* addresses of the paged registers */
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const uint32_t *page_addr = __bxe_get_page_addr_ar(sc);
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/* number of paged registers */
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int num_pages = __bxe_get_page_reg_num(sc);
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/* write addresses */
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const uint32_t *write_addr = __bxe_get_page_write_ar(sc);
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/* number of write addresses */
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int write_num = __bxe_get_page_write_num(sc);
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/* read addresses info */
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const struct reg_addr *read_addr = __bxe_get_page_read_ar(sc);
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/* number of read addresses */
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int read_num = __bxe_get_page_read_num(sc);
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uint32_t addr, size;
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for (i = 0; i < num_pages; i++) {
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for (j = 0; j < write_num; j++) {
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REG_WR(sc, write_addr[j], page_addr[i]);
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for (k = 0; k < read_num; k++) {
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if (IS_REG_IN_PRESET(read_addr[k].presets, preset)) {
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size = read_addr[k].size;
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for (n = 0; n < size; n++) {
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addr = read_addr[k].addr + n*4;
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*p++ = REG_RD(sc, addr);
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}
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}
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}
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}
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}
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return;
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}
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static int
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bxe_get_preset_regs(struct bxe_softc *sc, uint32_t *p, uint32_t preset)
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{
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uint32_t i, j, addr;
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const struct wreg_addr *wreg_addr_p = NULL;
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if (CHIP_IS_E1(sc))
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wreg_addr_p = &wreg_addr_e1;
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else if (CHIP_IS_E1H(sc))
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wreg_addr_p = &wreg_addr_e1h;
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else if (CHIP_IS_E2(sc))
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wreg_addr_p = &wreg_addr_e2;
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else if (CHIP_IS_E3A0(sc))
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wreg_addr_p = &wreg_addr_e3;
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else if (CHIP_IS_E3B0(sc))
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wreg_addr_p = &wreg_addr_e3b0;
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else
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return (-1);
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/* Read the idle_chk registers */
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for (i = 0; i < IDLE_REGS_COUNT; i++) {
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if (bxe_is_reg_in_chip(sc, &idle_reg_addrs[i]) &&
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IS_REG_IN_PRESET(idle_reg_addrs[i].presets, preset)) {
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for (j = 0; j < idle_reg_addrs[i].size; j++)
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*p++ = REG_RD(sc, idle_reg_addrs[i].addr + j*4);
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}
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}
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/* Read the regular registers */
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for (i = 0; i < REGS_COUNT; i++) {
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if (bxe_is_reg_in_chip(sc, ®_addrs[i]) &&
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IS_REG_IN_PRESET(reg_addrs[i].presets, preset)) {
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for (j = 0; j < reg_addrs[i].size; j++)
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*p++ = REG_RD(sc, reg_addrs[i].addr + j*4);
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}
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}
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/* Read the CAM registers */
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if (bxe_is_wreg_in_chip(sc, wreg_addr_p) &&
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IS_REG_IN_PRESET(wreg_addr_p->presets, preset)) {
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for (i = 0; i < wreg_addr_p->size; i++) {
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*p++ = REG_RD(sc, wreg_addr_p->addr + i*4);
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/* In case of wreg_addr register, read additional
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registers from read_regs array
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*/
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for (j = 0; j < wreg_addr_p->read_regs_count; j++) {
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addr = *(wreg_addr_p->read_regs);
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*p++ = REG_RD(sc, addr + j*4);
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}
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}
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}
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/* Paged registers are supported in E2 & E3 only */
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if (CHIP_IS_E2(sc) || CHIP_IS_E3(sc)) {
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/* Read "paged" registers */
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bxe_read_pages_regs(sc, p, preset);
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}
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return 0;
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}
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static int
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bxe_grc_dump(struct bxe_softc *sc, bxe_grcdump_t *dump)
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{
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int rval = 0;
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uint32_t preset_idx;
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uint8_t *buf;
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uint32_t size;
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struct dump_header *d_hdr;
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ecore_disable_blocks_parity(sc);
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buf = dump->grcdump;
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d_hdr = dump->grcdump;
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d_hdr->header_size = (sizeof(struct dump_header) >> 2) - 1;
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d_hdr->version = BNX2X_DUMP_VERSION;
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d_hdr->preset = DUMP_ALL_PRESETS;
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if (CHIP_IS_E1(sc)) {
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d_hdr->dump_meta_data = DUMP_CHIP_E1;
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} else if (CHIP_IS_E1H(sc)) {
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d_hdr->dump_meta_data = DUMP_CHIP_E1H;
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} else if (CHIP_IS_E2(sc)) {
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d_hdr->dump_meta_data = DUMP_CHIP_E2 |
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(BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
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} else if (CHIP_IS_E3A0(sc)) {
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d_hdr->dump_meta_data = DUMP_CHIP_E3A0 |
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(BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
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} else if (CHIP_IS_E3B0(sc)) {
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d_hdr->dump_meta_data = DUMP_CHIP_E3B0 |
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(BXE_PATH(sc) ? DUMP_PATH_1 : DUMP_PATH_0);
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}
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dump->grcdump_dwords = sizeof(struct dump_header) >> 2;
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buf += sizeof(struct dump_header);
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for (preset_idx = 1; preset_idx <= DUMP_MAX_PRESETS; preset_idx++) {
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/* Skip presets with IOR */
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if ((preset_idx == 2) || (preset_idx == 5) || (preset_idx == 8) ||
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(preset_idx == 11))
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continue;
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rval = bxe_get_preset_regs(sc, sc->grc_dump, preset_idx);
|
||||
|
||||
if (rval)
|
||||
break;
|
||||
|
||||
size = bxe_get_preset_regs_len(sc, preset_idx) * (sizeof (uint32_t));
|
||||
|
||||
rval = copyout(sc->grc_dump, buf, size);
|
||||
|
||||
if (rval)
|
||||
break;
|
||||
|
||||
dump->grcdump_dwords += (size / (sizeof (uint32_t)));
|
||||
|
||||
buf += size;
|
||||
}
|
||||
|
||||
ecore_clear_blocks_parity(sc);
|
||||
ecore_enable_blocks_parity(sc);
|
||||
|
||||
sc->grcdump_done = 1;
|
||||
return(rval);
|
||||
}
|
||||
|
||||
static int
|
||||
bxe_add_cdev(struct bxe_softc *sc)
|
||||
{
|
||||
int max_preset_size;
|
||||
|
||||
max_preset_size = bxe_get_max_regs_len(sc) * (sizeof (uint32_t));
|
||||
|
||||
sc->grc_dump = malloc(max_preset_size, M_DEVBUF, M_NOWAIT);
|
||||
|
||||
if (sc->grc_dump == NULL)
|
||||
return (-1);
|
||||
|
||||
sc->ioctl_dev = make_dev(&bxe_cdevsw,
|
||||
sc->ifp->if_dunit,
|
||||
UID_ROOT,
|
||||
GID_WHEEL,
|
||||
0600,
|
||||
"%s",
|
||||
if_name(sc->ifp));
|
||||
|
||||
if (sc->ioctl_dev == NULL) {
|
||||
|
||||
free(sc->grc_dump, M_DEVBUF);
|
||||
|
||||
return (-1);
|
||||
}
|
||||
|
||||
sc->ioctl_dev->si_drv1 = sc;
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
bxe_del_cdev(struct bxe_softc *sc)
|
||||
{
|
||||
if (sc->ioctl_dev != NULL)
|
||||
destroy_dev(sc->ioctl_dev);
|
||||
|
||||
if (sc->grc_dump == NULL)
|
||||
free(sc->grc_dump, M_DEVBUF);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static int
|
||||
bxe_eioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
|
||||
struct thread *td)
|
||||
{
|
||||
struct bxe_softc *sc;
|
||||
int rval = 0;
|
||||
device_t pci_dev;
|
||||
bxe_grcdump_t *dump = NULL;
|
||||
int grc_dump_size;
|
||||
|
||||
if ((sc = (struct bxe_softc *)dev->si_drv1) == NULL)
|
||||
return ENXIO;
|
||||
|
||||
pci_dev= sc->dev;
|
||||
|
||||
dump = (bxe_grcdump_t *)data;
|
||||
|
||||
switch(cmd) {
|
||||
|
||||
case BXE_GRC_DUMP_SIZE:
|
||||
dump->pci_func = sc->pcie_func;
|
||||
dump->grcdump_size = (bxe_get_total_regs_len32(sc) * sizeof(uint32_t)) +
|
||||
sizeof(struct dump_header);
|
||||
break;
|
||||
|
||||
case BXE_GRC_DUMP:
|
||||
|
||||
grc_dump_size = (bxe_get_total_regs_len32(sc) * sizeof(uint32_t)) +
|
||||
sizeof(struct dump_header);
|
||||
|
||||
if ((sc->grc_dump == NULL) || (dump->grcdump == NULL) ||
|
||||
(dump->grcdump_size < grc_dump_size)) {
|
||||
rval = EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
rval = bxe_grc_dump(sc, dump);
|
||||
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return (rval);
|
||||
}
|
||||
|
||||
@ -1830,6 +1830,11 @@ struct bxe_softc {
|
||||
uint8_t prio_to_cos[BXE_MAX_PRIORITY];
|
||||
|
||||
int panic;
|
||||
|
||||
struct cdev *ioctl_dev;
|
||||
void *grc_dump;
|
||||
int trigger_grcdump;
|
||||
int grcdump_done;
|
||||
}; /* struct bxe_softc */
|
||||
|
||||
/* IOCTL sub-commands for edebug and firmware upgrade */
|
||||
@ -2296,6 +2301,7 @@ void ecore_storm_memset_struct(struct bxe_softc *sc, uint32_t addr,
|
||||
"ERROR: " format, \
|
||||
## args); \
|
||||
} \
|
||||
sc->trigger_grcdump |= 0x1; \
|
||||
} while(0)
|
||||
|
||||
#ifdef ECORE_STOP_ON_ERROR
|
||||
|
||||
2231
sys/dev/bxe/bxe_dump.h
Normal file
2231
sys/dev/bxe/bxe_dump.h
Normal file
File diff suppressed because it is too large
Load Diff
57
sys/dev/bxe/bxe_ioctl.h
Normal file
57
sys/dev/bxe/bxe_ioctl.h
Normal file
@ -0,0 +1,57 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2016 Qlogic Corporation
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
||||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
||||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _BXE_IOCTL_H_
|
||||
#define _BXE_IOCTL_H_
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__FBSDID("$FreeBSD$");
|
||||
|
||||
#include <sys/ioccom.h>
|
||||
|
||||
|
||||
struct bxe_grcdump {
|
||||
uint16_t pci_func;
|
||||
uint32_t grcdump_size;
|
||||
void *grcdump;
|
||||
uint32_t grcdump_dwords;
|
||||
};
|
||||
typedef struct bxe_grcdump bxe_grcdump_t;
|
||||
|
||||
|
||||
/*
|
||||
* Read grcdump size
|
||||
*/
|
||||
#define BXE_GRC_DUMP_SIZE _IOWR('e', 1, bxe_grcdump_t)
|
||||
|
||||
/*
|
||||
* Read grcdump
|
||||
*/
|
||||
#define BXE_GRC_DUMP _IOWR('e', 2, bxe_grcdump_t)
|
||||
|
||||
|
||||
#endif /* #ifndef _QLNX_IOCTL_H_ */
|
||||
@ -749,10 +749,17 @@ static inline void ecore_set_mcp_parity(struct bxe_softc *sc, uint8_t enable)
|
||||
for (i = 0; i < ARRSIZE(mcp_attn_ctl_regs); i++) {
|
||||
reg_val = REG_RD(sc, mcp_attn_ctl_regs[i].addr);
|
||||
|
||||
#if 0
|
||||
if (enable)
|
||||
reg_val |= MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */
|
||||
else
|
||||
reg_val &= ~MISC_AEU_ENABLE_MCP_PRTY_BITS; /* Linux is using mcp_attn_ctl_regs[i].bits */
|
||||
#else
|
||||
if (enable)
|
||||
reg_val |= mcp_attn_ctl_regs[i].bits;
|
||||
else
|
||||
reg_val &= ~mcp_attn_ctl_regs[i].bits;
|
||||
#endif
|
||||
|
||||
REG_WR(sc, mcp_attn_ctl_regs[i].addr, reg_val);
|
||||
}
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user