Revert r316820.
Despite appearing correct, r316820 breaks packet rx/tx for jme(4) interfaces. With 12.1 approaching, let's just revert the commit for now. PR: 233952 Tested by: Armin Gruner <ag-freebsd@muc.de> MFC after: 3 days
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cc26c364ea
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@ -559,7 +559,7 @@ jme_map_intr_vector(struct jme_softc *sc)
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bzero(map, sizeof(map));
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/* Map Tx interrupts source to MSI/MSIX vector 2. */
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map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] |=
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map[MSINUM_REG_INDEX(N_INTR_TXQ0_COMP)] =
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ0_COMP);
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map[MSINUM_REG_INDEX(N_INTR_TXQ1_COMP)] |=
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ1_COMP);
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@ -581,37 +581,37 @@ jme_map_intr_vector(struct jme_softc *sc)
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MSINUM_INTR_SOURCE(2, N_INTR_TXQ_COAL_TO);
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/* Map Rx interrupts source to MSI/MSIX vector 1. */
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COMP)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COMP)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COMP)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COMP)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COMP);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_DESC_EMPTY)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_DESC_EMPTY)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_DESC_EMPTY)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_DESC_EMPTY)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_DESC_EMPTY);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL);
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ0_COAL_TO)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ0_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ1_COAL_TO)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ1_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ2_COAL_TO)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ2_COAL_TO);
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] |=
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map[MSINUM_REG_INDEX(N_INTR_RXQ3_COAL_TO)] =
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MSINUM_INTR_SOURCE(1, N_INTR_RXQ3_COAL_TO);
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/* Map all other interrupts source to MSI/MSIX vector 0. */
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