NVME: Multiple busdma related fixes.
- in nvme_qpair_process_completions() do dma sync before completion buffer is used. - in nvme_qpair_submit_tracker(), don't do explicit wmb() also for arm and arm64. Bus_dmamap_sync() on these architectures is sufficient to ensure that all CPU stores are visible to external (including DMA) observers. - Allocate completion buffer as BUS_DMA_COHERENT. On not-DMA coherent systems, buffers continuously owned (and accessed) by DMA must be allocated with this flag. Note that BUS_DMA_COHERENT flag is no-op on DMA coherent systems (or coherent buses in mixed systems). MFC after: 4 weeks Reviewed by: mav, imp Differential Revision: https://reviews.freebsd.org/D27446
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@ -547,6 +547,8 @@ nvme_qpair_process_completions(struct nvme_qpair *qpair)
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if (!qpair->is_enabled)
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return (false);
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bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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/*
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* A panic can stop the CPU this routine is running on at any point. If
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* we're called during a panic, complete the sq_head wrap protocol for
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@ -580,8 +582,6 @@ nvme_qpair_process_completions(struct nvme_qpair *qpair)
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}
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}
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bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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while (1) {
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cpl = qpair->cpl[qpair->cq_head];
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@ -722,7 +722,7 @@ nvme_qpair_construct(struct nvme_qpair *qpair,
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bus_dma_tag_set_domain(qpair->dma_tag, qpair->domain);
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if (bus_dmamem_alloc(qpair->dma_tag, (void **)&queuemem,
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BUS_DMA_NOWAIT, &qpair->queuemem_map)) {
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BUS_DMA_COHERENT | BUS_DMA_NOWAIT, &qpair->queuemem_map)) {
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nvme_printf(ctrlr, "failed to alloc qpair memory\n");
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goto out;
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}
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@ -982,7 +982,7 @@ nvme_qpair_submit_tracker(struct nvme_qpair *qpair, struct nvme_tracker *tr)
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bus_dmamap_sync(qpair->dma_tag, qpair->queuemem_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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#ifndef __powerpc__
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#if !defined( __powerpc__) && !defined( __aarch64__) && !defined( __arm__)
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/*
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* powerpc's bus_dmamap_sync() already includes a heavyweight sync, but
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* no other archs do.
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