Make the xl and pn drivers work on FreeBSD/alpha and add them to
sys/alpha/conf/GENERIC. Note: the PNIC ignores the lower few bits of the RX buffer DMA address, which means we have to add yet another kludge to make it happy. Since we can't offset the packet data, we copy the first few bytes of the received data into a separate mbuf with proper alignment. This puts the IP header where it needs to be to prevent unaligned accesses. Also modified the PNIC driver to use a non-interrupt driven TX strategy. This improves performance somewhat on x86/SMP systems where interrupt delivery doesn't seem to be as fast with an SMP kernel as with a UP kernel.
This commit is contained in:
Bill Paul
parent
fa93788041
commit
8fe2c75e31
@ -11,7 +11,7 @@
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# device lines is present in the ./LINT configuration file. If you are
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# in doubt as to the purpose or necessity of a line, check first in LINT.
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#
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# $Id: GENERIC,v 1.14 1999/01/18 20:26:50 gallatin Exp $
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# $Id: GENERIC,v 1.15 1999/01/23 16:53:26 dfr Exp $
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machine "alpha"
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cpu "EV4"
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@ -100,6 +100,8 @@ device sio1 at isa0 port "IO_COM2" irq 3 flags 0x50
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device de0
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device fxp0
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device le0
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device pn0
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device xl0
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pseudo-device loop
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pseudo-device ether
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@ -11,7 +11,7 @@
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# device lines is present in the ./LINT configuration file. If you are
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# in doubt as to the purpose or necessity of a line, check first in LINT.
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#
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# $Id: GENERIC,v 1.14 1999/01/18 20:26:50 gallatin Exp $
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# $Id: GENERIC,v 1.15 1999/01/23 16:53:26 dfr Exp $
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machine "alpha"
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cpu "EV4"
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@ -100,6 +100,8 @@ device sio1 at isa0 port "IO_COM2" irq 3 flags 0x50
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device de0
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device fxp0
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device le0
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device pn0
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device xl0
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pseudo-device loop
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pseudo-device ether
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@ -29,7 +29,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_pn.c,v 1.37 1999/02/26 07:49:31 wpaul Exp $
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* $Id: if_pn.c,v 1.41 1999/03/27 20:32:32 wpaul Exp $
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*/
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/*
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@ -97,7 +97,7 @@
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#ifndef lint
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static const char rcsid[] =
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"$Id: if_pn.c,v 1.37 1999/02/26 07:49:31 wpaul Exp $";
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"$Id: if_pn.c,v 1.41 1999/03/27 20:32:32 wpaul Exp $";
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#endif
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/*
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@ -855,7 +855,12 @@ pn_attach(config_id, unit)
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printf ("pn%d: couldn't map ports\n", unit);
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goto fail;
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}
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#ifdef __i386__
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sc->pn_btag = I386_BUS_SPACE_IO;
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#endif
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#ifdef __alpha__
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sc->pn_btag = ALPHA_BUS_SPACE_IO;
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#endif
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#else
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if (!(command & PCIM_CMD_MEMEN)) {
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printf("pn%d: failed to enable memory mapping!\n", unit);
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@ -867,7 +872,12 @@ pn_attach(config_id, unit)
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goto fail;
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}
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sc->pn_bhandle = vbase;
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#ifdef __i386__
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sc->pn_btag = I386_BUS_SPACE_MEM;
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#endif
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#ifdef __alpha__
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sc->pn_btag = ALPHA_BUS_SPACE_MEM;
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#endif
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#endif
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/* Allocate interrupt */
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@ -1246,6 +1256,9 @@ static void pn_rxeof(sc)
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while(!((rxstat = sc->pn_cdata.pn_rx_head->pn_ptr->pn_status) &
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PN_RXSTAT_OWN)) {
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#ifdef __alpha__
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struct mbuf *m0 = NULL;
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#endif
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cur_rx = sc->pn_cdata.pn_rx_head;
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sc->pn_cdata.pn_rx_head = cur_rx->pn_nextdesc;
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@ -1305,10 +1318,51 @@ static void pn_rxeof(sc)
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continue;
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}
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#ifdef __alpha__
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/*
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* Grrrr! On the alpha platform, the start of the
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* packet data must be longword aligned so that ip_input()
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* doesn't perform any unaligned accesses when it tries
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* to fiddle with the IP header. But the PNIC is stupid
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* and wants RX buffers to start on longword boundaries.
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* So we can't just shift the DMA address over a few
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* bytes to alter the payload alignment. Instead, we
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* have to chop out ethernet and IP header parts of
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* the packet and place then in a separate mbuf with
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* the alignment fixed up properly.
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*
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* As if this chip wasn't broken enough already.
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*/
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MGETHDR(m0, M_DONTWAIT, MT_DATA);
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if (m0 == NULL) {
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ifp->if_ierrors++;
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cur_rx->pn_ptr->pn_status = PN_RXSTAT;
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cur_rx->pn_ptr->pn_ctl = PN_RXCTL_RLINK | PN_RXLEN;
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bzero((char *)mtod(cur_rx->pn_mbuf, char *), MCLBYTES);
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continue;
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}
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m0->m_data += 2;
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if (total_len <= (MHLEN - 2)) {
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bcopy(mtod(m, caddr_t), mtod(m0, caddr_t), total_len); m_freem(m);
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m = m0;
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m->m_pkthdr.len = m->m_len = total_len;
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} else {
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bcopy(mtod(m, caddr_t), mtod(m0, caddr_t), (MHLEN - 2));
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m->m_len = total_len - (MHLEN - 2);
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m->m_data += (MHLEN - 2);
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m0->m_next = m;
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m0->m_len = (MHLEN - 2);
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m = m0;
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m->m_pkthdr.len = total_len;
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}
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#else
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m->m_pkthdr.len = m->m_len = total_len;
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#endif
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ifp->if_ipackets++;
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eh = mtod(m, struct ether_header *);
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m->m_pkthdr.rcvif = ifp;
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m->m_pkthdr.len = m->m_len = total_len;
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#if NBPFILTER > 0
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/*
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* Handle BPF listeners. Let the BPF user see the packet, but
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@ -1377,7 +1431,7 @@ static void pn_txeof(sc)
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cur_tx = sc->pn_cdata.pn_tx_head;
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txstat = PN_TXSTATUS(cur_tx);
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if ((txstat & PN_TXSTAT_OWN) || txstat == PN_UNSENT)
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if (txstat & PN_TXSTAT_OWN)
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break;
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if (txstat & PN_TXSTAT_ERRSUM) {
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@ -1424,12 +1478,6 @@ static void pn_txeoc(sc)
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sc->pn_cdata.pn_tx_tail = NULL;
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if (sc->pn_want_auto)
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pn_autoneg_mii(sc, PN_FLAG_SCHEDDELAY, 1);
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} else {
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if (PN_TXOWN(sc->pn_cdata.pn_tx_head) == PN_UNSENT) {
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PN_TXOWN(sc->pn_cdata.pn_tx_head) = PN_TXSTAT_OWN;
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ifp->if_timer = 5;
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CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF);
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}
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}
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return;
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@ -1588,7 +1636,7 @@ static int pn_encap(sc, c, m_head)
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c->pn_mbuf = m_head;
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c->pn_lastdesc = frag - 1;
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PN_TXCTL(c) |= PN_TXCTL_LASTFRAG;
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PN_TXCTL(c) |= PN_TXCTL_LASTFRAG|PN_TXCTL_FINT;
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PN_TXNEXT(c) = vtophys(&c->pn_nextdesc->pn_ptr->pn_frag[0]);
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return(0);
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@ -1649,6 +1697,8 @@ static void pn_start(ifp)
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if (ifp->if_bpf)
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bpf_mtap(ifp, cur_tx->pn_mbuf);
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#endif
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PN_TXOWN(cur_tx) = PN_TXSTAT_OWN;
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CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF);
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}
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/*
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@ -1657,23 +1707,10 @@ static void pn_start(ifp)
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if (cur_tx == NULL)
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return;
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/*
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* Place the request for the upload interrupt
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* in the last descriptor in the chain. This way, if
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* we're chaining several packets at once, we'll only
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* get an interupt once for the whole chain rather than
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* once for each packet.
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*/
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PN_TXCTL(cur_tx) |= PN_TXCTL_FINT;
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sc->pn_cdata.pn_tx_tail = cur_tx;
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if (sc->pn_cdata.pn_tx_head == NULL) {
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if (sc->pn_cdata.pn_tx_head == NULL)
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sc->pn_cdata.pn_tx_head = start_tx;
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PN_TXOWN(start_tx) = PN_TXSTAT_OWN;
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CSR_WRITE_4(sc, PN_TXSTART, 0xFFFFFFFF);
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} else {
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PN_TXOWN(start_tx) = PN_UNSENT;
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}
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/*
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* Set a timeout in case the chip goes out to lunch.
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@ -29,7 +29,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_pnreg.h,v 1.17 1999/02/26 07:49:31 wpaul Exp $
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* $Id: if_pnreg.h,v 1.21 1999/03/27 20:08:53 wpaul Exp $
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*/
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/*
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@ -367,8 +367,6 @@ struct pn_txdesc {
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#define PN_TXOWN(x) x->pn_ptr->pn_frag[0].pn_status
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#define PN_UNSENT 0x12344321
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struct pn_list_data {
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struct pn_desc pn_rx_list[PN_RX_LIST_CNT];
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struct pn_txdesc pn_tx_list[PN_TX_LIST_CNT];
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@ -458,7 +456,7 @@ struct pn_softc {
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->pn_btag, sc->pn_bhandle, reg, val)
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#define CSR_WRITE_2(sc, reg, val) \
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bus_space_write_2(sc->pn_btag, sc->pn_bbhandle, reg, val)
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bus_space_write_2(sc->pn_btag, sc->pn_bhandle, reg, val)
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#define CSR_WRITE_1(sc, reg, val) \
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bus_space_write_1(sc->pn_btag, sc->pn_bhandle, reg, val)
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@ -651,3 +649,9 @@ struct pn_softc {
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#define PHY_BMSR_LINKSTAT 0x0004
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#define PHY_BMSR_JABBER 0x0002
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#define PHY_BMSR_EXTENDED 0x0001
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#ifdef __alpha__
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#undef vtophys
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#define vtophys(va) (pmap_kextract(((vm_offset_t) (va))) \
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+ 1*1024*1024*1024)
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#endif
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@ -29,7 +29,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_xl.c,v 1.24 1999/02/11 23:59:29 wpaul Exp $
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* $Id: if_xl.c,v 1.68 1999/03/27 20:35:14 wpaul Exp $
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*/
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/*
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@ -107,6 +107,9 @@
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#include <vm/vm.h> /* for vtophys */
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#include <vm/pmap.h> /* for vtophys */
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#include <machine/clock.h> /* for DELAY */
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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@ -147,7 +150,7 @@
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#if !defined(lint)
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static const char rcsid[] =
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"$Id: if_xl.c,v 1.24 1999/02/11 23:59:29 wpaul Exp $";
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"$Id: if_xl.c,v 1.68 1999/03/27 20:35:14 wpaul Exp $";
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#endif
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/*
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@ -1387,7 +1390,18 @@ xl_attach(config_id, unit)
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goto fail;
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}
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sc->iobase = pci_conf_read(config_id, XL_PCI_LOIO) & 0xFFFFFFE0;
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if (!pci_map_port(config_id, XL_PCI_LOIO,
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(u_short *)&(sc->xl_bhandle))) {
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printf ("xl%d: couldn't map port\n", unit);
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goto fail;
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}
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#ifdef __i386__
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sc->xl_btag = I386_BUS_SPACE_IO;
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#endif
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#ifdef __alpha__
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sc->xl_btag = ALPHA_BUS_SPACE_IO;
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#endif
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#else
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if (!(command & PCIM_CMD_MEMEN)) {
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printf("xl%d: failed to enable memory mapping!\n", unit);
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@ -1398,7 +1412,13 @@ xl_attach(config_id, unit)
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printf ("xl%d: couldn't map memory\n", unit);
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goto fail;
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}
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sc->csr = (volatile caddr_t)vbase;
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sc->xl_bhandle = vbase;
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#ifdef __i386__
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sc->xl_btag = I386_BUS_SPACE_MEM;
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#endif
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#ifdef __alpha__
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sc->xl_btag = ALPHA_BUS_SPACE_MEM;
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#endif
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#endif
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/* Allocate interrupt */
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@ -1768,6 +1788,11 @@ static int xl_newbuf(sc, c)
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return(ENOBUFS);
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}
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#ifdef __alpha__
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/* Force longword alignment for packet payload to pacify alpha. */
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m_new->m_data += 2;
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#endif
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c->xl_mbuf = m_new;
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c->xl_ptr->xl_status = 0;
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c->xl_ptr->xl_frag.xl_addr = vtophys(mtod(m_new, caddr_t));
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@ -29,7 +29,7 @@
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: if_xlreg.h,v 1.19 1998/10/22 15:35:06 wpaul Exp $
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* $Id: if_xlreg.h,v 1.20 1999/03/27 20:10:10 wpaul Exp $
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*/
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#define XL_EE_READ 0x0080 /* read, 5 bit address */
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@ -539,10 +539,8 @@ struct xl_mii_frame {
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struct xl_softc {
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struct arpcom arpcom; /* interface info */
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struct ifmedia ifmedia; /* media info */
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u_int32_t iobase; /* pointer to PIO space */
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#ifndef XL_USEIOSPACE
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volatile caddr_t csr; /* pointer to register map */
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#endif
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bus_space_handle_t xl_bhandle;
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bus_space_tag_t xl_btag;
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struct xl_type *xl_info; /* 3Com adapter info */
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struct xl_type *xl_pinfo; /* phy info */
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u_int8_t xl_unit; /* interface number */
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@ -586,35 +584,19 @@ struct xl_stats {
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/*
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* register space access macros
|
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*/
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#ifdef XL_USEIOSPACE
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#define CSR_WRITE_4(sc, reg, val) \
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outl(sc->iobase + (u_int32_t)(reg), val)
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bus_space_write_4(sc->xl_btag, sc->xl_bhandle, reg, val)
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#define CSR_WRITE_2(sc, reg, val) \
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outw(sc->iobase + (u_int32_t)(reg), val)
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bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
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#define CSR_WRITE_1(sc, reg, val) \
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outb(sc->iobase + (u_int32_t)(reg), val)
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bus_space_write_1(sc->xl_btag, sc->xl_bhandle, reg, val)
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#define CSR_READ_4(sc, reg) \
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inl(sc->iobase + (u_int32_t)(reg))
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#define CSR_READ_2(sc, reg) \
|
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inw(sc->iobase + (u_int32_t)(reg))
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#define CSR_READ_1(sc, reg) \
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inb(sc->iobase + (u_int32_t)(reg))
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#else
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#define CSR_WRITE_4(sc, reg, val) \
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((*(u_int32_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int32_t)(val))
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#define CSR_WRITE_2(sc, reg, val) \
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((*(u_int16_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int16_t)(val))
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#define CSR_WRITE_1(sc, reg, val) \
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((*(u_int8_t*)((sc)->csr + (u_int32_t)(reg))) = (u_int8_t)(val))
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#define CSR_READ_4(sc, reg) \
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(*(u_int32_t *)((sc)->csr + (u_int32_t)(reg)))
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#define CSR_READ_2(sc, reg) \
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(*(u_int16_t *)((sc)->csr + (u_int32_t)(reg)))
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#define CSR_READ_1(sc, reg) \
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(*(u_int8_t *)((sc)->csr + (u_int32_t)(reg)))
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#endif
|
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#define CSR_READ_4(sc, reg) \
|
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bus_space_read_4(sc->xl_btag, sc->xl_bhandle, reg)
|
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#define CSR_READ_2(sc, reg) \
|
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bus_space_read_2(sc->xl_btag, sc->xl_bhandle, reg)
|
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#define CSR_READ_1(sc, reg) \
|
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bus_space_read_1(sc->xl_btag, sc->xl_bhandle, reg)
|
||||
|
||||
#define XL_SEL_WIN(x) \
|
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CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_WINSEL | x)
|
||||
@ -822,3 +804,9 @@ struct xl_stats {
|
||||
#define PHY_BMSR_LINKSTAT 0x0004
|
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#define PHY_BMSR_JABBER 0x0002
|
||||
#define PHY_BMSR_EXTENDED 0x0001
|
||||
|
||||
#ifdef __alpha__
|
||||
#undef vtophys
|
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#define vtophys(va) (pmap_kextract(((vm_offset_t) (va))) \
|
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+ 1*1024*1024*1024)
|
||||
#endif
|
||||
|
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Reference in New Issue
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