Remove arm64_idcache_wbinv_range as it's unused.
Sponsored by: Innovate UK
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5079660689
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90285c8b57
@ -132,14 +132,6 @@ ENTRY(arm64_dcache_inv_range)
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ret
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END(arm64_dcache_inv_range)
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/*
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* void arm64_idcache_wbinv_range(vm_offset_t, vm_size_t)
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*/
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ENTRY(arm64_idcache_wbinv_range)
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cache_handle_range dcop = civac, ic = 1, icop = ivau
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ret
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END(arm64_idcache_wbinv_range)
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/*
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* void arm64_icache_sync_range(vm_offset_t, vm_size_t)
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*/
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@ -216,7 +216,6 @@ extern int64_t dczva_line_size;
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#define cpu_dcache_inv_range(a, s) arm64_dcache_inv_range((a), (s))
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#define cpu_dcache_wb_range(a, s) arm64_dcache_wb_range((a), (s))
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#define cpu_idcache_wbinv_range(a, s) arm64_idcache_wbinv_range((a), (s))
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#define cpu_icache_sync_range(a, s) arm64_icache_sync_range((a), (s))
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#define cpu_icache_sync_range_checked(a, s) arm64_icache_sync_range_checked((a), (s))
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@ -224,7 +223,6 @@ void arm64_nullop(void);
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void arm64_tlb_flushID(void);
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void arm64_icache_sync_range(vm_offset_t, vm_size_t);
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int arm64_icache_sync_range_checked(vm_offset_t, vm_size_t);
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void arm64_idcache_wbinv_range(vm_offset_t, vm_size_t);
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void arm64_dcache_wbinv_range(vm_offset_t, vm_size_t);
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void arm64_dcache_inv_range(vm_offset_t, vm_size_t);
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void arm64_dcache_wb_range(vm_offset_t, vm_size_t);
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