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Cache the value of the lower half of each I/O APIC redirection table entry

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so that we only have to do an ioapic_write() instead of an ioapic_read()
followed by an ioapic_write() every time we mask and unmask level triggered
interrupts.  This cuts the execution time for these operations roughly in
half.

Profiled by:	Paolo Pisati <p.pisati@oltrelinux.com>
MFC after:	1 week
This commit is contained in:
John Baldwin 2006-04-05 20:43:19 +00:00
parent f90cbdf17f
commit 907d4d7f45
2 changed files with 8 additions and 12 deletions
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10
sys/amd64/amd64/io_apic.c
View File

@ -89,6 +89,7 @@ struct ioapic_intsrc {
u_int io_edgetrigger:1;
u_int io_masked:1;
int io_bus:4;
uint32_t io_lowreg;
};
struct ioapic {
@ -207,9 +208,7 @@ ioapic_enable_source(struct intsrc *isrc)
mtx_lock_spin(&icu_lock);
if (intpin->io_masked) {
flags = ioapic_read(io->io_addr,
IOAPIC_REDTBL_LO(intpin->io_intpin));
flags &= ~(IOART_INTMASK);
flags = intpin->io_lowreg & ~IOART_INTMASK;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
flags);
intpin->io_masked = 0;
@ -226,9 +225,7 @@ ioapic_disable_source(struct intsrc *isrc, int eoi)
mtx_lock_spin(&icu_lock);
if (!intpin->io_masked && !intpin->io_edgetrigger) {
flags = ioapic_read(io->io_addr,
IOAPIC_REDTBL_LO(intpin->io_intpin));
flags |= IOART_INTMSET;
flags = intpin->io_lowreg | IOART_INTMSET;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
flags);
intpin->io_masked = 1;
@ -313,6 +310,7 @@ ioapic_program_intpin(struct ioapic_intsrc *intpin)
/* Write the values to the APIC. */
mtx_lock_spin(&icu_lock);
intpin->io_lowreg = low;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
value &= ~IOART_DEST;

10
sys/i386/i386/io_apic.c
View File

@ -88,6 +88,7 @@ struct ioapic_intsrc {
u_int io_edgetrigger:1;
u_int io_masked:1;
int io_bus:4;
uint32_t io_lowreg;
};
struct ioapic {
@ -206,9 +207,7 @@ ioapic_enable_source(struct intsrc *isrc)
mtx_lock_spin(&icu_lock);
if (intpin->io_masked) {
flags = ioapic_read(io->io_addr,
IOAPIC_REDTBL_LO(intpin->io_intpin));
flags &= ~(IOART_INTMASK);
flags = intpin->io_lowreg & ~IOART_INTMASK;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
flags);
intpin->io_masked = 0;
@ -225,9 +224,7 @@ ioapic_disable_source(struct intsrc *isrc, int eoi)
mtx_lock_spin(&icu_lock);
if (!intpin->io_masked && !intpin->io_edgetrigger) {
flags = ioapic_read(io->io_addr,
IOAPIC_REDTBL_LO(intpin->io_intpin));
flags |= IOART_INTMSET;
flags = intpin->io_lowreg | IOART_INTMSET;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin),
flags);
intpin->io_masked = 1;
@ -312,6 +309,7 @@ ioapic_program_intpin(struct ioapic_intsrc *intpin)
/* Write the values to the APIC. */
mtx_lock_spin(&icu_lock);
intpin->io_lowreg = low;
ioapic_write(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin), low);
value = ioapic_read(io->io_addr, IOAPIC_REDTBL_HI(intpin->io_intpin));
value &= ~IOART_DEST;