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Add MLX5_FPGA_RELOAD IOCTL(2) to mlx5fpga.

Browse Source 
Submitted by:	kib@
MFC after:	3 days
Sponsored by:	Mellanox Technologies
This commit is contained in:
hselasky 2019-05-08 10:25:14 +00:00
parent 6cc096bffa
commit 90a4e7f88c
4 changed files with 61 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
sys/dev/mlx5/mlx5_fpga/mlx5_ifc_fpga.h
View File

@ -135,6 +135,7 @@ enum {
MLX5_FPGA_CTRL_OPERATION_RESET_SANDBOX = 0x6,
MLX5_FPGA_CTRL_OPERATION_DISCONNECT = 0x9,
MLX5_FPGA_CTRL_OPERATION_CONNECT = 0xA,
MLX5_FPGA_CTRL_OPERATION_RELOAD = 0xB,
};
struct mlx5_ifc_fpga_ctrl_bits {

53
sys/dev/mlx5/mlx5_fpga/mlx5fpga_sdk.c
View File

@ -324,6 +324,45 @@ void mlx5_fpga_device_query(struct mlx5_fpga_device *fdev,
}
EXPORT_SYMBOL(mlx5_fpga_device_query);
static int mlx5_fpga_device_reload_cmd(struct mlx5_fpga_device *fdev)
{
struct mlx5_core_dev *mdev = fdev->mdev;
unsigned long timeout;
unsigned long flags;
int err = 0;
mlx5_fpga_info(fdev, "mlx5/fpga - reload started\n");
fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;
reinit_completion(&fdev->load_event);
err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RELOAD);
if (err) {
mlx5_fpga_err(fdev, "Failed to request reload: %d\n",
err);
goto out;
}
timeout = jiffies + msecs_to_jiffies(MLX5_FPGA_LOAD_TIMEOUT);
err = wait_for_completion_timeout(&fdev->load_event,
timeout - jiffies);
if (err < 0) {
mlx5_fpga_err(fdev, "Failed waiting for reload: %d\n", err);
fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
goto out;
}
/* Check device loaded successful */
err = mlx5_fpga_device_start(mdev);
if (err) {
mlx5_fpga_err(fdev, "Failed load check for reload: %d\n", err);
fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
goto out;
}
spin_lock_irqsave(&fdev->state_lock, flags);
fdev->fdev_state = MLX5_FDEV_STATE_SUCCESS;
spin_unlock_irqrestore(&fdev->state_lock, flags);
mlx5_fpga_info(fdev, "mlx5/fpga - reload ended\n");
out:
return err;
}
int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
enum mlx5_fpga_image image)
{
@ -350,6 +389,12 @@ int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
return err;
mutex_lock(&mdev->intf_state_mutex);
if (image == MLX5_FPGA_IMAGE_RELOAD) {
err = mlx5_fpga_device_reload_cmd(fdev);
goto out;
}
clear_bit(MLX5_INTERFACE_STATE_UP, &mdev->intf_state);
mlx5_unregister_device(mdev);
@ -359,7 +404,7 @@ int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;
reinit_completion(&fdev->load_event);
if (image <= MLX5_FPGA_IMAGE_MAX) {
if (image <= MLX5_FPGA_IMAGE_FACTORY) {
mlx5_fpga_info(fdev, "Loading from flash\n");
err = mlx5_fpga_load(mdev, image);
if (err) {
@ -367,7 +412,7 @@ int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
err);
goto out;
}
} else {
} else if (image == MLX5_FPGA_IMAGE_RESET) {
mlx5_fpga_info(fdev, "Resetting\n");
err = mlx5_fpga_ctrl_op(mdev, MLX5_FPGA_CTRL_OPERATION_RESET);
if (err) {
@ -375,6 +420,10 @@ int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
err);
goto out;
}
} else {
mlx5_fpga_err(fdev, "Unknown command: %d\n",
image);
goto out;
}
timeout = jiffies + msecs_to_jiffies(MLX5_FPGA_LOAD_TIMEOUT);

9
sys/dev/mlx5/mlx5_fpga_tools/mlx5fpga_tools_char.c
View File

@ -225,7 +225,7 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
break;
case MLX5_FPGA_LOAD:
arg = *(int *)data;
if (arg > MLX5_FPGA_IMAGE_MAX) {
if (arg > MLX5_FPGA_IMAGE_FACTORY) {
dev_err(mlx5_fpga_dev(fdev),
"unknown image type %u\n", arg);
err = EINVAL;
@ -234,11 +234,14 @@ tools_char_ioctl(struct cdev *dev, u_long cmd, caddr_t data, int fflag,
err = mlx5_fpga_device_reload(fdev, arg);
break;
case MLX5_FPGA_RESET:
err = mlx5_fpga_device_reload(fdev, MLX5_FPGA_IMAGE_MAX + 1);
err = mlx5_fpga_device_reload(fdev, MLX5_FPGA_IMAGE_RESET);
break;
case MLX5_FPGA_RELOAD:
err = mlx5_fpga_device_reload(fdev, MLX5_FPGA_IMAGE_RELOAD);
break;
case MLX5_FPGA_IMAGE_SEL:
arg = *(int *)data;
if (arg > MLX5_FPGA_IMAGE_MAX) {
if (arg > MLX5_FPGA_IMAGE_FACTORY) {
dev_err(mlx5_fpga_dev(fdev),
"unknown image type %u\n", arg);
err = EINVAL;

4
sys/dev/mlx5/mlx5io.h
View File

@ -67,8 +67,9 @@ enum mlx5_fpga_id {
enum mlx5_fpga_image {
MLX5_FPGA_IMAGE_USER = 0,
MLX5_FPGA_IMAGE_FACTORY = 1,
MLX5_FPGA_IMAGE_MAX = MLX5_FPGA_IMAGE_FACTORY,
MLX5_FPGA_IMAGE_FACTORY_FAILOVER = 2,
MLX5_FPGA_IMAGE_RESET = 17,
MLX5_FPGA_IMAGE_RELOAD = 18,
};
enum mlx5_fpga_status {
@ -135,6 +136,7 @@ struct mlx5_fpga_temperature {
#define MLX5_FPGA_CAP _IOR('m', 0x85, uint32_t[MLX5_FPGA_CAP_ARR_SZ])
#define MLX5_FPGA_TEMPERATURE _IOWR('m', 0x86, struct mlx5_fpga_temperature)
#define MLX5_FPGA_CONNECT _IOWR('m', 0x87, enum mlx5_fpga_connect)
#define MLX5_FPGA_RELOAD _IO('m', 0x88)
#define MLX5_FPGA_TOOLS_NAME_SUFFIX "_mlx5_fpga_tools"