diff --git a/share/man/man4/hptrr.4 b/share/man/man4/hptrr.4 new file mode 100644 index 000000000000..ee9e109e156f --- /dev/null +++ b/share/man/man4/hptrr.4 @@ -0,0 +1,126 @@ +.\" +.\" Copyright (c) 2007 Me +.\" All rights reserved. +.\" +.\" Redistribution and use in source and binary forms, with or without +.\" modification, are permitted provided that the following conditions +.\" are met: +.\" 1. Redistributions of source code must retain the above copyright +.\" notice, this list of conditions and the following disclaimer. +.\" 2. Redistributions in binary form must reproduce the above copyright +.\" notice, this list of conditions and the following disclaimer in the +.\" documentation and/or other materials provided with the distribution. +.\" +.\" THIS SOFTWARE IS PROVIDED BY THE DEVELOPERS ``AS IS'' AND ANY EXPRESS OR +.\" IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +.\" OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +.\" IN NO EVENT SHALL THE DEVELOPERS BE LIABLE FOR ANY DIRECT, INDIRECT, +.\" INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +.\" NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +.\" DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +.\" THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +.\" (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +.\" THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +.\" +.\" $FreeBSD$ +.\" +.Dd December 14, 2007 +.Dt HPTRR 4 +.Os +.Sh NAME +.Nm hptrr +.Nd "HighPoint RocketRAID device driver" +.Sh SYNOPSIS +To compile this driver into the kernel, +place the following line in your +kernel configuration file: +.Bd -ragged -offset indent +.Cd "device hptrr" +.Cd "device scbus" +.Cd "device da" +.Ed +.Pp +Alternatively, to load the driver as a +module at boot time, place the following line in +.Xr loader.conf 5 : +.Bd -literal -offset indent +hptrr_load="YES" +.Ed +.Sh DESCRIPTION +The +.Nm +driver provides support for HighPoint's RocketRAID based RAID controllers. +.Pp +These devices support SATA/ATA disk drives +and provide RAID0 (striping), RAID1 (mirroring), and RAID5 functionality. +.Sh HARDWARE +The +.Nm +driver supports the following RAID +controllers: +.Pp +.Bl -bullet -compact +.It +RocketRAID 172x series +.It +RocketRAID 174x series +.It +RocketRAID 2210 +.It +RocketRAID 222x series +.It +RocketRAID 2240 +.It +RocketRAID 230x series +.It +RocketRAID 231x series +.It +RocketRAID 232x series +.It +RocketRAID 2340 +.It +RocketRAID 2522 +.El +.Sh NOTES +The +.Nm +driver only works on the i386 and amd64 platforms as it requires a binary +blob object from the manufacturer which they only supply for these platforms. +The +.Nm +driver does +.Em not +work on i386 with +.Xr pae 4 +enabled. +.Pp +This driver does not support the RR182x series controller. +See the +.Xr hptmv 4 +manual page for details on support. +.Sh SEE ALSO +.Xr cam 4 , +.Xr hptmv 4 , +.Xr loader 8 +.Sh HISTORY +The +.Nm +device driver first appeared in +.Fx 5.3 . +.Sh AUTHORS +.An -nosplit +The +.Nm +device driver was written by +.An HighPoint Technologies, Inc. , +and ported to +.Fx +by +.An Scott Long . +This manual page was written by +.An David E. O'Brien . +.Sh BUGS +The +.Nm +driver does not support manipulating the RAID from the OS, RAIDs need +to be set up from the on-board BIOS. diff --git a/sys/dev/hptrr/amd64-elf.hptrr_lib.o.uu b/sys/dev/hptrr/amd64-elf.hptrr_lib.o.uu new file mode 100644 index 000000000000..92137d917f2f --- /dev/null +++ b/sys/dev/hptrr/amd64-elf.hptrr_lib.o.uu @@ -0,0 +1,13120 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +begin 644 hptrr_lib.o +M?T5,1@(!`0D```````````$`/@`!`````````````````````````,@R!@`` +M`````````$```````$``$``-`//#9F9FD&9F9I!F9I!F9I"X`````,-F9F:0 +M9F:09F:0\\-F9F:09F9FD&9FD&9FD+@`````.ST`````?3=(8\=(Q\$````` +M2(T$@$C!X`(/MQ0(9HD6#[=4"`)FB58"#[94"`B(5@@/MD0("8A&";@!```` +M\\-F9F:09F:09F:0055!5%530;P`````0;K__P``1(LM`````+L`````1(GM +M0;D`````08GK9F:09F:0O@````!$.=Y]/4C'QP````!%B=A(8\9(C02`2(T, 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+M?`````````$````!````4/("```````X?`````````$````!`````/,"```` +M``!H?`````````$````!````,/0"``````"(?`````````$````!````8/0" +M``````"H?`````````$````!````P/0"``````#0?`````````$````!```` +ML/4"``````#X?`````````$````!````L/8"```````H?0````````$````! +M````H/L"``````!(?0````````$````!````,/P"``````"`?0````````$` +M```!````8/P"``````"8?0````````$````!````X/P"``````"P?0`````` +M``$````!````$/T"``````#0?0````````$````!```` +/* + * $Id: array.h,v 1.40 2007/03/12 10:05:44 gmm Exp $ + * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. + */ +#ifndef _HPT_ARRAY_H_ +#define _HPT_ARRAY_H_ + +#define VERMAGIC_ARRAY 40 + +#if defined(__cplusplus) +extern "C" { +#endif + +#define MAX_ARRAY_NAME 16 + +#ifndef MAX_MEMBERS +#define MAX_MEMBERS 16 +#endif + +#if MAX_MEMBERS<=16 +typedef HPT_U16 HPT_MMASK; +#elif MAX_MEMBERS<=32 +typedef HPT_U32 HPT_MMASK; +#elif MAX_MEMBERS<=64 +typedef HPT_U64 HPT_MMASK; +#else +#error "MAX_MEMBERS too large" +#endif + +#define HPT_MMASK_VALUE(x) (HPT_MMASK)((HPT_MMASK)1<<(x)) + +#if MAX_MEMBERS<32 +#define HPT_MMASK_VALUE_SAFE(x) HPT_MMASK_VALUE(x) +#else +#define HPT_MMASK_VALUE_SAFE(x) ((x)>=MAX_MEMBERS? (HPT_MMASK)0 : HPT_MMASK_VALUE(x)) +#endif + +#define MAX_REBUILD_SECTORS 128 + +typedef struct _RAID_FLAGS { + HPT_UINT rf_need_initialize : 1; + HPT_UINT rf_need_rebuild: 1; + HPT_UINT rf_need_sync: 1; + /* ioctl flags */ + HPT_UINT rf_auto_rebuild: 1; + HPT_UINT rf_rebuilding: 1; + HPT_UINT rf_verifying: 1; + HPT_UINT rf_initializing: 1; + HPT_UINT rf_abort_verifying: 1; + HPT_UINT rf_raid15: 1; + HPT_UINT rf_v3_format : 1; + HPT_UINT rf_need_transform : 1; + HPT_UINT rf_transforming : 1; + HPT_UINT rf_abort_transform : 1; + HPT_UINT rf_log_write: 1; +} RAID_FLAGS; + +typedef struct transform_cmd_ext +{ + HPT_LBA lba; + HPT_U16 total_sectors; + HPT_U16 finished_sectors; +} TRANSFORM_CMD_EXT , *PTRANSFORM_CMD_EXT; + + +#define TO_MOVE_DATA 0 +#define TO_INITIALIZE 1 +#define TO_INITIALIZE_ONLY 2 +#define TO_MOVE_DATA_ONLY 3 +typedef struct hpt_transform +{ + HPT_U32 stamp; + PVDEV source; + PVDEV target; + struct list_head link; + HPT_U8 transform_from_tail; + struct tq_item task; + + struct lock_request lock; + TRANSFORM_CMD_EXT cmdext; + + HPT_U64 transform_point; + HPT_U16 transform_sectors_per_step; + HPT_U8 operation; + HPT_U8 disabled; +} HPT_TRANSFORM, *PHPT_TRANSFORM; + +typedef struct hpt_array +{ + HPT_U32 array_stamp; + HPT_U32 data_stamp; + + HPT_U8 ndisk; + HPT_U8 block_size_shift; + HPT_U16 strip_width; + + + HPT_MMASK outdated_members; + HPT_MMASK offline_members; + + PVDEV member[MAX_MEMBERS]; + + RAID_FLAGS flags; + + HPT_U64 rebuilt_sectors; + + + HPT_U8 name[MAX_ARRAY_NAME]; + PHPT_TRANSFORM transform; + + TIME_RECORD create_time; + HPT_U8 description[64]; + HPT_U8 create_manager[16]; + +#ifdef OS_SUPPORT_TASK + int floating_priority; + OSM_TASK ioctl_task; + IOCTL_ARG ioctl_arg; + + char ioctl_inbuf[sizeof(PVDEV)+sizeof(HPT_U64)+sizeof(HPT_U16)]; + char ioctl_outbuf[sizeof(HPT_UINT)]; +#endif + +} HPT_ARRAY, *PHPT_ARRAY; + +#ifdef OS_SUPPORT_TASK +void ldm_start_rebuild(struct _VDEV *pArray); +#else +#define ldm_start_rebuild(pArray) +#endif + +typedef struct _raw_partition{ + struct _raw_partition * next; + HPT_RAW_LBA start; + HPT_RAW_LBA capacity; + PVDEV vd_part; +} RAW_PARTITION, *PRAW_PARTITION; + +typedef struct hpt_partiton +{ + PVDEV raw_disk; + HPT_RAW_LBA des_location; + PRAW_PARTITION raw_part; + HPT_U8 del_mbr; + HPT_U8 reserved[3]; +} HPT_PARTITION, *PHPT_PARTITION; + +HPT_U16 get_strip_size(PVDEV vd); + +void ldm_check_array_online(PVDEV pArray); +void ldm_generic_member_failed(PVDEV member); +void ldm_sync_array_info(PVDEV pArray); +void ldm_sync_array_stamp(PVDEV pArray); +void ldm_add_spare_to_array(PVDEV pArray, PVDEV spare_partition); + +#if defined(__cplusplus) +} +#endif +#endif diff --git a/sys/dev/hptrr/him.h b/sys/dev/hptrr/him.h new file mode 100644 index 000000000000..f11f0ed03699 --- /dev/null +++ b/sys/dev/hptrr/him.h @@ -0,0 +1,438 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* + * $Id: him.h,v 1.41 2007/01/12 09:12:49 gmm Exp $ + * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. + */ +#ifndef _HPT_HIM_H_ +#define _HPT_HIM_H_ + +#define VERMAGIC_HIM 41 + +#if defined(__cplusplus) +extern "C" { +#endif + +#include + +#define SECTOR_TO_BYTE_SHIFT 9 +#define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT) +#define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT) + +typedef struct _PCI_ID +{ + HPT_U16 vid; + HPT_U16 did; + HPT_U32 subsys; + HPT_U8 rev; + HPT_U8 nbase; + HPT_U16 reserve; +} +PCI_ID; + +typedef struct _PCI_ADDRESS +{ + HPT_U8 tree; + HPT_U8 bus; + HPT_U8 device; + HPT_U8 function; +} +PCI_ADDRESS; + +typedef struct _HIM_ADAPTER_CONFIG +{ + PCI_ADDRESS pci_addr; + PCI_ID pci_id; + + HPT_U8 max_devices; + HPT_U8 reserve1; + + HPT_U8 bDevsPerBus; + HPT_U8 first_on_slot; + + HPT_U8 bChipType; + HPT_U8 bChipIntrNum; + HPT_U8 bChipFlags; + HPT_U8 bNumBuses; + + HPT_U8 szVendorID[36]; + HPT_U8 szProductID[36]; +} +HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG; + +typedef struct _HIM_CHANNEL_CONFIG +{ + HPT_U32 io_port; + HPT_U32 ctl_port; +} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG; + +typedef struct _HIM_DEVICE_FLAGS +{ + HPT_U32 df_atapi :1; + HPT_U32 df_removable_drive :1; + HPT_U32 df_on_line :1; + HPT_U32 df_reduce_mode :1; + HPT_U32 df_sata :1; + HPT_U32 df_on_pm_port :1; + HPT_U32 df_support_read_ahead :1; + HPT_U32 df_read_ahead_enabled :1; + HPT_U32 df_support_write_cache :1; + HPT_U32 df_write_cache_enabled :1; + HPT_U32 df_cdrom_device :1; + HPT_U32 df_tape_device :1; + HPT_U32 df_support_tcq :1; + HPT_U32 df_tcq_enabled :1; + HPT_U32 df_support_ncq :1; + HPT_U32 df_ncq_enabled :1; +} DEVICE_FLAGS, *PDEVICE_FLAGS; + +#pragma pack(1) +typedef struct _IDENTIFY_DATA2 { + HPT_U16 GeneralConfiguration; + HPT_U16 NumberOfCylinders; + HPT_U16 Reserved1; + HPT_U16 NumberOfHeads; + HPT_U16 UnformattedBytesPerTrack; + HPT_U16 UnformattedBytesPerSector; + HPT_U16 SectorsPerTrack; + HPT_U16 VendorUnique1[3]; + HPT_U16 SerialNumber[10]; + HPT_U16 BufferType; + HPT_U16 BufferSectorSize; + HPT_U16 NumberOfEccBytes; + HPT_U16 FirmwareRevision[4]; + HPT_U16 ModelNumber[20]; + HPT_U8 MaximumBlockTransfer; + HPT_U8 VendorUnique2; + HPT_U16 DoubleWordIo; + HPT_U16 Capabilities; + HPT_U16 Reserved2; + HPT_U8 VendorUnique3; + HPT_U8 PioCycleTimingMode; + HPT_U8 VendorUnique4; + HPT_U8 DmaCycleTimingMode; + HPT_U16 TranslationFieldsValid; + HPT_U16 NumberOfCurrentCylinders; + HPT_U16 NumberOfCurrentHeads; + HPT_U16 CurrentSectorsPerTrack; + HPT_U32 CurrentSectorCapacity; + HPT_U16 CurrentMultiSectorSetting; + HPT_U32 UserAddressableSectors; + HPT_U8 SingleWordDMASupport; + HPT_U8 SingleWordDMAActive; + HPT_U8 MultiWordDMASupport; + HPT_U8 MultiWordDMAActive; + HPT_U8 AdvancedPIOModes; + HPT_U8 Reserved4; + HPT_U16 MinimumMWXferCycleTime; + HPT_U16 RecommendedMWXferCycleTime; + HPT_U16 MinimumPIOCycleTime; + HPT_U16 MinimumPIOCycleTimeIORDY; + HPT_U16 Reserved5[2]; + HPT_U16 ReleaseTimeOverlapped; + HPT_U16 ReleaseTimeServiceCommand; + HPT_U16 MajorRevision; + HPT_U16 MinorRevision; +} +#ifdef __GNUC__ +__attribute__((packed)) +#endif +IDENTIFY_DATA2, *PIDENTIFY_DATA2; +#pragma pack() + +typedef struct _HIM_DEVICE_CONFIG +{ + HPT_U64 capacity; + + DEVICE_FLAGS flags; + + HPT_U8 path_id; + HPT_U8 target_id; + HPT_U8 max_queue_depth; + HPT_U8 spin_up_mode; + + HPT_U8 reserved; + HPT_U8 transfer_mode; + HPT_U8 bMaxShowMode; + HPT_U8 bDeUsable_Mode; + + HPT_U16 max_sectors_per_cmd; + + PIDENTIFY_DATA2 pIdentifyData; + +} +HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG; + + +#define _DIT_MODE 0 +#define _DIT_601 1 +#define _DIT_READ_AHEAD 2 +#define _DIT_WRITE_CACHE 3 +#define _DIT_TCQ 4 +#define _DIT_NCQ 5 +#define _DIT_BEEP_OFF 6 +#define _DIT_SPIN_UP_MODE 7 + +#define SPIN_UP_MODE_NOSUPPORT 0 +#define SPIN_UP_MODE_FULL 1 +#define SPIN_UP_MODE_STANDBY 2 + +struct tcq_control { + HPT_U8 enable; + HPT_U8 depth; +}; + +struct ncq_control { + HPT_U8 enable; + HPT_U8 depth; +}; + +typedef struct _HIM_ALTERABLE_DEV_INFO{ + HPT_U8 type; + union { + HPT_U8 mode; + HPT_U8 enable_read_ahead; + HPT_U8 enable_read_cache; + HPT_U8 enable_write_cache; + struct tcq_control tcq; + struct ncq_control ncq; + void * adapter; + HPT_U8 spin_up_mode; + }u; +} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO; + +struct _COMMAND; +struct _IOCTL_ARG; + +typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index); + +typedef struct _HIM { + char *name; + struct _HIM *next; + HPT_UINT max_sg_descriptors; + #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args; + #include +} +HIM, *PHIM; + + +#pragma pack(1) +#ifdef SG_FLAG_EOT +#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!" +#endif + +typedef struct _SG { + HPT_U32 size; + HPT_UINT eot; + union { + HPT_U8 FAR * _logical; + BUS_ADDRESS bus; + } + addr; +} +SG, *PSG; +#pragma pack() + +typedef struct _AtaCommand +{ + HPT_U64 Lba; + HPT_U16 nSectors; + HPT_U16 pad; +} AtaComm, *PAtaComm; + +#define ATA_CMD_SET_FEATURES 0xef +#define ATA_CMD_FLUSH 0xE7 +#define ATA_CMD_VERIFY 0x40 +#define ATA_CMD_STANDBY 0xe2 +#define ATA_CMD_READ_MULTI 0xC4 +#define ATA_CMD_READ_MULTI_EXT 0x29 +#define ATA_CMD_WRITE_MULTI 0xC5 +#define ATA_CMD_WRITE_MULTI_EXT 0x39 +#define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE + +#define ATA_SET_FEATURES_XFER 0x3 +#define ATA_SECTOR_SIZE 512 + +typedef struct _PassthroughCmd { + HPT_U16 bFeaturesReg; + HPT_U16 bSectorCountReg; + HPT_U16 bLbaLowReg; + HPT_U16 bLbaMidReg; + HPT_U16 bLbaHighReg; + HPT_U8 bDriveHeadReg; + HPT_U8 bCommandReg; + HPT_U8 nSectors; + HPT_U8 *pDataBuffer; +} +PassthroughCmd; + + +#define CTRL_CMD_REBUILD 1 +#define CTRL_CMD_VERIFY 2 +#define CTRL_CMD_INIT 3 + + +typedef struct _R5ControlCmd { + HPT_U64 StripeLine; + HPT_U16 Offset; + HPT_U8 Command; + HPT_U8 reserve1; +} +R5ControlCmd, *PR5ControlCmd; + +typedef struct _HPT_ADDRESS +{ + HPT_U8 * logical; + BUS_ADDRESS bus; +} +HPT_ADDRESS; + + +typedef struct ctl_pages { + HPT_ADDRESS *pages; + HPT_UINT page_size; + HPT_UINT npages; + HPT_UINT min_sg_descriptors; +} CONTROL_PAGES, *PCONTROL_PAGES; + +typedef struct _R1ControlCmd { + HPT_U64 Lba; + HPT_U16 nSectors; + HPT_U8 Command; /* CTRL_CMD_XXX */ + HPT_U8 reserve1; + PCONTROL_PAGES ctl_pages; +} +R1ControlCmd, *PR1ControlCmd; + +typedef void (*TQ_PROC)(void *arg); + +struct tq_item { + TQ_PROC proc; + void *arg; + struct tq_item *next; +}; + +#define INIT_TQ_ITEM(t, p, a) \ + do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0) + +typedef struct _COMMAND +{ + + struct _VBUS * vbus; + + struct freelist *grplist; + HPT_UINT grpcnt; + + + struct list_head q_link; + struct tq_item done_dpc; + + HPT_UINT extsize; + void *ext; + + + + void *target; + void *priv; + HPT_UPTR priv2; + + int priority; + struct lock_request *owned_lock; + struct lock_request *lock_req; + + union{ + /* Ide Command */ + AtaComm Ide; + PassthroughCmd Passthrough; + /* Atapi Command */ + HPT_U8 Atapi[12]; + /* Control command */ + R5ControlCmd R5Control; + R1ControlCmd R1Control; + } uCmd; + + HPT_U8 type; /* CMD_TYPE_* */ + + struct { + HPT_U8 physical_sg: 1; + HPT_U8 data_in: 1; + HPT_U8 data_out: 1; + HPT_U8 transform : 1; + HPT_U8 hard_flush: 2; + HPT_U8 from_cc: 1; + } flags; + + /* return status */ + HPT_U8 Result; + /* retry count */ + HPT_U8 RetryCount; + + + PSG psg; + + + int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical); + void (*done)(struct _COMMAND *cmd); +} +COMMAND, *PCOMMAND; + +/* command types */ +#define CMD_TYPE_IO 0 +#define CMD_TYPE_CONTROL 1 +#define CMD_TYPE_ATAPI 2 +#define CMD_TYPE_PASSTHROUGH 3 +#define CMD_TYPE_FLUSH 4 + +/* flush command flags */ +#define CF_HARD_FLUSH_CACHE 1 +#define CF_HARD_FLUSH_STANDBY 2 + +/* command return values */ +#define RETURN_PENDING 0 +#define RETURN_SUCCESS 1 +#define RETURN_BAD_DEVICE 2 +#define RETURN_BAD_PARAMETER 3 +#define RETURN_WRITE_NO_DRQ 4 +#define RETURN_DEVICE_BUSY 5 +#define RETURN_INVALID_REQUEST 6 +#define RETURN_SELECTION_TIMEOUT 7 +#define RETURN_IDE_ERROR 8 +#define RETURN_NEED_LOGICAL_SG 9 +#define RETURN_NEED_PHYSICAL_SG 10 +#define RETURN_RETRY 11 +#define RETURN_DATA_ERROR 12 +#define RETURN_BUS_RESET 13 +#define RETURN_BAD_TRANSFER_LENGTH 14 +#define RETURN_INSUFFICIENT_MEMORY 15 +#define RETURN_SECTOR_ERROR 16 + +#if defined(__cplusplus) +} +#endif +#endif diff --git a/sys/dev/hptrr/himfuncs.h b/sys/dev/hptrr/himfuncs.h new file mode 100644 index 000000000000..6926365ffaec --- /dev/null +++ b/sys/dev/hptrr/himfuncs.h @@ -0,0 +1,105 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* $Id: himfuncs.h,v 1.14 2005/12/22 00:13:11 gmm Exp $ + * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. + * + * define _HIM_INTERFACE before include this file, and + * undef it after include this file. + */ + + +#ifndef _HIM_INTERFACE +#error "you must define _HIM_INTERFACE before this file" +#endif + +_HIM_INTERFACE(HPT_BOOL, get_supported_device_id, (int index, PCI_ID *id)) + +_HIM_INTERFACE(HPT_U8, get_controller_count, (PCI_ID *id, HPT_U8 *reached)) + + +_HIM_INTERFACE(HPT_UINT, get_adapter_size, (const PCI_ID *id)) + + +_HIM_INTERFACE(HPT_BOOL, create_adapter, (const PCI_ID *id, PCI_ADDRESS pciAddress, void *adapter, void *osext)) + +_HIM_INTERFACE(void, get_adapter_config, (void *adapter, HIM_ADAPTER_CONFIG *config)) + +_HIM_INTERFACE(HPT_BOOL, get_meminfo, (void *adapter)) + + +_HIM_INTERFACE(HPT_BOOL, adapter_on_same_vbus, (void *adapter1, void *adapter2)) +_HIM_INTERFACE(void, route_irq, (void *adapter, HPT_BOOL enable)) + + +_HIM_INTERFACE(HPT_BOOL, initialize, (void *adapter)) + + +_HIM_INTERFACE(HPT_UINT, get_device_size, (void *adapter)) + + +_HIM_INTERFACE(HPT_BOOL, probe_device, (void *adapter, int index, void *devhandle, PROBE_CALLBACK done, void *arg)) +_HIM_INTERFACE(void *, get_device, (void *adapter, int index)) +_HIM_INTERFACE(void, get_device_config, (void *dev, HIM_DEVICE_CONFIG *config)) +_HIM_INTERFACE(void, remove_device, (void *dev)) + +_HIM_INTERFACE(void, reset_device, (void * dev, void (*done)(void *arg), void *arg)) + + +_HIM_INTERFACE(HPT_U32, get_cmdext_size, (void)) + +_HIM_INTERFACE(void, queue_cmd, (void *dev, struct _COMMAND *cmd)) + + +_HIM_INTERFACE(int, read_write, (void *dev,HPT_LBA lba, HPT_U16 nsector, HPT_U8 *buffer, HPT_BOOL read)) + +_HIM_INTERFACE(HPT_BOOL, intr_handler, (void *adapter)) +_HIM_INTERFACE(HPT_BOOL, intr_control, (void * adapter, HPT_BOOL enable)) + + +_HIM_INTERFACE(int, get_channel_config, (void * adapter, int index, PHIM_CHANNEL_CONFIG pInfo)) +_HIM_INTERFACE(int, set_device_info, (void * dev, PHIM_ALTERABLE_DEV_INFO pInfo)) +_HIM_INTERFACE(void, unplug_device, (void * dev)) + + +_HIM_INTERFACE(void, shutdown, (void *adapter)) +_HIM_INTERFACE(void, suspend, (void *adapter)) +_HIM_INTERFACE(void, resume, (void *adapter)) +_HIM_INTERFACE(void, release_adapter, (void *adapter)) + +/*called after ldm_register_adapter*/ +_HIM_INTERFACE(HPT_BOOL, verify_adapter, (void *adapter)) + +/* (optional) */ +_HIM_INTERFACE(void, ioctl, (void * adapter, struct _IOCTL_ARG *arg)) +_HIM_INTERFACE(int, compare_slot_seq, (void *adapter1, void *adapter2)) + + +_HIM_INTERFACE(HPT_BOOL, flash_access, (void *adapter, HPT_U32 offset, void *value, int size, HPT_BOOL reading)) + +#undef _HIM_INTERFACE diff --git a/sys/dev/hptrr/hptintf.h b/sys/dev/hptrr/hptintf.h new file mode 100644 index 000000000000..45f20f25fe47 --- /dev/null +++ b/sys/dev/hptrr/hptintf.h @@ -0,0 +1,1840 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include + + +#ifndef HPT_INTF_H +#define HPT_INTF_H + +#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD) +#define __BIG_ENDIAN_BITFIELD +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef __GNUC__ +#define __attribute__(x) +#endif + +#pragma pack(1) + +/* + * Version of this interface. + * The user mode application must first issue a hpt_get_version() call to + * check HPT_INTERFACE_VERSION. When an utility using newer version interface + * is used with old version drivers, it must call only the functions that + * driver supported. + * A new version interface should only add ioctl functions; it should implement + * all old version functions without change their definition. + */ +#define __this_HPT_INTERFACE_VERSION 0x02000001 + +#ifndef HPT_INTERFACE_VERSION +#error "You must define HPT_INTERFACE_VERSION you implemented" +#endif + +#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION +#error "HPT_INTERFACE_VERSION is invalid" +#endif + +/* + * DEFINITION + * Logical device --- a device that can be accessed by OS. + * Physical device --- device attached to the controller. + * A logical device can be simply a physical device. + * + * Each logical and physical device has a 32bit ID. GUI will use this ID + * to identify devices. + * 1. The ID must be unique. + * 2. The ID must be immutable. Once an ID is assigned to a device, it + * must not change when system is running and the device exists. + * 3. The ID of logical device must be NOT reusable. If a device is + * removed, other newly created logical device must not use the same ID. + * 4. The ID must not be zero or 0xFFFFFFFF. + */ +typedef HPT_U32 DEVICEID; + +/* + * logical device type. + * Identify array (logical device) and physical device. + */ +#define LDT_ARRAY 1 +#define LDT_DEVICE 2 + +/* + * Array types + * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0. + * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0. + * Their members may be another array of type RAID0 or RAID1. + */ +#define AT_UNKNOWN 0 +#define AT_RAID0 1 +#define AT_RAID1 2 +#define AT_RAID5 3 +#define AT_RAID6 4 +#define AT_JBOD 7 + +/* + * physical device type + */ +#define PDT_UNKNOWN 0 +#define PDT_HARDDISK 1 +#define PDT_CDROM 2 +#define PDT_TAPE 3 + +/* + * Some constants. + */ +#define MAX_NAME_LENGTH 36 +#define MAX_ARRAYNAME_LEN 16 + +#define MAX_ARRAY_MEMBERS_V1 8 + +#ifndef MAX_ARRAY_MEMBERS_V2 +#define MAX_ARRAY_MEMBERS_V2 16 +#endif + +#ifndef MAX_ARRAY_MEMBERS_V3 +#define MAX_ARRAY_MEMBERS_V3 64 +#endif + +/* keep definition for source code compatiblity */ +#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1 + +/* + * io commands + * GUI use these commands to do IO on logical/physical devices. + */ +#define IO_COMMAND_READ 1 +#define IO_COMMAND_WRITE 2 + + + +/* + * array flags + */ +#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */ +#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */ +#define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */ +#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */ +#define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */ + +#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */ +#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */ +#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */ +#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */ +#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* tranform in progress */ +#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need tranform */ +#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/ +#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */ +#define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */ +/* + * device flags + */ +#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */ +#define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */ +#define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */ +#define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */ +#define DEVICE_FLAG_SATA 0x00000010 /* S-ATA device */ +#define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */ + +#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */ +#define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */ + +#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */ + +/* + * array states used by hpt_set_array_state() + */ +/* old defines */ +#define MIRROR_REBUILD_START 1 +#define MIRROR_REBUILD_ABORT 2 +#define MIRROR_REBUILD_COMPLETE 3 +/* new defines */ +#define AS_REBUILD_START 1 +#define AS_REBUILD_ABORT 2 +#define AS_REBUILD_PAUSE AS_REBUILD_ABORT +#define AS_REBUILD_COMPLETE 3 +#define AS_VERIFY_START 4 +#define AS_VERIFY_ABORT 5 +#define AS_VERIFY_COMPLETE 6 +#define AS_INITIALIZE_START 7 +#define AS_INITIALIZE_ABORT 8 +#define AS_INITIALIZE_COMPLETE 9 +#define AS_VERIFY_FAILED 10 +#define AS_REBUILD_STOP 11 +#define AS_SAVE_STATE 12 +#define AS_TRANSFORM_START 13 +#define AS_TRANSFORM_ABORT 14 + +/************************************************************************ + * ioctl code + * It would be better if ioctl code are the same on different platforms, + * but we must not conflict with system defined ioctl code. + ************************************************************************/ +#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux) +#define HPT_CTL_CODE(x) (x+0xFF00) +#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00) +#elif defined(_MS_WIN32_) || defined(WIN32) + +#ifndef CTL_CODE +#define CTL_CODE( DeviceType, Function, Method, Access ) \ + (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method)) +#endif +#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0) +#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900) + +#else +#define HPT_CTL_CODE(x) (x) +#endif + +#define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0) +#define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1) +#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2) +#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3) +#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4) +#define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5) +#define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6) +#define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7) +#define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8) +#define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9) +#define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10) +#define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11) +/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */ +#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR +#define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12) +#define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13) +#define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14) +#define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15) +#define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16) +#define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17) +#define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18) +#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19) +#define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20) +#define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21) +#define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22) +#define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23) +#define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24) +#define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25) +#define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26) +#define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27) +#define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28) +#define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29) +#define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30) +#define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31) +#define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32) +#define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33) +#define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34) +#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35) +#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36) +#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37) +#define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38) +#define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39) +#define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40) +#define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41) +#define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42) +#define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43) +#define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44) +#define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45) +#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46) +#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47) +#define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48) +#define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49) +#define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50) +#define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51) +#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52) +#define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53) +#define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54) +#define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55) +#define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56) +#define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57) +#define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58) + + +#define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100) +#define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101) + +#define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102) +#define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103) + +/************************************************************************ + * shared data structures + ************************************************************************/ + +/* + * Chip Type + */ +#define CHIP_TYPE_HPT366 1 +#define CHIP_TYPE_HPT368 2 +#define CHIP_TYPE_HPT370 3 +#define CHIP_TYPE_HPT370A 4 +#define CHIP_TYPE_HPT370B 5 +#define CHIP_TYPE_HPT374 6 +#define CHIP_TYPE_HPT372 7 +#define CHIP_TYPE_HPT372A 8 +#define CHIP_TYPE_HPT302 9 +#define CHIP_TYPE_HPT371 10 +#define CHIP_TYPE_HPT372N 11 +#define CHIP_TYPE_HPT302N 12 +#define CHIP_TYPE_HPT371N 13 +#define CHIP_TYPE_SI3112A 14 +#define CHIP_TYPE_ICH5 15 +#define CHIP_TYPE_ICH5R 16 + +/* + * Chip Flags + */ +#define CHIP_SUPPORT_ULTRA_66 0x20 +#define CHIP_SUPPORT_ULTRA_100 0x40 +#define CHIP_HPT3XX_DPLL_MODE 0x80 +#define CHIP_SUPPORT_ULTRA_133 0x01 +#define CHIP_SUPPORT_ULTRA_150 0x02 +#define CHIP_MASTER 0x04 +#define CHIP_SUPPORT_SATA_300 0x08 + +#define HPT_SPIN_UP_MODE_NOSUPPORT 0 +#define HPT_SPIN_UP_MODE_FULL 1 +#define HPT_SPIN_UP_MODE_STANDBY 2 + +typedef struct _DRIVER_CAPABILITIES { + HPT_U32 dwSize; + + HPT_U8 MaximumControllers; /* maximum controllers the driver can support */ + HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */ + HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */ + HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */ + + HPT_U8 SupportDiskModeSetting; + HPT_U8 SupportSparePool; + HPT_U8 MaximumArrayNameLength; + /* only one HPT_U8 left here! */ +#ifdef __BIG_ENDIAN_BITFIELD + HPT_U8 reserved: 4; + HPT_U8 SupportHotSwap: 1; + HPT_U8 HighPerformanceRAID1: 1; + HPT_U8 RebuildProcessInDriver: 1; + HPT_U8 SupportDedicatedSpare: 1; +#else + HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */ + HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */ + HPT_U8 HighPerformanceRAID1: 1; + HPT_U8 SupportHotSwap: 1; + HPT_U8 reserved: 4; +#endif + + + HPT_U8 SupportedRAIDTypes[16]; + /* maximum members in an array corresponding to SupportedRAIDTypes */ + HPT_U8 MaximumArrayMembers[16]; +} +DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES; + +typedef struct _DRIVER_CAPABILITIES_V2 { + DRIVER_CAPABILITIES v1; + HPT_U8 SupportedCachePolicies[16]; + HPT_U32 reserved[17]; +} +DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2; + +/* + * Controller information. + */ +typedef struct _CONTROLLER_INFO { + HPT_U8 ChipType; /* chip type */ + HPT_U8 InterruptLevel; /* IRQ level */ + HPT_U8 NumBuses; /* bus count */ + HPT_U8 ChipFlags; + + HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ + HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ + +} CONTROLLER_INFO, *PCONTROLLER_INFO; + +#if HPT_INTERFACE_VERSION>=0x01020000 +typedef struct _CONTROLLER_INFO_V2 { + HPT_U8 ChipType; /* chip type */ + HPT_U8 InterruptLevel; /* IRQ level */ + HPT_U8 NumBuses; /* bus count */ + HPT_U8 ChipFlags; + + HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ + HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ + + HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs + * the master controller has CHIP_MASTER flag set*/ + HPT_U8 pci_tree; + HPT_U8 pci_bus; + HPT_U8 pci_device; + HPT_U8 pci_function; + + HPT_U32 ExFlags; +} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2; + + +#define CEXF_IOPModel 1 +#define CEXF_SDRAMSize 2 +#define CEXF_BatteryInstalled 4 +#define CEXF_BatteryStatus 8 +#define CEXF_BatteryVoltage 0x10 +#define CEXF_BatteryBackupTime 0x20 +#define CEXF_FirmwareVersion 0x40 +#define CEXF_SerialNumber 0x80 + +typedef struct _CONTROLLER_INFO_V3 { + HPT_U8 ChipType; + HPT_U8 InterruptLevel; + HPT_U8 NumBuses; + HPT_U8 ChipFlags; + HPT_U8 szProductID[MAX_NAME_LENGTH]; + HPT_U8 szVendorID[MAX_NAME_LENGTH]; + HPT_U32 GroupId; + HPT_U8 pci_tree; + HPT_U8 pci_bus; + HPT_U8 pci_device; + HPT_U8 pci_function; + HPT_U32 ExFlags; + HPT_U8 IOPModel[32]; + HPT_U32 SDRAMSize; + HPT_U8 BatteryInstalled; + HPT_U8 BatteryStatus; + HPT_U16 BatteryVoltage; + HPT_U32 BatteryBackupTime; + HPT_U32 FirmwareVersion; + HPT_U8 SerialNumber[32]; + HPT_U8 reserve[88]; +} +CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3; +typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1]; +#endif +/* + * Channel information. + */ +typedef struct _CHANNEL_INFO { + HPT_U32 IoPort; /* IDE Base Port Address */ + HPT_U32 ControlPort; /* IDE Control Port Address */ + + DEVICEID Devices[2]; /* device connected to this channel */ + +} CHANNEL_INFO, *PCHANNEL_INFO; + +typedef struct _CHANNEL_INFO_V2 { + HPT_U32 IoPort; /* IDE Base Port Address */ + HPT_U32 ControlPort; /* IDE Control Port Address */ + + DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */ +} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2; + +#ifndef __KERNEL__ +/* + * time represented in HPT_U32 format + */ +typedef struct _TIME_RECORD { + HPT_U32 seconds:6; /* 0 - 59 */ + HPT_U32 minutes:6; /* 0 - 59 */ + HPT_U32 month:4; /* 1 - 12 */ + HPT_U32 hours:6; /* 0 - 59 */ + HPT_U32 day:5; /* 1 - 31 */ + HPT_U32 year:5; /* 0=2000, 31=2031 */ +} TIME_RECORD; +#endif + +/* + * Array information. + */ +typedef struct _HPT_ARRAY_INFO { + HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + + HPT_U8 ArrayType; /* array type */ + HPT_U8 BlockSizeShift; /* stripe size */ + HPT_U8 nDisk; /* member count: Number of ID in Members[] */ + HPT_U8 reserved; + + HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ + HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */ + + /* + * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0); + * only valid if rebuilding is done by driver code. + * Member Flags will have ARRAY_FLAG_REBUILDING set at this case. + * Verify operation use same fields below, the only difference is + * ARRAY_FLAG_VERIFYING is set. + */ + HPT_U32 RebuildingProgress; + HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */ + +} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO; + +#if HPT_INTERFACE_VERSION>=0x01010000 +typedef struct _HPT_ARRAY_INFO_V2 { + HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + + HPT_U8 ArrayType; /* array type */ + HPT_U8 BlockSizeShift; /* stripe size */ + HPT_U8 nDisk; /* member count: Number of ID in Members[] */ + HPT_U8 reserved; + + HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ + HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ + + HPT_U32 RebuildingProgress; + HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ + + HPT_U32 reserve4[4]; +} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2; +#endif + +#if HPT_INTERFACE_VERSION>=0x01020000 +typedef struct _HPT_ARRAY_INFO_V3 { + HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + + HPT_U8 ArrayType; /* array type */ + HPT_U8 BlockSizeShift; /* stripe size */ + HPT_U8 nDisk; /* member count: Number of ID in Members[] */ + HPT_U8 reserved; + + HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ + HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ + + HPT_U32 RebuildingProgress; + HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ + + DEVICEID TransformSource; + DEVICEID TransformTarget; /* destination device ID */ + HPT_U32 TransformingProgress; + HPT_U32 Signature; /* persistent identification*/ +#if MAX_ARRAY_MEMBERS_V2==16 + HPT_U16 Critical_Members; /* bit mask of critical members */ + HPT_U16 reserve2; + HPT_U32 reserve; +#else + HPT_U32 Critical_Members; + HPT_U32 reserve; +#endif +} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3; +#endif + +#if HPT_INTERFACE_VERSION>=0x02000001 +typedef struct _HPT_ARRAY_INFO_V4 { + HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + + HPT_U8 ArrayType; /* array type */ + HPT_U8 BlockSizeShift; /* stripe size */ + HPT_U8 nDisk; /* member count: Number of ID in Members[] */ + HPT_U8 reserved; + + HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ + + HPT_U32 RebuildingProgress; + HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ + + DEVICEID TransformSource; + DEVICEID TransformTarget; /* destination device ID */ + HPT_U32 TransformingProgress; + HPT_U32 Signature; /* persistent identification*/ + HPT_U32 reserved2[2]; + HPT_U64 Critical_Members; + HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */ +} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4; +#endif + + +#ifndef __KERNEL__ +/* + * ATA/ATAPI Device identify data without the Reserved4. + */ +typedef struct _IDENTIFY_DATA2 { + HPT_U16 GeneralConfiguration; + HPT_U16 NumberOfCylinders; + HPT_U16 Reserved1; + HPT_U16 NumberOfHeads; + HPT_U16 UnformattedBytesPerTrack; + HPT_U16 UnformattedBytesPerSector; + HPT_U16 SectorsPerTrack; + HPT_U16 VendorUnique1[3]; + HPT_U16 SerialNumber[10]; + HPT_U16 BufferType; + HPT_U16 BufferSectorSize; + HPT_U16 NumberOfEccBytes; + HPT_U16 FirmwareRevision[4]; + HPT_U16 ModelNumber[20]; + HPT_U8 MaximumBlockTransfer; + HPT_U8 VendorUnique2; + HPT_U16 DoubleWordIo; + HPT_U16 Capabilities; + HPT_U16 Reserved2; + HPT_U8 VendorUnique3; + HPT_U8 PioCycleTimingMode; + HPT_U8 VendorUnique4; + HPT_U8 DmaCycleTimingMode; + HPT_U16 TranslationFieldsValid; + HPT_U16 NumberOfCurrentCylinders; + HPT_U16 NumberOfCurrentHeads; + HPT_U16 CurrentSectorsPerTrack; + HPT_U32 CurrentSectorCapacity; + HPT_U16 CurrentMultiSectorSetting; + HPT_U32 UserAddressableSectors; + HPT_U8 SingleWordDMASupport; + HPT_U8 SingleWordDMAActive; + HPT_U8 MultiWordDMASupport; + HPT_U8 MultiWordDMAActive; + HPT_U8 AdvancedPIOModes; + HPT_U8 Reserved4; + HPT_U16 MinimumMWXferCycleTime; + HPT_U16 RecommendedMWXferCycleTime; + HPT_U16 MinimumPIOCycleTime; + HPT_U16 MinimumPIOCycleTimeIORDY; + HPT_U16 Reserved5[2]; + HPT_U16 ReleaseTimeOverlapped; + HPT_U16 ReleaseTimeServiceCommand; + HPT_U16 MajorRevision; + HPT_U16 MinorRevision; +} IDENTIFY_DATA2, *PIDENTIFY_DATA2; +#endif + +/* + * physical device information. + * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. + */ +typedef struct _DEVICE_INFO { + HPT_U8 ControllerId; /* controller id */ + HPT_U8 PathId; /* bus */ + HPT_U8 TargetId; /* id */ + HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ + /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ + HPT_U8 DeviceType; /* device type */ + HPT_U8 UsableMode; /* highest usable mode */ + +#ifdef __BIG_ENDIAN_BITFIELD + HPT_U8 NCQEnabled: 1; + HPT_U8 NCQSupported: 1; + HPT_U8 TCQEnabled: 1; + HPT_U8 TCQSupported: 1; + HPT_U8 WriteCacheEnabled: 1; + HPT_U8 WriteCacheSupported: 1; + HPT_U8 ReadAheadEnabled: 1; + HPT_U8 ReadAheadSupported: 1; + HPT_U8 reserved6: 6; + HPT_U8 SpinUpMode: 2; +#else + HPT_U8 ReadAheadSupported: 1; + HPT_U8 ReadAheadEnabled: 1; + HPT_U8 WriteCacheSupported: 1; + HPT_U8 WriteCacheEnabled: 1; + HPT_U8 TCQSupported: 1; + HPT_U8 TCQEnabled: 1; + HPT_U8 NCQSupported: 1; + HPT_U8 NCQEnabled: 1; + HPT_U8 SpinUpMode: 2; + HPT_U8 reserved6: 6; +#endif + + HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ + + IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ + +} +__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO; + +#if HPT_INTERFACE_VERSION>=0x01020000 +#define MAX_PARENTS_PER_DISK 8 +/* + * physical device information. + * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. + */ +typedef struct _DEVICE_INFO_V2 { + HPT_U8 ControllerId; /* controller id */ + HPT_U8 PathId; /* bus */ + HPT_U8 TargetId; /* id */ + HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ + /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ + HPT_U8 DeviceType; /* device type */ + HPT_U8 UsableMode; /* highest usable mode */ + +#ifdef __BIG_ENDIAN_BITFIELD + HPT_U8 NCQEnabled: 1; + HPT_U8 NCQSupported: 1; + HPT_U8 TCQEnabled: 1; + HPT_U8 TCQSupported: 1; + HPT_U8 WriteCacheEnabled: 1; + HPT_U8 WriteCacheSupported: 1; + HPT_U8 ReadAheadEnabled: 1; + HPT_U8 ReadAheadSupported: 1; + HPT_U8 reserved6: 6; + HPT_U8 SpinUpMode: 2; +#else + HPT_U8 ReadAheadSupported: 1; + HPT_U8 ReadAheadEnabled: 1; + HPT_U8 WriteCacheSupported: 1; + HPT_U8 WriteCacheEnabled: 1; + HPT_U8 TCQSupported: 1; + HPT_U8 TCQEnabled: 1; + HPT_U8 NCQSupported: 1; + HPT_U8 NCQEnabled: 1; + HPT_U8 SpinUpMode: 2; + HPT_U8 reserved6: 6; +#endif + + HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ + + IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ + + HPT_U64 TotalFree; + HPT_U64 MaxFree; + HPT_U64 BadSectors; + DEVICEID ParentArrays[MAX_PARENTS_PER_DISK]; + +} +__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3; + +/* + * HPT601 information + */ +#endif +/* + * HPT601 information + */ +#define HPT601_INFO_DEVICEID 1 +#define HPT601_INFO_TEMPERATURE 2 +#define HPT601_INFO_FANSTATUS 4 +#define HPT601_INFO_BEEPERCONTROL 8 +#define HPT601_INFO_LED1CONTROL 0x10 +#define HPT601_INFO_LED2CONTROL 0x20 +#define HPT601_INFO_POWERSTATUS 0x40 + +typedef struct _HPT601_INFO_ { + HPT_U16 ValidFields; /* mark valid fields below */ + HPT_U16 DeviceId; /* 0x5A3E */ + HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */ + HPT_U16 FanStatus; /* Fan status */ + HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */ + HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ + HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ + HPT_U16 PowerStatus; /* 1: has power 2: no power */ +} HPT601_INFO, *PHPT601_INFO; + +#if HPT_INTERFACE_VERSION>=0x01010000 +#ifndef __KERNEL__ +/* cache policy for each vdev, copied from ldm.h */ +#define CACHE_POLICY_NONE 0 +#define CACHE_POLICY_WRITE_THROUGH 1 +#define CACHE_POLICY_WRITE_BACK 2 + +#endif +#endif +/* + * Logical device information. + * Union of ArrayInfo and DeviceInfo. + * Common properties will be put in logical device information. + */ +typedef struct _LOGICAL_DEVICE_INFO { + HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ + HPT_U8 reserved[3]; + + HPT_U32 Capacity; /* array capacity */ + DEVICEID ParentArray; + + union { + HPT_ARRAY_INFO array; + DEVICE_INFO device; + } __attribute__((packed)) u; + +} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO; + +#if HPT_INTERFACE_VERSION>=0x01010000 +typedef struct _LOGICAL_DEVICE_INFO_V2 { + HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ + HPT_U8 reserved[3]; + + HPT_U64 Capacity; /* array capacity */ + DEVICEID ParentArray; /* for physical device, Please don't use this field. + * use ParentArrays field in DEVICE_INFO_V2 + */ + + union { + HPT_ARRAY_INFO_V2 array; + DEVICE_INFO device; + } __attribute__((packed)) u; + +} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2; +#endif + +#if HPT_INTERFACE_VERSION>=0x01020000 +#define INVALID_TARGET_ID 0xFF +#define INVALID_BUS_ID 0xFF +typedef struct _LOGICAL_DEVICE_INFO_V3 { + HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ + HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ + HPT_U8 VBusId; /* vbus sequence in vbus_list */ + HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ + /* OS disk name: HPT DISK $VBusId_$TargetId */ + HPT_U64 Capacity; /* array capacity */ + DEVICEID ParentArray; /* for physical device, don't use this field. + * use ParentArrays field in DEVICE_INFO_V2 instead. + */ + HPT_U32 TotalIOs; + HPT_U32 TobalMBs; + HPT_U32 IOPerSec; + HPT_U32 MBPerSec; + + union { + HPT_ARRAY_INFO_V3 array; + DEVICE_INFO_V2 device; + } __attribute__((packed)) u; + +} +__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3; +#endif + +#if HPT_INTERFACE_VERSION>=0x02000001 +typedef struct _LOGICAL_DEVICE_INFO_V4 { + HPT_U32 dwSize; + HPT_U8 revision; + HPT_U8 reserved[7]; + + HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ + HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ + HPT_U8 VBusId; /* vbus sequence in vbus_list */ + HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ + /* OS disk name: HPT DISK $VBusId_$TargetId */ + HPT_U64 Capacity; /* array capacity */ + DEVICEID ParentArray; /* for physical device, don't use this field. + * use ParentArrays field in DEVICE_INFO_V2 instead. + */ + HPT_U32 TotalIOs; + HPT_U32 TobalMBs; + HPT_U32 IOPerSec; + HPT_U32 MBPerSec; + + union { + HPT_ARRAY_INFO_V4 array; + DEVICE_INFO_V3 device; + } __attribute__((packed)) u; +} +__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4; + +/*LOGICAL_DEVICE_INFO_V4 max revision number*/ +#define LOGICAL_DEVICE_INFO_V4_REVISION 0 +/*If new revision was defined please check evey revision size*/ +#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4)) +#endif + +/* + * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info() + * and set_device_info(). + * When set_xxx_info() is called, the ValidFields member indicates which + * fields in the structure are valid. + */ +/* field masks */ +#define AAIF_NAME 1 +#define AAIF_DESCRIPTION 2 + +#define ADIF_MODE 1 +#define ADIF_TCQ 2 +#define ADIF_NCQ 4 +#define ADIF_WRITE_CACHE 8 +#define ADIF_READ_AHEAD 0x10 +#define ADIF_SPIN_UP_MODE 0x20 + +typedef struct _ALTERABLE_ARRAY_INFO { + HPT_U32 ValidFields; /* mark valid fields below */ + HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */ + HPT_U8 Description[64]; /* array description */ +} +ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO; + +typedef struct _ALTERABLE_DEVICE_INFO { + HPT_U32 ValidFields; /* mark valid fields below */ + HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ +} +ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO; + +typedef struct _ALTERABLE_DEVICE_INFO_V2 { + HPT_U32 ValidFields; /* mark valid fields below */ + HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ + HPT_U8 TCQEnabled; + HPT_U8 NCQEnabled; + HPT_U8 WriteCacheEnabled; + HPT_U8 ReadAheadEnabled; + HPT_U8 SpinUpMode; + HPT_U8 reserve[2]; + HPT_U32 reserve2[13]; /* pad to 64 bytes */ +} +ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2; + +#if HPT_INTERFACE_VERSION>=0x01020000 + +#define TARGET_TYPE_DEVICE 0 +#define TARGET_TYPE_ARRAY 1 + + +#define AIT_NAME 0 +#define AIT_DESCRIPTION 1 +#define AIT_CACHE_POLICY 2 + + +#define DIT_MODE 0 +#define DIT_READ_AHEAD 1 +#define DIT_WRITE_CACHE 2 +#define DIT_TCQ 3 +#define DIT_NCQ 4 + +/* param type is determined by target_type and info_type*/ +typedef struct _SET_DEV_INFO +{ + HPT_U8 target_type; + HPT_U8 infor_type; + HPT_U16 param_length; + #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO)) + /* HPT_U8 param[0]; */ +} SET_VDEV_INFO, * PSET_VDEV_INFO; + +typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ; +typedef HPT_U8 PARAM_ARRAY_DES[64]; +typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY; + +#endif + +/* + * CREATE_ARRAY_PARAMS + * Param structure used to create an array. + */ +typedef struct _CREATE_ARRAY_PARAMS { + HPT_U8 ArrayType; /* 1-level array type */ + HPT_U8 nDisk; /* number of elements in Members[] array */ + HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ + HPT_U8 CreateFlags; /* See CAF_xxx */ + + HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + + HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */ + +} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS; + +#if HPT_INTERFACE_VERSION>=0x01010000 +typedef struct _CREATE_ARRAY_PARAMS_V2 { + HPT_U8 ArrayType; /* 1-level array type */ + HPT_U8 nDisk; /* number of elements in Members[] array */ + HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ + HPT_U8 CreateFlags; /* See CAF_xxx */ + + HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + HPT_U64 Capacity; + + HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */ + +} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2; +#endif + +#if HPT_INTERFACE_VERSION>=0x02000001 +typedef struct _CREATE_ARRAY_PARAMS_V3 { + HPT_U32 dwSize; + HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/ + HPT_U8 reserved[7]; + HPT_U8 ArrayType; /* 1-level array type */ + HPT_U8 nDisk; /* number of elements in Members[] array */ + HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ + HPT_U8 CreateFlags; /* See CAF_xxx */ + + HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ + HPT_U8 Description[64]; /* array description */ + HPT_U8 CreateManager[16]; /* who created it */ + TIME_RECORD CreateTime; /* when created it */ + HPT_U64 Capacity; + + HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */ +} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3; + +/*CREATE_ARRAY_PARAMS_V3 current max revision*/ +#define CREATE_ARRAY_PARAMS_V3_REVISION 0 +/*If new revision defined please check evey revision size*/ +#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3)) +#endif + +#if HPT_INTERFACE_VERSION < 0x01020000 +/* + * Flags used for creating an RAID 1 array + * + * CAF_CREATE_AND_DUPLICATE + * Copy source disk contents to target for RAID 1. If user choose "create and duplicate" + * to create an array, GUI will call CreateArray() with this flag set. Then GUI should + * call hpt_get_device_info() with the returned array ID and check returned flags to + * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding + * and GUI must do duplication itself. + * CAF_DUPLICATE_MUST_DONE + * If the duplication is aborted or fails, do not create the array. + */ +#define CAF_CREATE_AND_DUPLICATE 1 +#define CAF_DUPLICATE_MUST_DONE 2 +#define CAF_CREATE_AS_RAID15 4 +/* + * Flags used for creating an RAID 5 array + */ +#define CAF_CREATE_R5_NO_BUILD 1 +#define CAF_CREATE_R5_ZERO_INIT 2 +#define CAF_CREATE_R5_BUILD_PARITY 4 + +#else +/* + * Flags used for creating + */ +#define CAF_FOREGROUND_INITIALIZE 1 +#define CAF_BACKGROUND_INITIALIZE 2 +#define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<=0x01020000 +/* hpt_get_controller_info_v2 + * Version compatibility: v2.0.0.0 or later + * Parameters: + * id Controller id + * pInfo pointer to CONTROLLER_INFO_V2 buffer + * Returns: + * 0 Success, controller info is put into (*pInfo ). + */ +int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo); + +/* hpt_get_controller_info_v3 + * Version compatibility: v2.0.0.0 or later + * Parameters: + * id Controller id + * pInfo pointer to CONTROLLER_INFO_V3 buffer + * Returns: + * 0 Success, controller info is put into (*pInfo ). + */ +int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo); +#endif + +/* hpt_get_channel_info + * Version compatibility: v1.0.0.1 or later + * Parameters: + * id Controller id + * bus bus number + * pInfo pointer to CHANNEL_INFO buffer + * Returns: + * 0 Success, channel info is put into (*pInfo ). + */ +int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo); + +/* hpt_get_channel_info_v2 + * Version compatibility: v1.0.0.1 or later + * Parameters: + * id Controller id + * bus bus number + * pInfo pointer to CHANNEL_INFO buffer + * Returns: + * 0 Success, channel info is put into (*pInfo ). + */ +int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo); + +/* hpt_get_logical_devices + * Version compatibility: v1.0.0.1 or later + * Parameters: + * pIds pointer to a DEVICEID array + * nMaxCount array size + * Returns: + * Number of ID returned. All logical device IDs are put into pIds array. + * Note: A spare disk is not a logical device. + */ +int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount); + +/* hpt_get_device_info + * Version compatibility: v1.0.0.1 or later + * Parameters: + * id logical device id + * pInfo pointer to LOGICAL_DEVICE_INFO structure + * Returns: + * 0 - Success + */ +int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo); + +/* hpt_create_array + * Version compatibility: v1.0.0.1 or later + * Parameters: + * pParam pointer to CREATE_ARRAY_PARAMS structure + * Returns: + * 0 failed + * else return array id + */ +DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam); + +/* hpt_delete_array + * Version compatibility: v1.0.0.1 or later + * Parameters: + * id array id + * Returns: + * 0 Success + */ +int hpt_delete_array(DEVICEID id, HPT_U32 options); + +/* hpt_device_io + * Read/write data on array and physcal device. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * id device id. If it's an array ID, IO will be performed on the array. + * If it's a physical device ID, IO will be performed on the device. + * cmd IO_COMMAND_READ or IO_COMMAND_WRITE + * buffer data buffer + * length data size + * Returns: + * 0 Success + */ +int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer); + +/* hpt_add_disk_to_array + * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array. + * Auto-rebuild will start. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idArray array id + * idDisk disk id + * Returns: + * 0 Success + */ +int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk); + +/* hpt_add_spare_disk + * Version compatibility: v1.0.0.1 or later + * Add a disk to spare pool. + * Parameters: + * idDisk disk id + * Returns: + * 0 Success + */ +int hpt_add_spare_disk(DEVICEID idDisk); + +/* hpt_add_dedicated_spare + * Version compatibility: v1.0.0.3 or later + * Add a spare disk to an array + * Parameters: + * idDisk disk id + * idArray array id + * Returns: + * 0 Success + */ +int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray); + +/* hpt_remove_spare_disk + * remove a disk from spare pool. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idDisk disk id + * Returns: + * 0 Success + */ +int hpt_remove_spare_disk(DEVICEID idDisk); + +/* hpt_get_event + * Used to poll events from driver. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * pEvent pointer to HPT_EVENT structure + * Returns: + * 0 Success, event info is filled in *pEvent + */ +int hpt_get_event(PHPT_EVENT pEvent); + +/* hpt_rebuild_data_block + * Used to copy data from source disk and mirror disk. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idArray Array ID (RAID1, 0/1 or RAID5) + * Lba Start LBA for each array member + * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) + * + * Returns: + * 0 Success, event info is filled in *pEvent + */ +int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector); +#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3) + +/* hpt_set_array_state + * set array state. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idArray Array ID + * state See above 'array states' constants, possible values are: + * MIRROR_REBUILD_START + * Indicate that GUI wants to rebuild a mirror array + * MIRROR_REBUILD_ABORT + * GUI wants to abort rebuilding an array + * MIRROR_REBUILD_COMPLETE + * GUI finished to rebuild an array. If rebuild is done by driver this + * state has no use + * + * Returns: + * 0 Success + */ +int hpt_set_array_state(DEVICEID idArray, HPT_U32 state); + +/* hpt_set_array_info + * set array info. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idArray Array ID + * pInfo pointer to new info + * + * Returns: + * 0 Success + */ +int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo); + +/* hpt_set_device_info + * set device info. + * Version compatibility: v1.0.0.1 or later + * Parameters: + * idDisk device ID + * pInfo pointer to new info + * + * Returns: + * 0 Success + * Additional notes: + * If idDisk==0, call to this function will stop buzzer on the adapter + * (if supported by driver). + */ +int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo); + +#if HPT_INTERFACE_VERSION >= 0x01000004 +int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo); +#endif + +/* hpt_rescan_devices + * rescan devices + * Version compatibility: v1.0.0.1 or later + * Parameters: + * None + * Returns: + * 0 Success + */ +int hpt_rescan_devices(void); + +/* hpt_get_601_info + * Get HPT601 status + * Version compatibiilty: v1.0.0.3 or later + * Parameters: + * idDisk - Disk handle + * PHPT601_INFO - pointer to HPT601 info buffer + * Returns: + * 0 Success + */ +int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); + +/* hpt_set_601_info + * HPT601 function control + * Version compatibiilty: v1.0.0.3 or later + * Parameters: + * idDisk - Disk handle + * PHPT601_INFO - pointer to HPT601 info buffer + * Returns: + * 0 Success + */ +int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); + +/* hpt_lock_device + * Lock a block on a device (prevent OS accessing it) + * Version compatibiilty: v1.0.0.3 or later + * Parameters: + * idDisk - Disk handle + * Lba - Start LBA + * nSectors - number of sectors + * Returns: + * 0 Success + */ +int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors); + +/* hpt_lock_device + * Unlock a device + * Version compatibiilty: v1.0.0.3 or later + * Parameters: + * idDisk - Disk handle + * Returns: + * 0 Success + */ +int hpt_unlock_device(DEVICEID idDisk); + +/* hpt_ide_pass_through + * directly access controller's command and control registers. + * Can only call it on physical devices. + * Version compatibility: v1.0.0.3 or later + * Parameters: + * p - IDE_PASS_THROUGH header pointer + * Returns: + * 0 Success + */ +int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p); + +/* hpt_verify_data_block + * verify data block on RAID1 or RAID5. + * Version compatibility: v1.0.0.3 or later + * Parameters: + * idArray - Array ID + * Lba - block number (on each array member, not logical block!) + * nSectors - Sectors for each member (RAID 5 will ignore this parameter) + * Returns: + * 0 Success + * 1 Data compare error + * 2 I/O error + */ +int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); + +/* hpt_initialize_data_block + * initialize data block (fill with zero) on RAID5 + * Version compatibility: v1.0.0.3 or later + * Parameters: + * idArray - Array ID + * Lba - block number (on each array member, not logical block!) + * nSectors - Sectors for each member (RAID 5 will ignore this parameter) + * Returns: + * 0 Success + */ +int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); + +/* hpt_device_io_ex + * extended device I/O function + * Version compatibility: v1.0.0.3 or later + * Parameters: + * idArray - Array ID + * Lba - block number (on each array member, not logical block!) + * nSectors - Sectors for each member + * buffer - I/O buffer or s/g address + * Returns: + * 0 Success + */ +int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param); + +/* hpt_set_boot_mark + * select boot device + * Version compatibility: v1.0.0.3 or later + * Parameters: + * id - logical device ID. If id is 0 the boot mark will be removed. + * Returns: + * 0 Success + */ +int hpt_set_boot_mark(DEVICEID id); + +/* hpt_query_remove + * check if device can be removed safely + * Version compatibility: v1.0.0.4 or later + * Parameters: + * ndev - number of devices + * pIds - device ID list + * Returns: + * 0 - Success + * -1 - unknown error + * n - the n-th device that can't be removed + */ +int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds); + +/* hpt_remove_devices + * remove a list of devices + * Version compatibility: v1.0.0.4 or later + * Parameters: + * ndev - number of devices + * pIds - device ID list + * Returns: + * 0 - Success + * -1 - unknown error + * n - the n-th device that can't be removed + */ +int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds); + +/* hpt_create_array_v2 + * Version compatibility: v1.1.0.0 or later + * Parameters: + * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure + * Returns: + * 0 failed + * else return array id + */ +#if HPT_INTERFACE_VERSION>=0x01010000 +DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam); +#endif + +/* hpt_create_array_v3 + * Version compatibility: v2.0.0.1 or later + * Parameters: + * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure + * Returns: + * 0 failed + * else return array id + */ +#if HPT_INTERFACE_VERSION>=0x02000001 +DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam); +#endif + +/* hpt_get_device_info_v2 + * Version compatibility: v1.1.0.0 or later + * Parameters: + * id logical device id + * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x01010000 +int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo); +#endif + +/* hpt_get_device_info_v3 + * Version compatibility: v1.2.0.0 or later + * Parameters: + * id logical device id + * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x01020000 +int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo); +#endif + +/* hpt_get_device_info_v4 + * Version compatibility: v2.0.0.1 or later + * Parameters: + * id logical device id + * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x02000001 +int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo); +#endif + +/* hpt_create_transform + * create a transform instance. + * Version compatibility: v2.0.0.0 or later + * Parameters: + * idArray - source array + * destInfo - destination array info + * Returns: + * destination array id + */ +#if HPT_INTERFACE_VERSION>=0x02000000 +DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo); +#endif + +/* hpt_create_transform_v2 + * create a transform instance. + * Version compatibility: v2.0.0.1 or later + * Parameters: + * idArray - source array + * destInfo - destination array info + * Returns: + * destination array id + */ +#if HPT_INTERFACE_VERSION>=0x02000001 +DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo); +#endif + +/* hpt_step_transform + * move a block in a tranform progress. + * This function is called by mid-layer, not GUI (which uses set_array_state instead). + * Version compatibility: v2.0.0.0 or later + * Parameters: + * idArray - destination array ID + * the source ID will be invalid when transform complete. + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x02000000 +int hpt_step_transform(DEVICEID idArray); +#endif + +/* hpt_set_vdev_info + * set information for disk or array + * Version compatibility: v1.2.0.0 or later + * Parameters: + * dev - destination device + * + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x01020000 +int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo); +#endif + +/* hpt_init_disks + * initialize disks for use + * Version compatibility: v2.0.0.0 or later + * Parameters: + * ndev - number of disks to initialize + * pIds - array of DEVICEID + * + * Returns: + * 0 - Success + */ +#if HPT_INTERFACE_VERSION>=0x02000000 +int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds); +#endif + +/* hpt_calc_max_array_capacity + * cap max capacity of the array user want to create or transform + * Version compatibility: v1.2.0.0 or later + * Parameters: + * source - if transform, this is the source array, otherwise, it should be zero + * destInfo - target array params + * Returns: + * 0 - Success + * cap - max capacity of the target array + */ +#if HPT_INTERFACE_VERSION>=0x01020000 +int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap); +#endif + +/* hpt_calc_max_array_capacity_v2 + * cap max capacity of the array user want to create or transform + * Version compatibility: v2.0.0.1 or later + * Parameters: + * source - if transform, this is the source array, otherwise, it should be zero + * destInfo - target array params + * Returns: + * 0 - Success + * cap - max capacity of the target array + */ +#if HPT_INTERFACE_VERSION>=0x02000001 +int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap); +#endif + +/* hpt_rebuild_data_block2 + * Used to copy data from source disk and mirror disk. + * Version compatibility: v1.1.0.0 or later + * Parameters: + * idArray Array ID (RAID1, 0/1 or RAID5) + * Lba Start LBA for each array member + * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) + * + * Returns: + * 0 Success, event info is filled in *pEvent + */ +#if HPT_INTERFACE_VERSION>=0x01010000 +int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector); +#endif + +/* hpt_verify_data_block2 + * verify data block on RAID1 or RAID5. + * Version compatibility: v1.1.0.0 or later + * Parameters: + * idArray - Array ID + * Lba - block number (on each array member, not logical block!) + * nSectors - Sectors for each member (RAID 5 will ignore this parameter) + * Returns: + * 0 Success + * 1 Data compare error + * 2 I/O error + */ +#if HPT_INTERFACE_VERSION>=0x01010000 +int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); +#endif + +/* hpt_initialize_data_block2 + * initialize data block (fill with zero) on RAID5 + * Version compatibility: v1.1.0.0 or later + * Parameters: + * idArray - Array ID + * Lba - block number (on each array member, not logical block!) + * nSectors - Sectors for each member (RAID 5 will ignore this parameter) + * Returns: + * 0 Success + */ +#if HPT_INTERFACE_VERSION>=0x01010000 +int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); +#endif + +/* hpt_i2c_transaction + * perform an transaction on i2c bus + * Version compatibility: v2.0.0.0 or later + * Parameters: + * indata[0] - controller ID + * Returns: + * 0 Success + */ +#if HPT_INTERFACE_VERSION>=0x01020000 +int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen); +#endif + +/* hpt_get_parameter_list + * get a list of driver parameters. + * Version compatibility: v1.0.0.0 or later + * Parameters: + * location - parameter location + * outBuffer - a buffer to hold the output + * outBufferSize - size of outBuffer + * Returns: + * 0 Success + * put in outBuffer a list of zero terminated parameter names. the whole list + * is terminated with an additional zero byte. + */ +int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize); + +/* hpt_{get,set}_parameter + * get/set a parameter value. + * Version compatibility: v1.0.0.0 or later + * Parameters: + * pParam - a pointer to HPT_DRIVER_PARAMETER. + * Returns: + * 0 Success + */ +int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam); +int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam); +int hpt_reenumerate_device(DEVICEID id); + +#endif + +#pragma pack() + +#ifdef __cplusplus +} +#endif +#endif diff --git a/sys/dev/hptrr/hptrr_config.c b/sys/dev/hptrr/hptrr_config.c new file mode 100644 index 000000000000..9ebbfc87ea2f --- /dev/null +++ b/sys/dev/hptrr/hptrr_config.c @@ -0,0 +1,69 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/**************************************************************************** + * config.c - auto-generated file + ****************************************************************************/ +#include + +extern int init_module_him_rr2310pm(void); +extern int init_module_him_rr174x_rr2210pm(void); +extern int init_module_him_rr2522pm(void); +extern int init_module_him_rr2340(void); +extern int init_module_him_rr222x_rr2240(void); +extern int init_module_him_rr1720(void); +extern int init_module_him_rr232x(void); +extern int init_module_vdev_raw(void); +extern int init_module_partition(void); +extern int init_module_raid0(void); +extern int init_module_raid1(void); +extern int init_module_raid5(void); +extern int init_module_jbod(void); + +int init_config(void) +{ + init_module_him_rr2310pm(); + init_module_him_rr174x_rr2210pm(); + init_module_him_rr2522pm(); + init_module_him_rr2340(); + init_module_him_rr222x_rr2240(); + init_module_him_rr1720(); + init_module_him_rr232x(); + init_module_vdev_raw(); + init_module_partition(); + init_module_raid0(); + init_module_raid1(); + init_module_raid5(); + init_module_jbod(); + return 0; +} + +char driver_name[] = "hptrr"; +char driver_name_long[] = "HPT RocketRAID controller driver"; +char driver_ver[] = "v1.1 (" __DATE__ " " __TIME__ ")"; +int osm_max_targets = 0xff; diff --git a/sys/dev/hptrr/hptrr_config.h b/sys/dev/hptrr/hptrr_config.h new file mode 100644 index 000000000000..53010ccd953f --- /dev/null +++ b/sys/dev/hptrr/hptrr_config.h @@ -0,0 +1,144 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#ifndef hptrr_CONFIG_H +#define hptrr_CONFIG_H +#define SUPPORT_ARRAY +#define __KERNEL__ 1 +#define DRIVER_MINOR 16 +#define TARGETNAME hptrr +#define __dummy_reg hptrr___dummy_reg +#define __ldm_alloc_cmd hptrr___ldm_alloc_cmd +#define dmapool_active hptrr_dmapool_active +#define dmapool_get_page hptrr_dmapool_get_page +#define dmapool_get_page_at hptrr_dmapool_get_page_at +#define dmapool_make_order hptrr_dmapool_make_order +#define dmapool_max_class_pages hptrr_dmapool_max_class_pages +#define dmapool_put_page hptrr_dmapool_put_page +#define dmapool_register_client hptrr_dmapool_register_client +#define driver_name hptrr_driver_name +#define driver_name_long hptrr_driver_name_long +#define driver_ver hptrr_driver_ver +#define freelist_get hptrr_freelist_get +#define freelist_get_dma hptrr_freelist_get_dma +#define freelist_put hptrr_freelist_put +#define freelist_put_dma hptrr_freelist_put_dma +#define freelist_reserve hptrr_freelist_reserve +#define freelist_reserve_dma hptrr_freelist_reserve_dma +#define him_handle_to_vbus hptrr_him_handle_to_vbus +#define him_list hptrr_him_list +#define init_config hptrr_init_config +#define init_module_him_rr1720 hptrr_init_module_him_rr1720 +#define init_module_him_rr174x_rr2210pm hptrr_init_module_him_rr174x_rr2210pm +#define init_module_him_rr222x_rr2240 hptrr_init_module_him_rr222x_rr2240 +#define init_module_him_rr2310pm hptrr_init_module_him_rr2310pm +#define init_module_him_rr232x hptrr_init_module_him_rr232x +#define init_module_him_rr2340 hptrr_init_module_him_rr2340 +#define init_module_him_rr2522pm hptrr_init_module_him_rr2522pm +#define init_module_jbod hptrr_init_module_jbod +#define init_module_partition hptrr_init_module_partition +#define init_module_raid0 hptrr_init_module_raid0 +#define init_module_raid1 hptrr_init_module_raid1 +#define init_module_raid5 hptrr_init_module_raid5 +#define init_module_vdev_raw hptrr_init_module_vdev_raw +#define ldm_acquire_lock hptrr_ldm_acquire_lock +#define ldm_add_spare_to_array hptrr_ldm_add_spare_to_array +#define ldm_alloc_cmds_R_5_41_57_40_16 hptrr_ldm_alloc_cmds_R_5_41_57_40_16 +#define ldm_alloc_cmds_from_list hptrr_ldm_alloc_cmds_from_list +#define ldm_check_array_online hptrr_ldm_check_array_online +#define ldm_create_vbus hptrr_ldm_create_vbus +#define ldm_create_vdev hptrr_ldm_create_vdev +#define ldm_event_notify hptrr_ldm_event_notify +#define ldm_find_stamp hptrr_ldm_find_stamp +#define ldm_find_target hptrr_ldm_find_target +#define ldm_finish_cmd hptrr_ldm_finish_cmd +#define ldm_free_cmds hptrr_ldm_free_cmds +#define ldm_free_cmds_to_list hptrr_ldm_free_cmds_to_list +#define ldm_generic_member_failed hptrr_ldm_generic_member_failed +#define ldm_get_cmd_size hptrr_ldm_get_cmd_size +#define ldm_get_device_id hptrr_ldm_get_device_id +#define ldm_get_mem_info hptrr_ldm_get_mem_info +#define ldm_get_next_vbus hptrr_ldm_get_next_vbus +#define ldm_get_vbus_ext hptrr_ldm_get_vbus_ext +#define ldm_get_vbus_size hptrr_ldm_get_vbus_size +#define ldm_idle hptrr_ldm_idle +#define ldm_initialize_vbus_async hptrr_ldm_initialize_vbus_async +#define ldm_intr hptrr_ldm_intr +#define ldm_ioctl hptrr_ldm_ioctl +#define ldm_on_timer hptrr_ldm_on_timer +#define ldm_queue_cmd hptrr_ldm_queue_cmd +#define ldm_queue_task hptrr_ldm_queue_task +#define ldm_queue_vbus_dpc hptrr_ldm_queue_vbus_dpc +#define ldm_register_adapter hptrr_ldm_register_adapter +#define ldm_register_device hptrr_ldm_register_device +#define ldm_register_him_R_5_41_57_40_16 hptrr_ldm_register_him_R_5_41_57_40_16 +#define ldm_register_vdev_class_R_5_41_57_40_16 hptrr_ldm_register_vdev_class_R_5_41_57_40_16 +#define ldm_release_lock hptrr_ldm_release_lock +#define ldm_release_vbus hptrr_ldm_release_vbus +#define ldm_release_vdev hptrr_ldm_release_vdev +#define ldm_remove_timer hptrr_ldm_remove_timer +#define ldm_request_timer hptrr_ldm_request_timer +#define ldm_reset_vbus hptrr_ldm_reset_vbus +#define ldm_resume hptrr_ldm_resume +#define ldm_set_autorebuild hptrr_ldm_set_autorebuild +#define ldm_set_rebuild_priority hptrr_ldm_set_rebuild_priority +#define ldm_shutdown hptrr_ldm_shutdown +#define ldm_suspend hptrr_ldm_suspend +#define ldm_sync_array_info hptrr_ldm_sync_array_info +#define ldm_sync_array_stamp hptrr_ldm_sync_array_stamp +#define ldm_timer_probe_device hptrr_ldm_timer_probe_device +#define ldm_unregister_device hptrr_ldm_unregister_device +#define log_sector_repair hptrr_log_sector_repair +#define num_drives_per_spinup hptrr_num_drives_per_spinup +#define os_get_stamp hptrr_os_get_stamp +#define os_get_vbus_seq hptrr_os_get_vbus_seq +#define os_inb hptrr_os_inb +#define os_inl hptrr_os_inl +#define os_insw hptrr_os_insw +#define os_inw hptrr_os_inw +#define os_map_pci_bar hptrr_os_map_pci_bar +#define os_outb hptrr_os_outb +#define os_outl hptrr_os_outl +#define os_outsw hptrr_os_outsw +#define os_outw hptrr_os_outw +#define os_pci_readb hptrr_os_pci_readb +#define os_pci_readl hptrr_os_pci_readl +#define os_pci_readw hptrr_os_pci_readw +#define os_pci_writeb hptrr_os_pci_writeb +#define os_pci_writel hptrr_os_pci_writel +#define os_pci_writew hptrr_os_pci_writew +#define os_printk hptrr_os_printk +#define os_query_remove_device hptrr_os_query_remove_device +#define os_query_time hptrr_os_query_time +#define os_request_timer hptrr_os_request_timer +#define os_revalidate_device hptrr_os_revalidate_device +#define os_schedule_task hptrr_os_schedule_task +#define os_stallexec hptrr_os_stallexec +#define os_unmap_pci_bar hptrr_os_unmap_pci_bar +#define osm_max_targets hptrr_osm_max_targets +#define vdev_queue_cmd hptrr_vdev_queue_cmd +#endif diff --git a/sys/dev/hptrr/hptrr_os_bsd.c b/sys/dev/hptrr/hptrr_os_bsd.c new file mode 100644 index 000000000000..ee74d21e9445 --- /dev/null +++ b/sys/dev/hptrr/hptrr_os_bsd.c @@ -0,0 +1,302 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* $Id: os_bsd.c,v 1.11 2005/06/03 14:06:38 kdh Exp $ + * + * HighPoint RAID Driver for FreeBSD + * Copyright (C) 2005 HighPoint Technologies, Inc. All Rights Reserved. + */ + +#include + +/* hardware access */ +HPT_U8 os_inb (void *port) { return inb((unsigned)(HPT_UPTR)port); } +HPT_U16 os_inw (void *port) { return inw((unsigned)(HPT_UPTR)port); } +HPT_U32 os_inl (void *port) { return inl((unsigned)(HPT_UPTR)port); } + +void os_outb (void *port, HPT_U8 value) { outb((unsigned)(HPT_UPTR)port, (value)); } +void os_outw (void *port, HPT_U16 value) { outw((unsigned)(HPT_UPTR)port, (value)); } +void os_outl (void *port, HPT_U32 value) { outl((unsigned)(HPT_UPTR)port, (value)); } + +void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count) +{ insw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } + +void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count) +{ outsw((unsigned)(HPT_UPTR)port, (void *)buffer, count); } + +HPT_U32 __dummy_reg = 0; + +/* PCI configuration space */ +HPT_U8 os_pci_readb (void *osext, HPT_U8 offset) +{ + return pci_read_config(((PHBA)osext)->pcidev, offset, 1); +} + +HPT_U16 os_pci_readw (void *osext, HPT_U8 offset) +{ + return pci_read_config(((PHBA)osext)->pcidev, offset, 2); +} + +HPT_U32 os_pci_readl (void *osext, HPT_U8 offset) +{ + return pci_read_config(((PHBA)osext)->pcidev, offset, 4); +} + +void os_pci_writeb (void *osext, HPT_U8 offset, HPT_U8 value) +{ + pci_write_config(((PHBA)osext)->pcidev, offset, value, 1); +} + +void os_pci_writew (void *osext, HPT_U8 offset, HPT_U16 value) +{ + pci_write_config(((PHBA)osext)->pcidev, offset, value, 2); +} + +void os_pci_writel (void *osext, HPT_U8 offset, HPT_U32 value) +{ + pci_write_config(((PHBA)osext)->pcidev, offset, value, 4); +} + +void *os_map_pci_bar( + void *osext, + int index, + HPT_U32 offset, + HPT_U32 length +) +{ + PHBA hba = (PHBA)osext; + + hba->pcibar[index].rid = 0x10 + index * 4; + + if (pci_read_config(hba->pcidev, hba->pcibar[index].rid, 4) & 1) + hba->pcibar[index].type = SYS_RES_IOPORT; + else + hba->pcibar[index].type = SYS_RES_MEMORY; + + hba->pcibar[index].res = bus_alloc_resource(hba->pcidev, + hba->pcibar[index].type, &hba->pcibar[index].rid, 0, ~0, length, RF_ACTIVE); + + hba->pcibar[index].base = (char *)rman_get_virtual(hba->pcibar[index].res) + offset; + return hba->pcibar[index].base; +} + +void os_unmap_pci_bar(void *osext, void *base) +{ + PHBA hba = (PHBA)osext; + int index; + + for (index=0; index<6; index++) { + if (hba->pcibar[index].base==base) { + bus_release_resource(hba->pcidev, hba->pcibar[index].type, + hba->pcibar[index].rid, hba->pcibar[index].res); + hba->pcibar[index].base = 0; + return; + } + } +} + +void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count) +{ + PVBUS_EXT vbus_ext = osext; + + if (vbus_ext->ext_type!=EXT_TYPE_VBUS) + vbus_ext = ((PHBA)osext)->vbus_ext; + + list->next = vbus_ext->freelist_head; + vbus_ext->freelist_head = list; + list->dma = 0; + list->size = size; + list->head = 0; +#ifdef DBG + list->reserved_count = +#endif + list->count = count; +} + +void *freelist_get(struct freelist *list) +{ + void * result; + if (list->count) { + HPT_ASSERT(list->head); + result = list->head; + list->head = *(void **)result; + list->count--; + return result; + } + return 0; +} + +void freelist_put(struct freelist * list, void *p) +{ + HPT_ASSERT(list->dma==0); + list->count++; + *(void **)p = list->head; + list->head = p; +} + +void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count) +{ + PVBUS_EXT vbus_ext = osext; + + if (vbus_ext->ext_type!=EXT_TYPE_VBUS) + vbus_ext = ((PHBA)osext)->vbus_ext; + + list->next = vbus_ext->freelist_dma_head; + vbus_ext->freelist_dma_head = list; + list->dma = 1; + list->alignment = alignment; + list->size = size; + list->head = 0; +#ifdef DBG + list->reserved_count = +#endif + list->count = count; +} + +void *freelist_get_dma(struct freelist *list, BUS_ADDRESS *busaddr) +{ + void *result; + HPT_ASSERT(list->dma); + result = freelist_get(list); + if (result) + *busaddr = *(BUS_ADDRESS *)((void **)result+1); + return result; +} + +void freelist_put_dma(struct freelist *list, void *p, BUS_ADDRESS busaddr) +{ + HPT_ASSERT(list->dma); + list->count++; + *(void **)p = list->head; + *(BUS_ADDRESS *)((void **)p+1) = busaddr; + list->head = p; +} + +HPT_U32 os_get_stamp(void) +{ + HPT_U32 stamp; + do { stamp = random(); } while (stamp==0); + return stamp; +} + +void os_stallexec(HPT_U32 microseconds) +{ + DELAY(microseconds); +} + +static void os_timer_for_ldm(void *arg) +{ + PVBUS_EXT vbus_ext = (PVBUS_EXT)arg; + ldm_on_timer((PVBUS)vbus_ext->vbus); +} + +void os_request_timer(void * osext, HPT_U32 interval) +{ + PVBUS_EXT vbus_ext = osext; + + HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS); + + untimeout(os_timer_for_ldm, vbus_ext, vbus_ext->timer); + vbus_ext->timer = timeout(os_timer_for_ldm, vbus_ext, interval * hz / 1000000); +} + +HPT_TIME os_query_time(void) +{ + return ticks * (1000000 / hz); +} + +void os_schedule_task(void *osext, OSM_TASK *task) +{ + PVBUS_EXT vbus_ext = osext; + + HPT_ASSERT(task->next==0); + + if (vbus_ext->tasks==0) + vbus_ext->tasks = task; + else { + OSM_TASK *t = vbus_ext->tasks; + while (t->next) t = t->next; + t->next = task; + } + + if (vbus_ext->worker.ta_context) + TASK_ENQUEUE(&vbus_ext->worker); +} + +int os_revalidate_device(void *osext, int id) +{ + + return 0; +} + +int os_query_remove_device(void *osext, int id) +{ + PVBUS_EXT vbus_ext = (PVBUS_EXT)osext; + struct cam_periph *periph = NULL; + struct cam_path *path; + int status,retval = 0; + + status = xpt_create_path(&path, NULL, vbus_ext->sim->path_id, id, 0); + if (status == CAM_REQ_CMP) { + if((periph = cam_periph_find(path, "da")) != NULL){ + if(periph->refcount >= 1) + retval = -1; + } + xpt_free_path(path); + } + + return retval; +} + +HPT_U8 os_get_vbus_seq(void *osext) +{ + return ((PVBUS_EXT)osext)->sim->path_id; +} + +int os_printk(char *fmt, ...) +{ + va_list args; + static char buf[512]; + + va_start(args, fmt); + vsnprintf(buf, sizeof(buf), fmt, args); + va_end(args); + return printf("%s: %s\n", driver_name, buf); +} + +#ifdef DBG +void os_check_stack(const char *location, int size){} + +void __os_dbgbreak(const char *file, int line) +{ + printf("*** break at %s:%d ***", file, line); + while (1); +} + +int hpt_dbg_level = 1; +#endif diff --git a/sys/dev/hptrr/hptrr_osm_bsd.c b/sys/dev/hptrr/hptrr_osm_bsd.c new file mode 100644 index 000000000000..64596cf6e7ed --- /dev/null +++ b/sys/dev/hptrr/hptrr_osm_bsd.c @@ -0,0 +1,1415 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* $Id: osm_bsd.c,v 1.26 2007/02/28 03:53:47 gmm Exp $ + * + * HighPoint RAID Driver for FreeBSD + * Copyright (C) 2005 HighPoint Technologies, Inc. All Rights Reserved. + */ +#include +#include + +static int hpt_probe(device_t dev) +{ + PCI_ID pci_id; + HIM *him; + int i; + PHBA hba; + + for (him = him_list; him; him = him->next) { + for (i=0; him->get_supported_device_id(i, &pci_id); i++) { + if ((pci_get_vendor(dev) == pci_id.vid) && + (pci_get_device(dev) == pci_id.did)){ + KdPrint(("hpt_probe: adapter at PCI %d:%d:%d, IRQ %d", + pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev), pci_get_irq(dev) + )); + device_set_desc(dev, him->name); + hba = (PHBA)device_get_softc(dev); + memset(hba, 0, sizeof(HBA)); + hba->ext_type = EXT_TYPE_HBA; + hba->ldm_adapter.him = him; + return 0; + } + } + } + + return (ENXIO); +} + +static int hpt_attach(device_t dev) +{ + PHBA hba = (PHBA)device_get_softc(dev); + HIM *him = hba->ldm_adapter.him; + PCI_ID pci_id; + HPT_UINT size; + PVBUS vbus; + PVBUS_EXT vbus_ext; + + KdPrint(("hpt_attach(%d/%d/%d)", pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev))); + +#if __FreeBSD_version >=440000 + pci_enable_busmaster(dev); +#endif + + pci_id.vid = pci_get_vendor(dev); + pci_id.did = pci_get_device(dev); + pci_id.rev = pci_get_revid(dev); + + size = him->get_adapter_size(&pci_id); + hba->ldm_adapter.him_handle = malloc(size, M_DEVBUF, M_WAITOK); + if (!hba->ldm_adapter.him_handle) + return ENXIO; + + hba->pcidev = dev; + hba->pciaddr.tree = 0; + hba->pciaddr.bus = pci_get_bus(dev); + hba->pciaddr.device = pci_get_slot(dev); + hba->pciaddr.function = pci_get_function(dev); + + if (!him->create_adapter(&pci_id, hba->pciaddr, hba->ldm_adapter.him_handle, hba)) { + free(hba->ldm_adapter.him_handle, M_DEVBUF); + return -1; + } + + os_printk("adapter at PCI %d:%d:%d, IRQ %d", + hba->pciaddr.bus, hba->pciaddr.device, hba->pciaddr.function, pci_get_irq(dev)); + + if (!ldm_register_adapter(&hba->ldm_adapter)) { + size = ldm_get_vbus_size(); + vbus_ext = malloc(sizeof(VBUS_EXT) + size, M_DEVBUF, M_WAITOK); + if (!vbus_ext) { + free(hba->ldm_adapter.him_handle, M_DEVBUF); + return -1; + } + memset(vbus_ext, 0, sizeof(VBUS_EXT)); + vbus_ext->ext_type = EXT_TYPE_VBUS; + ldm_create_vbus((PVBUS)vbus_ext->vbus, vbus_ext); + ldm_register_adapter(&hba->ldm_adapter); + } + + ldm_for_each_vbus(vbus, vbus_ext) { + if (hba->ldm_adapter.vbus==vbus) { + hba->vbus_ext = vbus_ext; + hba->next = vbus_ext->hba_list; + vbus_ext->hba_list = hba; + break; + } + } + return 0; +} + +/* + * Maybe we'd better to use the bus_dmamem_alloc to alloc DMA memory, + * but there are some problems currently (alignment, etc). + */ +static __inline void *__get_free_pages(int order) +{ + /* don't use low memory - other devices may get starved */ + return contigmalloc(PAGE_SIZE<hba_list; hba; hba = hba->next) + hba->ldm_adapter.him->get_meminfo(hba->ldm_adapter.him_handle); + + ldm_get_mem_info((PVBUS)vbus_ext->vbus, 0); + + for (f=vbus_ext->freelist_head; f; f=f->next) { + KdPrint(("%s: %d*%d=%d bytes", + f->tag, f->count, f->size, f->count*f->size)); + for (i=0; icount; i++) { + p = (void **)malloc(f->size, M_DEVBUF, M_WAITOK); + if (!p) return (ENXIO); + *p = f->head; + f->head = p; + } + } + + for (f=vbus_ext->freelist_dma_head; f; f=f->next) { + int order, size, j; + + HPT_ASSERT((f->size & (f->alignment-1))==0); + + for (order=0, size=PAGE_SIZE; sizesize; order++, size<<=1) ; + + KdPrint(("%s: %d*%d=%d bytes, order %d", + f->tag, f->count, f->size, f->count*f->size, order)); + HPT_ASSERT(f->alignment<=PAGE_SIZE); + + for (i=0; icount;) { + p = (void **)__get_free_pages(order); + if (!p) return -1; + for (j = size/f->size; j && icount; i++,j--) { + *p = f->head; + *(BUS_ADDRESS *)(p+1) = (BUS_ADDRESS)vtophys(p); + f->head = p; + p = (void **)((unsigned long)p + f->size); + } + } + } + + HPT_ASSERT(PAGE_SIZE==DMAPOOL_PAGE_SIZE); + + for (i=0; ivbus, p, (BUS_ADDRESS)vtophys(p)); + } + + return 0; +} + +static void hpt_free_mem(PVBUS_EXT vbus_ext) +{ + struct freelist *f; + void *p; + int i; + BUS_ADDRESS bus; + + for (f=vbus_ext->freelist_head; f; f=f->next) { +#ifdef DBG + if (f->count!=f->reserved_count) { + KdPrint(("memory leak for freelist %s (%d/%d)", f->tag, f->count, f->reserved_count)); + } +#endif + while ((p=freelist_get(f))) + free(p, M_DEVBUF); + } + + for (i=0; ivbus, &bus); + HPT_ASSERT(p); + free_pages(p, 0); + } + + for (f=vbus_ext->freelist_dma_head; f; f=f->next) { + int order, size; +#ifdef DBG + if (f->count!=f->reserved_count) { + KdPrint(("memory leak for dma freelist %s (%d/%d)", f->tag, f->count, f->reserved_count)); + } +#endif + for (order=0, size=PAGE_SIZE; sizesize; order++, size<<=1) ; + + while ((p=freelist_get_dma(f, &bus))) { + if (order) + free_pages(p, order); + else { + /* can't free immediately since other blocks in this page may still be in the list */ + if (((HPT_UPTR)p & (PAGE_SIZE-1))==0) + dmapool_put_page((PVBUS)vbus_ext->vbus, p, bus); + } + } + } + + while ((p = dmapool_get_page((PVBUS)vbus_ext->vbus, &bus))) + free_pages(p, 0); +} + +static int hpt_init_vbus(PVBUS_EXT vbus_ext) +{ + PHBA hba; + + for (hba = vbus_ext->hba_list; hba; hba = hba->next) + if (!hba->ldm_adapter.him->initialize(hba->ldm_adapter.him_handle)) { + KdPrint(("fail to initialize %p", hba)); + return -1; + } + + ldm_initialize_vbus((PVBUS)vbus_ext->vbus, &vbus_ext->hba_list->ldm_adapter); + return 0; +} + +static void hpt_flush_done(PCOMMAND pCmd) +{ + PVDEV vd = pCmd->target; + + if (mIsArray(vd->Class->type) && vd->u.array.transform && vd!=vd->u.array.transform->target) { + vd = vd->u.array.transform->target; + HPT_ASSERT(vd); + pCmd->target = vd; + pCmd->Result = RETURN_PENDING; + vdev_queue_cmd(pCmd); + return; + } + + *(int *)pCmd->priv = 1; + wakeup(pCmd); +} + +/* + * flush a vdev (without retry). + */ +static int hpt_flush_vdev(PVBUS_EXT vbus_ext, PVDEV vd) +{ + PCOMMAND pCmd; + int result = 0, done; + HPT_UINT count; + + KdPrint(("flusing dev %p", vd)); + + hpt_lock_vbus(vbus_ext); + + if (mIsArray(vd->Class->type) && vd->u.array.transform) + count = MAX(vd->u.array.transform->source->cmds_per_request, + vd->u.array.transform->target->cmds_per_request); + else + count = vd->cmds_per_request; + + pCmd = ldm_alloc_cmds(vd->vbus, count); + + if (!pCmd) { + hpt_unlock_vbus(vbus_ext); + return -1; + } + + pCmd->type = CMD_TYPE_FLUSH; + pCmd->flags.hard_flush = 1; + pCmd->target = vd; + pCmd->done = hpt_flush_done; + done = 0; + pCmd->priv = &done; + + ldm_queue_cmd(pCmd); + + if (!done) { + while (hpt_sleep(vbus_ext, pCmd, PPAUSE, "hptfls", HPT_OSM_TIMEOUT)) { + ldm_reset_vbus(vd->vbus); + } + } + + KdPrint(("flush result %d", pCmd->Result)); + + if (pCmd->Result!=RETURN_SUCCESS) + result = -1; + + ldm_free_cmds(pCmd); + + hpt_unlock_vbus(vbus_ext); + + return result; +} + +static void hpt_stop_tasks(PVBUS_EXT vbus_ext); +static void hpt_shutdown_vbus(PVBUS_EXT vbus_ext, int howto) +{ + PVBUS vbus = (PVBUS)vbus_ext->vbus; + PHBA hba; + int i; + + KdPrint(("hpt_shutdown_vbus")); + + /* stop all ctl tasks and disable the worker taskqueue */ + hpt_stop_tasks(vbus_ext); + vbus_ext->worker.ta_context = 0; + + /* flush devices */ + for (i=0; ihba_list; hba; hba=hba->next) + bus_teardown_intr(hba->pcidev, hba->irq_res, hba->irq_handle); + + hpt_free_mem(vbus_ext); + + while ((hba=vbus_ext->hba_list)) { + vbus_ext->hba_list = hba->next; + free(hba->ldm_adapter.him_handle, M_DEVBUF); + } + + free(vbus_ext, M_DEVBUF); + KdPrint(("hpt_shutdown_vbus done")); +} + +static void __hpt_do_tasks(PVBUS_EXT vbus_ext) +{ + OSM_TASK *tasks; + + tasks = vbus_ext->tasks; + vbus_ext->tasks = 0; + + while (tasks) { + OSM_TASK *t = tasks; + tasks = t->next; + t->next = 0; + t->func(vbus_ext->vbus, t->data); + } +} + +static void hpt_do_tasks(PVBUS_EXT vbus_ext, int pending) +{ + if(vbus_ext){ + hpt_lock_vbus(vbus_ext); + __hpt_do_tasks(vbus_ext); + hpt_unlock_vbus(vbus_ext); + } +} + +static void hpt_action(struct cam_sim *sim, union ccb *ccb); +static void hpt_poll(struct cam_sim *sim); +static void hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, void * arg); +static void hpt_pci_intr(void *arg); + +static __inline POS_CMDEXT cmdext_get(PVBUS_EXT vbus_ext) +{ + POS_CMDEXT p = vbus_ext->cmdext_list; + if (p) + vbus_ext->cmdext_list = p->next; + return p; +} + +static __inline void cmdext_put(POS_CMDEXT p) +{ + p->next = p->vbus_ext->cmdext_list; + p->vbus_ext->cmdext_list = p; +} + +static void hpt_timeout(void *arg) +{ + PCOMMAND pCmd = (PCOMMAND)arg; + POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv; + + KdPrint(("pCmd %p timeout", pCmd)); + + ldm_reset_vbus((PVBUS)ext->vbus_ext->vbus); +} + +static void os_cmddone(PCOMMAND pCmd) +{ + POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv; + union ccb *ccb = ext->ccb; + + KdPrint(("os_cmddone(%p, %d)", pCmd, pCmd->Result)); + + untimeout(hpt_timeout, pCmd, ccb->ccb_h.timeout_ch); + + switch(pCmd->Result) { + case RETURN_SUCCESS: + ccb->ccb_h.status = CAM_REQ_CMP; + break; + case RETURN_BAD_DEVICE: + ccb->ccb_h.status = CAM_DEV_NOT_THERE; + break; + case RETURN_DEVICE_BUSY: + ccb->ccb_h.status = CAM_BUSY; + break; + case RETURN_INVALID_REQUEST: + ccb->ccb_h.status = CAM_REQ_INVALID; + break; + case RETURN_SELECTION_TIMEOUT: + ccb->ccb_h.status = CAM_SEL_TIMEOUT; + break; + case RETURN_RETRY: + ccb->ccb_h.status = CAM_BUSY; + break; + default: + ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; + break; + } + + if (pCmd->flags.data_in) { + bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_POSTREAD); + } + else if (pCmd->flags.data_out) { + bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_POSTWRITE); + } + + bus_dmamap_unload(ext->vbus_ext->io_dmat, ext->dma_map); + + cmdext_put(ext); + ldm_free_cmds(pCmd); + xpt_done(ccb); +} + +static int os_buildsgl(PCOMMAND pCmd, PSG pSg, int logical) +{ + POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv; + union ccb *ccb = ext->ccb; + bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr; + int idx; + + if(logical) { + if (ccb->ccb_h.flags & CAM_DATA_PHYS) + panic("physical address unsupported"); + + if (ccb->ccb_h.flags & CAM_SCATTER_VALID) { + if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS) + panic("physical address unsupported"); + + for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) { + os_set_sgptr(&pSg[idx], (HPT_U8 *)(HPT_UPTR)sgList[idx].ds_addr); + pSg[idx].size = sgList[idx].ds_len; + pSg[idx].eot = (idx==ccb->csio.sglist_cnt-1)? 1 : 0; + } + } + else { + os_set_sgptr(pSg, (HPT_U8 *)ccb->csio.data_ptr); + pSg->size = ccb->csio.dxfer_len; + pSg->eot = 1; + } + return TRUE; + } + + /* since we have provided physical sg, nobody will ask us to build physical sg */ + HPT_ASSERT(0); + return FALSE; +} + +static void hpt_io_dmamap_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) +{ + PCOMMAND pCmd = (PCOMMAND)arg; + POS_CMDEXT ext = (POS_CMDEXT)pCmd->priv; + PSG psg = pCmd->psg; + int idx; + + HPT_ASSERT(pCmd->flags.physical_sg); + + if (error || nsegs == 0) + panic("busdma error"); + + HPT_ASSERT(nsegs<=os_max_sg_descriptors); + + for (idx = 0; idx < nsegs; idx++, psg++) { + psg->addr.bus = segs[idx].ds_addr; + psg->size = segs[idx].ds_len; + psg->eot = 0; + } + psg[-1].eot = 1; + + if (pCmd->flags.data_in) { + bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_PREREAD); + } + else if (pCmd->flags.data_out) { + bus_dmamap_sync(ext->vbus_ext->io_dmat, ext->dma_map, BUS_DMASYNC_PREWRITE); + } + + ext->ccb->ccb_h.timeout_ch = timeout(hpt_timeout, pCmd, HPT_OSM_TIMEOUT); + ldm_queue_cmd(pCmd); +} + +static void hpt_scsi_io(PVBUS_EXT vbus_ext, union ccb *ccb) +{ + PVBUS vbus = (PVBUS)vbus_ext->vbus; + PVDEV vd; + PCOMMAND pCmd; + POS_CMDEXT ext; + HPT_U8 *cdb; + + if (ccb->ccb_h.flags & CAM_CDB_POINTER) + cdb = ccb->csio.cdb_io.cdb_ptr; + else + cdb = ccb->csio.cdb_io.cdb_bytes; + + KdPrint(("hpt_scsi_io: ccb %x id %d lun %d cdb %x-%x-%x", + ccb, + ccb->ccb_h.target_id, ccb->ccb_h.target_lun, + *(HPT_U32 *)&cdb[0], *(HPT_U32 *)&cdb[4], *(HPT_U32 *)&cdb[8] + )); + + /* ccb->ccb_h.path_id is not our bus id - don't check it */ + if (ccb->ccb_h.target_lun != 0 || + ccb->ccb_h.target_id >= osm_max_targets || + (ccb->ccb_h.flags & CAM_CDB_PHYS)) + { + ccb->ccb_h.status = CAM_TID_INVALID; + xpt_done(ccb); + return; + } + + vd = ldm_find_target(vbus, ccb->ccb_h.target_id); + + if (!vd) { + ccb->ccb_h.status = CAM_TID_INVALID; + xpt_done(ccb); + return; + } + + switch (cdb[0]) { + case TEST_UNIT_READY: + case START_STOP_UNIT: + case SYNCHRONIZE_CACHE: + ccb->ccb_h.status = CAM_REQ_CMP; + break; + + case INQUIRY: + { + PINQUIRYDATA inquiryData; + memset(ccb->csio.data_ptr, 0, ccb->csio.dxfer_len); + inquiryData = (PINQUIRYDATA)ccb->csio.data_ptr; + + inquiryData->AdditionalLength = 31; + inquiryData->CommandQueue = 1; + memcpy(&inquiryData->VendorId, "HPT ", 8); + memcpy(&inquiryData->ProductId, "DISK 0_0 ", 16); + + if (vd->target_id / 10) { + inquiryData->ProductId[7] = (vd->target_id % 100) / 10 + '0'; + inquiryData->ProductId[8] = (vd->target_id % 100) % 10 + '0'; + } + else + inquiryData->ProductId[7] = (vd->target_id % 100) % 10 + '0'; + + memcpy(&inquiryData->ProductRevisionLevel, "4.00", 4); + + ccb->ccb_h.status = CAM_REQ_CMP; + } + break; + + case READ_CAPACITY: + { + HPT_U8 *rbuf = ccb->csio.data_ptr; + HPT_U32 cap; + + if (vd->capacity>0xfffffffful) + cap = 0xfffffffful; + else + cap = vd->capacity - 1; + + rbuf[0] = (HPT_U8)(cap>>24); + rbuf[1] = (HPT_U8)(cap>>16); + rbuf[2] = (HPT_U8)(cap>>8); + rbuf[3] = (HPT_U8)cap; + rbuf[4] = 0; + rbuf[5] = 0; + rbuf[6] = 2; + rbuf[7] = 0; + + ccb->ccb_h.status = CAM_REQ_CMP; + break; + } + + case SERVICE_ACTION_IN: + { + HPT_U8 *rbuf = ccb->csio.data_ptr; + HPT_U64 cap = vd->capacity - 1; + + rbuf[0] = (HPT_U8)(cap>>56); + rbuf[1] = (HPT_U8)(cap>>48); + rbuf[2] = (HPT_U8)(cap>>40); + rbuf[3] = (HPT_U8)(cap>>32); + rbuf[4] = (HPT_U8)(cap>>24); + rbuf[5] = (HPT_U8)(cap>>16); + rbuf[6] = (HPT_U8)(cap>>8); + rbuf[7] = (HPT_U8)cap; + rbuf[8] = 0; + rbuf[9] = 0; + rbuf[10] = 2; + rbuf[11] = 0; + + ccb->ccb_h.status = CAM_REQ_CMP; + break; + } + + case READ_6: + case READ_10: + case READ_16: + case WRITE_6: + case WRITE_10: + case WRITE_16: + case 0x13: + case 0x2f: + { + pCmd = ldm_alloc_cmds(vbus, vd->cmds_per_request); + if(!pCmd){ + KdPrint(("Failed to allocate command!")); + ccb->ccb_h.status = CAM_BUSY; + break; + } + + switch (cdb[0]) { + case READ_6: + case WRITE_6: + case 0x13: + pCmd->uCmd.Ide.Lba = ((HPT_U32)cdb[1] << 16) | ((HPT_U32)cdb[2] << 8) | (HPT_U32)cdb[3]; + pCmd->uCmd.Ide.nSectors = (HPT_U16) cdb[4]; + break; + case READ_16: + case WRITE_16: + { + HPT_U64 block = + ((HPT_U64)cdb[2]<<56) | + ((HPT_U64)cdb[3]<<48) | + ((HPT_U64)cdb[4]<<40) | + ((HPT_U64)cdb[5]<<32) | + ((HPT_U64)cdb[6]<<24) | + ((HPT_U64)cdb[7]<<16) | + ((HPT_U64)cdb[8]<<8) | + ((HPT_U64)cdb[9]); + pCmd->uCmd.Ide.Lba = block; + pCmd->uCmd.Ide.nSectors = (HPT_U16)cdb[13] | ((HPT_U16)cdb[12]<<8); + break; + } + + default: + pCmd->uCmd.Ide.Lba = (HPT_U32)cdb[5] | ((HPT_U32)cdb[4] << 8) | ((HPT_U32)cdb[3] << 16) | ((HPT_U32)cdb[2] << 24); + pCmd->uCmd.Ide.nSectors = (HPT_U16) cdb[8] | ((HPT_U16)cdb[7]<<8); + break; + } + + switch (cdb[0]) { + case READ_6: + case READ_10: + case READ_16: + pCmd->flags.data_in = 1; + break; + case WRITE_6: + case WRITE_10: + case WRITE_16: + pCmd->flags.data_out = 1; + break; + } + pCmd->priv = ext = cmdext_get(vbus_ext); + HPT_ASSERT(ext); + ext->ccb = ccb; + pCmd->target = vd; + pCmd->done = os_cmddone; + pCmd->buildsgl = os_buildsgl; + + pCmd->psg = ext->psg; + + if (ccb->ccb_h.flags & CAM_SCATTER_VALID) { + int idx; + bus_dma_segment_t *sgList = (bus_dma_segment_t *)ccb->csio.data_ptr; + + if (ccb->ccb_h.flags & CAM_SG_LIST_PHYS) + pCmd->flags.physical_sg = 1; + + for (idx = 0; idx < ccb->csio.sglist_cnt; idx++) { + pCmd->psg[idx].addr.bus = sgList[idx].ds_addr; + pCmd->psg[idx].size = sgList[idx].ds_len; + pCmd->psg[idx].eot = (idx==ccb->csio.sglist_cnt-1)? 1 : 0; + } + + ccb->ccb_h.timeout_ch = timeout(hpt_timeout, pCmd, HPT_OSM_TIMEOUT); + ldm_queue_cmd(pCmd); + } + else { + int error; + pCmd->flags.physical_sg = 1; + error = bus_dmamap_load(vbus_ext->io_dmat, + ext->dma_map, + ccb->csio.data_ptr, ccb->csio.dxfer_len, + hpt_io_dmamap_callback, pCmd, + BUS_DMA_WAITOK + ); + KdPrint(("bus_dmamap_load return %d", error)); + if (error && error!=EINPROGRESS) { + os_printk("bus_dmamap_load error %d", error); + cmdext_put(ext); + ldm_free_cmds(pCmd); + ccb->ccb_h.status = CAM_REQ_CMP_ERR; + xpt_done(ccb); + } + } + return; + } + + default: + ccb->ccb_h.status = CAM_REQ_INVALID; + break; + } + + xpt_done(ccb); + return; +} + +static void hpt_action(struct cam_sim *sim, union ccb *ccb) +{ + PVBUS_EXT vbus_ext = (PVBUS_EXT)cam_sim_softc(sim); + + KdPrint(("hpt_action(fn=%d, id=%d)", ccb->ccb_h.func_code, ccb->ccb_h.target_id)); + + switch (ccb->ccb_h.func_code) { + + case XPT_SCSI_IO: + hpt_lock_vbus(vbus_ext); + hpt_scsi_io(vbus_ext, ccb); + hpt_unlock_vbus(vbus_ext); + return; + + case XPT_RESET_BUS: + hpt_lock_vbus(vbus_ext); + ldm_reset_vbus((PVBUS)vbus_ext->vbus); + hpt_unlock_vbus(vbus_ext); + break; + + case XPT_GET_TRAN_SETTINGS: + case XPT_SET_TRAN_SETTINGS: + ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; + break; + + case XPT_CALC_GEOMETRY: + ccb->ccg.heads = 255; + ccb->ccg.secs_per_track = 63; + ccb->ccg.cylinders = ccb->ccg.volume_size / (ccb->ccg.heads * ccb->ccg.secs_per_track); + ccb->ccb_h.status = CAM_REQ_CMP; + break; + + case XPT_PATH_INQ: + { + struct ccb_pathinq *cpi = &ccb->cpi; + + cpi->version_num = 1; + cpi->hba_inquiry = PI_SDTR_ABLE; + cpi->target_sprt = 0; + cpi->hba_misc = PIM_NOBUSRESET; + cpi->hba_eng_cnt = 0; + cpi->max_target = osm_max_targets; + cpi->max_lun = 0; + cpi->unit_number = cam_sim_unit(sim); + cpi->bus_id = cam_sim_bus(sim); + cpi->initiator_id = osm_max_targets; + cpi->base_transfer_speed = 3300; + + strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); + strncpy(cpi->hba_vid, "HPT ", HBA_IDLEN); + strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); + cpi->ccb_h.status = CAM_REQ_CMP; + break; + } + + default: + ccb->ccb_h.status = CAM_REQ_INVALID; + break; + } + + xpt_done(ccb); + return; +} + +static void hpt_pci_intr(void *arg) +{ + PVBUS_EXT vbus_ext = (PVBUS_EXT)arg; + hpt_lock_vbus(vbus_ext); + ldm_intr((PVBUS)vbus_ext->vbus); + hpt_unlock_vbus(vbus_ext); +} + +static void hpt_poll(struct cam_sim *sim) +{ + hpt_pci_intr(cam_sim_softc(sim)); +} + +static void hpt_async(void * callback_arg, u_int32_t code, struct cam_path * path, void * arg) +{ + KdPrint(("hpt_async")); +} + +static int hpt_shutdown(device_t dev) +{ + KdPrint(("hpt_shutdown(dev=%p)", dev)); + return 0; +} + +static int hpt_detach(device_t dev) +{ + /* we don't allow the driver to be unloaded. */ + return EBUSY; +} + +static void hpt_ioctl_done(struct _IOCTL_ARG *arg) +{ + arg->ioctl_cmnd = 0; + wakeup(arg); +} + +static void __hpt_do_ioctl(PVBUS_EXT vbus_ext, IOCTL_ARG *ioctl_args) +{ + ioctl_args->result = -1; + ioctl_args->done = hpt_ioctl_done; + ioctl_args->ioctl_cmnd = (void *)1; + + hpt_lock_vbus(vbus_ext); + ldm_ioctl((PVBUS)vbus_ext->vbus, ioctl_args); + + while (ioctl_args->ioctl_cmnd) { + if (hpt_sleep(vbus_ext, ioctl_args, PPAUSE, "hptctl", HPT_OSM_TIMEOUT)==0) + break; + ldm_reset_vbus((PVBUS)vbus_ext->vbus); + __hpt_do_tasks(vbus_ext); + } + + /* KdPrint(("ioctl %x result %d", ioctl_args->dwIoControlCode, ioctl_args->result)); */ + + hpt_unlock_vbus(vbus_ext); +} + +static void hpt_do_ioctl(IOCTL_ARG *ioctl_args) +{ + PVBUS vbus; + PVBUS_EXT vbus_ext; + + ldm_for_each_vbus(vbus, vbus_ext) { + __hpt_do_ioctl(vbus_ext, ioctl_args); + if (ioctl_args->result!=HPT_IOCTL_RESULT_WRONG_VBUS) + return; + } +} + +#define HPT_DO_IOCTL(code, inbuf, insize, outbuf, outsize) ({\ + IOCTL_ARG arg;\ + arg.dwIoControlCode = code;\ + arg.lpInBuffer = inbuf;\ + arg.lpOutBuffer = outbuf;\ + arg.nInBufferSize = insize;\ + arg.nOutBufferSize = outsize;\ + arg.lpBytesReturned = 0;\ + hpt_do_ioctl(&arg);\ + arg.result;\ +}) + +#define DEVICEID_VALID(id) ((id) && ((HPT_U32)(id)!=0xffffffff)) + +static int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount) +{ + int i; + HPT_U32 count = nMaxCount-1; + + if (HPT_DO_IOCTL(HPT_IOCTL_GET_LOGICAL_DEVICES, + &count, sizeof(HPT_U32), pIds, sizeof(DEVICEID)*nMaxCount)) + return -1; + + nMaxCount = (int)pIds[0]; + for (i=0; i=503000 + .d_version = D_VERSION, +#endif +#if (__FreeBSD_version>=503000 && __FreeBSD_version<600034) + .d_flags = D_NEEDGIANT, +#endif +#if __FreeBSD_version<600034 +#if __FreeBSD_version>501000 + .d_maj = MAJOR_AUTO, +#else + .d_maj = HPT_DEV_MAJOR, +#endif +#endif +}; + +static struct intr_config_hook hpt_ich; + +/* + * hpt_final_init will be called after all hpt_attach. + */ +static void hpt_final_init(void *dummy) +{ + int i; + PVBUS_EXT vbus_ext; + PVBUS vbus; + PHBA hba; + +#ifdef SUPPORT_ALL +/* ldm_fix_him() */ +#endif + /* Clear the config hook */ + config_intrhook_disestablish(&hpt_ich); + + /* allocate memory */ + i = 0; + ldm_for_each_vbus(vbus, vbus_ext) { + if (hpt_alloc_mem(vbus_ext)) { + os_printk("out of memory"); + return; + } + i++; + } + + if (!i) { + os_printk("no controller detected."); + return; + } + + /* initializing hardware */ + ldm_for_each_vbus(vbus, vbus_ext) { + /* make timer available here */ + callout_handle_init(&vbus_ext->timer); + if (hpt_init_vbus(vbus_ext)) { + os_printk("fail to initialize hardware"); + break; /* FIXME */ + } + } + + /* register CAM interface */ + ldm_for_each_vbus(vbus, vbus_ext) { + struct cam_devq *devq; + struct ccb_setasync ccb; + +#if (__FreeBSD_version >= 500000) + mtx_init(&vbus_ext->lock, "hptsleeplock", NULL, MTX_DEF); +#endif + if (bus_dma_tag_create(NULL,/* parent */ + 4, /* alignment */ + BUS_SPACE_MAXADDR_32BIT+1, /* boundary */ + BUS_SPACE_MAXADDR, /* lowaddr */ + BUS_SPACE_MAXADDR, /* highaddr */ + NULL, NULL, /* filter, filterarg */ + PAGE_SIZE * (os_max_sg_descriptors-1), /* maxsize */ + os_max_sg_descriptors, /* nsegments */ + 0x10000, /* maxsegsize */ + BUS_DMA_WAITOK, /* flags */ +#if __FreeBSD_version>502000 + busdma_lock_mutex, /* lockfunc */ + &vbus_ext->lock, /* lockfuncarg */ +#endif + &vbus_ext->io_dmat /* tag */)) + { + return ; + } + + for (i=0; ivbus_ext = vbus_ext; + ext->next = vbus_ext->cmdext_list; + vbus_ext->cmdext_list = ext; + + if (bus_dmamap_create(vbus_ext->io_dmat, 0, &ext->dma_map)) { + os_printk("Can't create dma map(%d)", i); + return ; + } + } + + if ((devq = cam_simq_alloc(os_max_queue_comm)) == NULL) { + os_printk("cam_simq_alloc failed"); + return ; + } + +#if __FreeBSD_version > 700025 + vbus_ext->sim = cam_sim_alloc(hpt_action, hpt_poll, driver_name, + vbus_ext, 0, &Giant, os_max_queue_comm, /*tagged*/8, devq); +#else + vbus_ext->sim = cam_sim_alloc(hpt_action, hpt_poll, driver_name, + vbus_ext, 0, os_max_queue_comm, /*tagged*/8, devq); +#endif + + if (!vbus_ext->sim) { + os_printk("cam_sim_alloc failed"); + cam_simq_free(devq); + return ; + } + +#if __FreeBSD_version > 700044 + if (xpt_bus_register(vbus_ext->sim, NULL, 0) != CAM_SUCCESS) { +#else + if (xpt_bus_register(vbus_ext->sim, 0) != CAM_SUCCESS) { +#endif + os_printk("xpt_bus_register failed"); + cam_sim_free(vbus_ext->sim, /*free devq*/ TRUE); + vbus_ext->sim = NULL; + return ; + } + + if (xpt_create_path(&vbus_ext->path, /*periph */ NULL, + cam_sim_path(vbus_ext->sim), CAM_TARGET_WILDCARD, + CAM_LUN_WILDCARD) != CAM_REQ_CMP) + { + os_printk("xpt_create_path failed"); + xpt_bus_deregister(cam_sim_path(vbus_ext->sim)); + cam_sim_free(vbus_ext->sim, /*free_devq*/TRUE); + vbus_ext->sim = NULL; + return ; + } + + xpt_setup_ccb(&ccb.ccb_h, vbus_ext->path, /*priority*/5); + ccb.ccb_h.func_code = XPT_SASYNC_CB; + ccb.event_enable = AC_LOST_DEVICE; + ccb.callback = hpt_async; + ccb.callback_arg = vbus_ext; + xpt_action((union ccb *)&ccb); + + for (hba = vbus_ext->hba_list; hba; hba = hba->next) { + int rid = 0; + if ((hba->irq_res = bus_alloc_resource(hba->pcidev, + SYS_RES_IRQ, &rid, 0, ~0ul, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) + { + os_printk("can't allocate interrupt"); + return ; + } + + if (bus_setup_intr(hba->pcidev, hba->irq_res, INTR_TYPE_CAM, +#if __FreeBSD_version > 700025 + NULL, hpt_pci_intr, vbus_ext, &hba->irq_handle)) +#else + hpt_pci_intr, vbus_ext, &hba->irq_handle)) +#endif + { + os_printk("can't set up interrupt"); + return ; + } + hba->ldm_adapter.him->intr_control(hba->ldm_adapter.him_handle, HPT_TRUE); + } + + vbus_ext->shutdown_eh = EVENTHANDLER_REGISTER(shutdown_final, + hpt_shutdown_vbus, vbus_ext, SHUTDOWN_PRI_DEFAULT); + if (!vbus_ext->shutdown_eh) + os_printk("Shutdown event registration failed"); + } + + ldm_for_each_vbus(vbus, vbus_ext) { + TASK_INIT(&vbus_ext->worker, 0, (task_fn_t *)hpt_do_tasks, vbus_ext); + if (vbus_ext->tasks) + TASK_ENQUEUE(&vbus_ext->worker); + } + + make_dev(&hpt_cdevsw, DRIVER_MINOR, UID_ROOT, GID_OPERATOR, + S_IRUSR | S_IWUSR, driver_name); +} + +#if defined(KLD_MODULE) && (__FreeBSD_version >= 503000) + +typedef struct driverlink *driverlink_t; +struct driverlink { + kobj_class_t driver; + TAILQ_ENTRY(driverlink) link; /* list of drivers in devclass */ +}; + +typedef TAILQ_HEAD(driver_list, driverlink) driver_list_t; + +struct devclass { + TAILQ_ENTRY(devclass) link; + devclass_t parent; /* parent in devclass hierarchy */ + driver_list_t drivers; /* bus devclasses store drivers for bus */ + char *name; + device_t *devices; /* array of devices indexed by unit */ + int maxunit; /* size of devices array */ +}; + +static void override_kernel_driver(void) +{ + driverlink_t dl, dlfirst; + driver_t *tmpdriver; + devclass_t dc = devclass_find("pci"); + + if (dc){ + dlfirst = TAILQ_FIRST(&dc->drivers); + for (dl = dlfirst; dl; dl = TAILQ_NEXT(dl, link)) { + if(strcmp(dl->driver->name, driver_name) == 0) { + tmpdriver=dl->driver; + dl->driver=dlfirst->driver; + dlfirst->driver=tmpdriver; + break; + } + } + } +} + +#else +#define override_kernel_driver() +#endif + +static void hpt_init(void *dummy) +{ + os_printk("%s %s", driver_name_long, driver_ver); + + override_kernel_driver(); + init_config(); + + hpt_ich.ich_func = hpt_final_init; + hpt_ich.ich_arg = NULL; + if (config_intrhook_establish(&hpt_ich) != 0) { + printf("%s: cannot establish configuration hook\n", + driver_name_long); + } + +} +SYSINIT(hptinit, SI_SUB_CONFIGURE, SI_ORDER_FIRST, hpt_init, NULL); + +/* + * CAM driver interface + */ +static device_method_t driver_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, hpt_probe), + DEVMETHOD(device_attach, hpt_attach), + DEVMETHOD(device_detach, hpt_detach), + DEVMETHOD(device_shutdown, hpt_shutdown), + { 0, 0 } +}; + +static driver_t hpt_pci_driver = { + driver_name, + driver_methods, + sizeof(HBA) +}; + +static devclass_t hpt_devclass; + +#ifndef TARGETNAME +#error "no TARGETNAME found" +#endif + +/* use this to make TARGETNAME be expanded */ +#define __DRIVER_MODULE(p1, p2, p3, p4, p5, p6) DRIVER_MODULE(p1, p2, p3, p4, p5, p6) +#define __MODULE_VERSION(p1, p2) MODULE_VERSION(p1, p2) +#define __MODULE_DEPEND(p1, p2, p3, p4, p5) MODULE_DEPEND(p1, p2, p3, p4, p5) +__DRIVER_MODULE(TARGETNAME, pci, hpt_pci_driver, hpt_devclass, 0, 0); +__MODULE_VERSION(TARGETNAME, 1); +__MODULE_DEPEND(TARGETNAME, cam, 1, 1, 1); + +#if __FreeBSD_version>503000 +typedef struct cdev * ioctl_dev_t; +#else +typedef dev_t ioctl_dev_t; +#endif + +#if __FreeBSD_version >= 500000 +typedef struct thread * ioctl_thread_t; +#else +typedef struct proc * ioctl_thread_t; +#endif + +static int hpt_open(ioctl_dev_t dev, int flags, int devtype, ioctl_thread_t td) +{ + return 0; +} + +static int hpt_close(ioctl_dev_t dev, int flags, int devtype, ioctl_thread_t td) +{ + return 0; +} + +static int hpt_ioctl(ioctl_dev_t dev, u_long cmd, caddr_t data, int fflag, ioctl_thread_t td) +{ + PHPT_IOCTL_PARAM piop=(PHPT_IOCTL_PARAM)data; + IOCTL_ARG ioctl_args; + HPT_U32 bytesReturned; + + switch (cmd){ + case HPT_DO_IOCONTROL: + { + if (piop->Magic == HPT_IOCTL_MAGIC || piop->Magic == HPT_IOCTL_MAGIC32) { + KdPrint(("ioctl=%x in=%p len=%d out=%p len=%d\n", + piop->dwIoControlCode, + piop->lpInBuffer, + piop->nInBufferSize, + piop->lpOutBuffer, + piop->nOutBufferSize)); + + memset(&ioctl_args, 0, sizeof(ioctl_args)); + + ioctl_args.dwIoControlCode = piop->dwIoControlCode; + ioctl_args.nInBufferSize = piop->nInBufferSize; + ioctl_args.nOutBufferSize = piop->nOutBufferSize; + ioctl_args.lpBytesReturned = &bytesReturned; + + if (ioctl_args.nInBufferSize) { + ioctl_args.lpInBuffer = malloc(ioctl_args.nInBufferSize, M_DEVBUF, M_WAITOK); + if (!ioctl_args.lpInBuffer) + goto invalid; + if (copyin((void*)piop->lpInBuffer, + ioctl_args.lpInBuffer, piop->nInBufferSize)) + goto invalid; + } + + if (ioctl_args.nOutBufferSize) { + ioctl_args.lpOutBuffer = malloc(ioctl_args.nOutBufferSize, M_DEVBUF, M_WAITOK); + if (!ioctl_args.lpOutBuffer) + goto invalid; + } + +#if (__FreeBSD_version >= 500000) + mtx_lock(&Giant); +#endif + + hpt_do_ioctl(&ioctl_args); + +#if (__FreeBSD_version >= 500000) + mtx_unlock(&Giant); +#endif + + if (ioctl_args.result==HPT_IOCTL_RESULT_OK) { + if (piop->nOutBufferSize) { + if (copyout(ioctl_args.lpOutBuffer, + (void*)piop->lpOutBuffer, piop->nOutBufferSize)) + goto invalid; + } + if (piop->lpBytesReturned) { + if (copyout(&bytesReturned, + (void*)piop->lpBytesReturned, sizeof(HPT_U32))) + goto invalid; + } + if (ioctl_args.lpInBuffer) free(ioctl_args.lpInBuffer, M_DEVBUF); + if (ioctl_args.lpOutBuffer) free(ioctl_args.lpOutBuffer, M_DEVBUF); + return 0; + } +invalid: + if (ioctl_args.lpInBuffer) free(ioctl_args.lpInBuffer, M_DEVBUF); + if (ioctl_args.lpOutBuffer) free(ioctl_args.lpOutBuffer, M_DEVBUF); + return EFAULT; + } + return EFAULT; + } + + case HPT_SCAN_BUS: + { + return hpt_rescan_bus(); + } + default: + KdPrint(("invalid command!")); + return EFAULT; + } + +} + +static int hpt_rescan_bus(void) +{ + struct cam_path *path; + union ccb *ccb; + PVBUS vbus; + PVBUS_EXT vbus_ext; + +#if (__FreeBSD_version >= 500000) + mtx_lock(&Giant); +#endif + + ldm_for_each_vbus(vbus, vbus_ext) { + if (xpt_create_path(&path, xpt_periph, cam_sim_path(vbus_ext->sim), + CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) + return(EIO); + if ((ccb = malloc(sizeof(union ccb), M_TEMP, M_WAITOK)) == NULL) + return(ENOMEM); + bzero(ccb, sizeof(union ccb)); + xpt_setup_ccb(&ccb->ccb_h, path, 5); + ccb->ccb_h.func_code = XPT_SCAN_BUS; + ccb->ccb_h.cbfcnp = hpt_bus_scan_cb; + ccb->crcn.flags = CAM_FLAG_NONE; + xpt_action(ccb); + } + +#if (__FreeBSD_version >= 500000) + mtx_unlock(&Giant); +#endif + + return(0); +} + +static void hpt_bus_scan_cb(struct cam_periph *periph, union ccb *ccb) +{ + if (ccb->ccb_h.status != CAM_REQ_CMP) + KdPrint(("cam_scan_callback: failure status = %x",ccb->ccb_h.status)); + else + KdPrint(("Scan bus successfully!")); + + xpt_free_path(ccb->ccb_h.path); + free(ccb, M_TEMP); + return; +} diff --git a/sys/dev/hptrr/i386-elf.hptrr_lib.o.uu b/sys/dev/hptrr/i386-elf.hptrr_lib.o.uu new file mode 100644 index 000000000000..ced2f7b47e97 --- /dev/null +++ b/sys/dev/hptrr/i386-elf.hptrr_lib.o.uu @@ -0,0 +1,8495 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +begin 644 hptrr_lib.o +M?T5,1@$!`0D```````````$``P`!``````````````!4U`0``````#0````` +M`"@`#@`+`,.-=@"X`````,.)]L.-=@"+5"0$BTPD"+@`````.Q4\````?3*- +M%)+!X@)FBX(`````9HD!9HN"`@```&:)00**@@@```"(00B*@@D```"(00FX +M`0```,-55U93@^P0QD0D#P"]__\``*$\````B00DQD0D#@"+!"2)1"0$OP`` +M``"+1"0$B40D"(GVNP`````[7"0(?3*+="0(D(T$FXT,A0`````/MX$"```` +MP>`0#[>1``````G0.>AU!_^!#````)!#.?-\TT>)^#P'=KS^1"0.@'PD#A]V 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+1,507 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* + * $Id: ldm.h,v 1.59 2007/04/17 07:00:06 mah Exp $ + * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. + */ +#ifndef _HPT_LDM_H_ +#define _HPT_LDM_H_ + +#define VERMAGIC_LDM 57 + +#if defined(__cplusplus) +extern "C" { +#endif + + +#define __hpt_set_ver(x, v1, v2, v3, v4, v5) x ## _R_ ## v1 ## _ ## v2 ## _ ## v3 ## _ ## v4 ## _ ## v5 +#define _hpt_set_ver(x, v1, v2, v3, v4, v5) __hpt_set_ver(x, v1, v2, v3, v4, v5) +#define hpt_set_ver(x) _hpt_set_ver(x, VERMAGIC_OSM, VERMAGIC_HIM, VERMAGIC_LDM, VERMAGIC_ARRAY, MAX_MEMBERS) + +#define ldm_register_him hpt_set_ver(ldm_register_him) +#define ldm_register_vdev_class hpt_set_ver(ldm_register_vdev_class) +#define ldm_alloc_cmds hpt_set_ver(ldm_alloc_cmds) + + +#ifndef HPT_INTERFACE_VERSION +#define HPT_INTERFACE_VERSION 0x02000001 +#endif + +#define MAX_PARTITIONS_PER_DISK 4 +#if defined(__MAX_PARTITIONS_PER_DISK) && MAX_PARTITIONS_PER_DISK > __MAX_PARTITIONS_PER_DISK +#error "Please redefine MAX_PARTITIONS_PER_DISK!!!" +#endif + +#define MAX(a,b) (((a)>(b))?(a):(b)) +#define MIN(a,b) (((a)<(b))?(a):(b)) + + +struct freelist { + int dma; + HPT_UINT alignment; + HPT_UINT count; + HPT_UINT size; + void * head; + struct freelist *next; +#ifdef DBG + char *tag; + HPT_UINT reserved_count; + #define freelist_debug_tag(list, _tag) (list)->tag = _tag +#else + #define freelist_debug_tag(list, _tag) +#endif +}; + + +void freelist_reserve(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT count); + +void *freelist_get(struct freelist *); +void freelist_put(struct freelist *, void *p); + +void freelist_reserve_dma(struct freelist *list, void *osext, HPT_UINT size, HPT_UINT alignment, HPT_UINT count); +void *freelist_get_dma(struct freelist *, BUS_ADDRESS *busaddr); +void freelist_put_dma(struct freelist *, void *p, BUS_ADDRESS busaddr); + + +#define freelist_reserve_with_tag(list, osext, size, count) \ + do {\ + freelist_debug_tag(list, #list " at " __FILE__);\ + freelist_reserve(list, osext, size, count);\ + }while(0) + +#define freelist_reserve_dma_with_tag(list, osext, size, alignment, count) \ + do {\ + freelist_debug_tag(list, #list " at " __FILE__);\ + freelist_reserve_dma(list, osext, size, alignment, count);\ + }while(0) + +struct lock_request { + HPT_U64 start, end; + struct lock_request *next; + struct list_head waiters; /* blocked commands */ + struct tq_item callback; +}; + +#define INIT_LOCK_REQUEST(req, _start, _end, _cb, _arg) \ + do {\ + (req)->next = 0;\ + (req)->start = _start;\ + (req)->end = _end;\ + INIT_TQ_ITEM(&(req)->callback, _cb, _arg);\ + INIT_LIST_HEAD(&(req)->waiters);\ + } while (0) + +struct task_queue { + struct tq_item *head, *tail; +}; + +#define TQ_EMPTY(tq) ((tq)->head==0) + +struct dmapool_order { + HPT_UINT npages; + struct tq_item wakeup_fn; + struct dmapool_order *next; +}; + +struct dmapool_client { + void * handle; + HPT_UINT (*shrink)(void *handle, HPT_UINT npages); + void (*resume)(void *handle); + struct dmapool_client *next; +}; + +typedef struct _VBUS * PVBUS; +typedef struct _VDEV * PVDEV; + + +void dmapool_register_client(PVBUS vbus, struct dmapool_client *client); + + +void dmapool_active(PVBUS vbus); + +/* return 0 if the request is immediately satisfied, non-zero otherwise. */ +int dmapool_make_order(PVBUS vbus, struct dmapool_order *order); + + +void *dmapool_get_page(PVBUS vbus, BUS_ADDRESS *busaddr); +void *dmapool_get_page_at(PVBUS vbus, void *p, BUS_ADDRESS *busaddr); +void dmapool_put_page(PVBUS vbus, void *p, BUS_ADDRESS busaddr); +void dmapool_init(PVBUS vbus); +HPT_UINT dmapool_max_class_pages(PVBUS vbus); + + +struct timer_call { + HPT_U32 interval; /*microseconds*/ + HPT_TIME expire_time; /*microseconds*/ + void (*proc)(void * arg); + void * arg; + struct timer_call ** pprev; + struct timer_call * next; +}; + +#define ldm_init_timer(timer) do { (timer)->next=0; (timer)->pprev=0; } while (0) + +#define INIT_TIMER_CALL(timer, _interval, _proc, _arg) \ + do { \ + HPT_ASSERT((timer)->next==0 && (timer)->pprev==0);\ + (timer)->interval = _interval;\ + (timer)->proc = _proc;\ + (timer)->arg = _arg;\ + } while(0) + +void ldm_request_timer(PVBUS vbus, struct timer_call * tc); +void ldm_remove_timer(PVBUS vbus, struct timer_call * tc); +void ldm_on_timer(PVBUS vbus); + + +typedef struct _LDM_ADAPTER +{ + struct _LDM_ADAPTER *next; + HIM *him; + void *him_handle; + PVBUS vbus; + struct freelist freelist_dev; + struct freelist freelist_plugged_dpc; + HPT_BOOL master; +} +LDM_ADAPTER, *PLDM_ADAPTER; + +typedef struct _IOCTL_ARG +{ + struct list_head link; + PVBUS vbus; + HPT_U32 dwIoControlCode; + HPT_U32 nInBufferSize; + HPT_U32 nOutBufferSize; + void * lpInBuffer; + void * lpOutBuffer; + HPT_U32 *lpBytesReturned; + void * ioctl_cmnd; + void (* done)(struct _IOCTL_ARG *); + int result; /* HPT_IOCTL_RESULT_ */ + struct tq_item dpc; +} IOCTL_ARG; + +#define HPT_IOCTL_RESULT_OK 0 +#define HPT_IOCTL_RESULT_FAILED (-1) +#define HPT_IOCTL_RESULT_INVALID (-2) +#define HPT_IOCTL_RESULT_RETRY (-3) +#define HPT_IOCTL_RESULT_WRONG_VBUS (-4) + +void ldm_ioctl( PVBUS vbus, IOCTL_ARG *IAPnt); +HPT_U32 ldm_get_device_id(PVDEV vd); /* for ioctl */ +void ldm_set_rebuild_priority(PVBUS vbus, int priority); +void ldm_set_autorebuild(PVBUS vbus, int enable); + +#include + +typedef struct hpt_raw_disk +{ +#ifdef SUPPORT_ARRAY + PRAW_PARTITION raw_part_list; + HPT_RAW_LBA max_available_capacity; + HPT_RAW_LBA total_available_capacity; +#endif + HPT_RAW_LBA real_capacity; + HPT_RAW_LBA head_position; + + HPT_U16 max_sectors_per_cmd; + HPT_U8 user_select_mode; + + HPT_U8 uninitialized : 1; + HPT_U8 legacy_disk : 1; + HPT_U8 is_spare : 1; + HPT_U8 v3_format : 1; + HPT_U8 need_sync : 1; + HPT_U8 temp_spare : 1; + HPT_U8 need_check_array : 1; + HPT_U8 df_user_mode_set: 1; + + HPT_U8 df_read_ahead_set: 1; + HPT_U8 enable_read_ahead : 1; + HPT_U8 df_write_cache_set: 1; + HPT_U8 enable_write_cache : 1; + HPT_U8 df_tcq_set: 1; + HPT_U8 enable_tcq : 1; + HPT_U8 df_ncq_set: 1; + HPT_U8 enable_ncq : 1; + + HIM * him; + int index; + PLDM_ADAPTER adapter; + void * phy_dev; + PIDENTIFY_DATA2 identify_data; + char model[40]; + + struct tq_item reset_dpc; + int reset_pending; + + struct tq_item fail_dpc; + int fail_pending; +} +HPT_RAW_DISK, *PHPT_RAW_DISK; + +struct vdev_class +{ + struct vdev_class *next; + + HPT_U8 type; + HPT_U8 stripped; /* RAID0,3,5,6 */ + HPT_U8 redundancy; /* RAID1-1, RAID3/5-1, RAID6-2 */ + HPT_U8 must_init; /* RAID3,5,6 */ + + HPT_UINT vbus_ext_size; + HPT_UINT vbus_ext_offset; /* used by LDM */ + HPT_UINT dev_ext_size; + HPT_UINT cmd_ext_size; + + + void (*get_mem_info)(PVBUS vbus, void *osext, int phydev_count); + void (*queue_cmd)(PCOMMAND cmd); + void (*member_failed)(struct _VDEV * vd); + + + void (*initialize)(PVBUS vbus); + void (*release)(PVBUS vbus); + int (*add)(PVDEV vd); + void (*remove)(PVDEV vd); + void (*reset)(PVDEV vd); + void (*sync_stamp)(PVDEV vd); +}; + + +#define VDEV_CLASS_CONSTRUCTOR(type, prefix) { \ + 0, \ + type, \ + prefix ## _stripped, \ + prefix ## _redundancy, \ + prefix ## _must_init, \ + prefix ## _vbus_ext_size, \ + 0, \ + prefix ## _dev_ext_size, \ + prefix ## _cmd_ext_size, \ + prefix ## _get_mem_info, \ + prefix ## _queue_cmd, \ + prefix ## _member_failed, \ + prefix ## _initialize, \ + prefix ## _release, \ + prefix ## _add, \ + prefix ## _remove, \ + prefix ## _reset, \ + prefix ## _sync_stamp, \ +} + +#define VD_RAW 1 +#define VD_PARTITION 4 + +#define mIsArray(vdev_type) ((vdev_type)>VD_PARTITION) + +#define VD_RAID0 5 +#define VD_RAID1 6 +#define VD_JBOD 7 +#define VD_RAID5 8 +#define VD_RAID6 9 + +#define MAX_VD_TYPE_ID 9 + +struct vdev_class *ldm_find_vdev_class(HPT_U8 type); + +typedef struct _VDEV { + PVBUS vbus; + PVDEV parent; + void * ext; + HPT_U64 capacity; + int target_id; + HPT_UINT cmds_per_request; + + union { +#ifdef SUPPORT_ARRAY + HPT_ARRAY array; + HPT_PARTITION partition; +#endif + HPT_RAW_DISK raw; + } u; + + HPT_U8 vf_online : 1; + HPT_U8 vf_bootmark : 1; + HPT_U8 vf_bootable : 1; + HPT_U8 vf_resetting: 1; + HPT_U8 vf_quiesced: 1; + + HPT_U8 cache_policy; /* see CACHE_POLICY_* */ + + HPT_UINT cq_len; + HPT_UINT cmds_sent; + HPT_UINT max_queue_depth; + + struct list_head link; + struct vdev_class *Class; + + struct list_head cq_wait_send; + struct list_head cq_sent; + + int cq_priority; + struct list_head cq_wait_lock; + struct lock_request *locks_granted; + struct lock_request *locks_wait; + HPT_U32 ioctl_id; + void * cc_ext; +} +VDEV; + +#define CACHE_POLICY_NONE 0 +#define CACHE_POLICY_WRITE_THROUGH 1 +#define CACHE_POLICY_WRITE_BACK 2 + + +extern HIM *him_list; + + +void ldm_register_him(PHIM him); + + +void ldm_register_vdev_class(struct vdev_class *Class); + + +HPT_BOOL ldm_register_adapter(PLDM_ADAPTER adapter); + + +int init_config(void); + +HPT_UINT ldm_get_vbus_size(void); + + +void ldm_create_vbus(PVBUS vbus, void *osext); + + +void ldm_get_mem_info(PVBUS vbus, void *osext); + + +void *ldm_get_vbus_ext(PVBUS vbus, struct vdev_class *Class); + + +PVBUS ldm_get_next_vbus(PVBUS vbus, void **posext); + +#define ldm_for_each_vbus(vbus, vbus_ext) \ + for (vbus = ldm_get_next_vbus(0, (void **)(void *)&vbus_ext); vbus; \ + vbus = ldm_get_next_vbus(vbus, (void **)(void *)&vbus_ext)) + + +void ldm_initialize_vbus_async(PVBUS vbus, PLDM_ADAPTER master_adapter, void (*done)(void *osext)); + +/* ldm_initialize_vbus is deprecated since it will hold the CPU too long. */ +#define ldm_initialize_vbus(vbus, adapter) ldm_initialize_vbus_async(vbus, adapter, 0) + + +void ldm_release_vbus(PVBUS vbus); + +PVDEV ldm_create_vdev(PVBUS vbus, HPT_U8 type); +void ldm_release_vdev(PVDEV vd); + +PVDEV ldm_find_target(PVBUS vbus, int id); +PVDEV ldm_find_stamp(PVBUS vbus, HPT_U32 stamp, int seq); + + +PCOMMAND ldm_alloc_cmds(PVBUS vbus, HPT_UINT cnt); +void ldm_free_cmds(PCOMMAND cmd); + +HPT_UINT ldm_get_cmd_size(void); +PCOMMAND ldm_alloc_cmds_from_list(PVBUS vbus, struct freelist *list, HPT_UINT cnt); +void ldm_free_cmds_to_list(struct freelist *list, PCOMMAND cmd); + + +PCOMMAND __ldm_alloc_cmd(struct freelist *list); + +#ifdef OS_SUPPORT_TASK +#define CMD_SET_PRIORITY(cmd, pri) cmd->priority = (pri) +#else +#define CMD_SET_PRIORITY(cmd, pri) +#endif + +#define CMD_GROUP_GET(grp, cmd) \ + do {\ + grp->grplist->count++;\ + cmd = __ldm_alloc_cmd(grp->grplist);\ + cmd->vbus = grp->vbus;\ + cmd->grplist = grp->grplist;\ + CMD_SET_PRIORITY(cmd, grp->priority);\ + } while(0) + +#define CMD_GROUP_PUT(grp, cmd) \ + do {\ + freelist_put(grp->grplist, cmd);\ + grp->grplist->count--;\ + } while (0) + + +void ldm_queue_cmd(PCOMMAND cmd); +void vdev_queue_cmd(PCOMMAND cmd); +void ldm_finish_cmd(PCOMMAND cmd); + + +int ldm_acquire_lock(PVDEV vd, struct lock_request *req); +void ldm_release_lock(PVDEV vd, struct lock_request *req); + +void ldm_queue_task(struct task_queue *tq, struct tq_item *t); +void ldm_queue_vbus_dpc(PVBUS vbus, struct tq_item *t); + +HPT_BOOL ldm_intr(PVBUS vbus); +void ldm_run(PVBUS vbus); +int ldm_idle(PVBUS vbus); + + +int ldm_reset_vbus(PVBUS vbus); + + +void ldm_suspend(PVBUS vbus); +void ldm_resume(PVBUS vbus); +void ldm_shutdown(PVBUS vbus);/*shutdown all the controllers*/ + + +#define HIM_EVENT_DEVICE_REMOVED 1 +#define HIM_EVENT_DEVICE_PLUGGED 2 +#define HIM_EVENT_DEVICE_ERROR 3 +#define HIM_EVENT_RESET_REQUIRED 4 +#define HIM_EVENT_QUIESCE_DEVICE 5 +#define HIM_EVENT_UNQUIESCE_DEVICE 6 +#define HIM_EVENT_CONFIG_CHANGED 7 + +void ldm_event_notify(HPT_U32 event, void *arg1, void *arg2); + +void log_sector_repair(PVDEV vd, int success, HPT_LBA lba, HPT_U16 nsectors); + +void ldm_register_device(PVDEV vd); +void ldm_unregister_device(PVDEV vd); + +PVBUS him_handle_to_vbus(void * him_handle); + +#if defined(__cplusplus) +} +#endif +#endif diff --git a/sys/dev/hptrr/list.h b/sys/dev/hptrr/list.h new file mode 100644 index 000000000000..9cfad53e2263 --- /dev/null +++ b/sys/dev/hptrr/list.h @@ -0,0 +1,132 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* + * $Id: list.h,v 1.6 2006/10/31 06:25:28 gmm Exp $ + * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. + */ +#ifndef _HPT_LIST_H_ +#define _HPT_LIST_H_ + +#ifndef _LINUX_LIST_H + +#ifndef HPT_INLINE +#define HPT_INLINE __inline +#endif + +struct list_head { + struct list_head *next, *prev; +}; + +#define INIT_LIST_HEAD(ptr) do { (ptr)->next = (ptr); (ptr)->prev = (ptr); } while (0) + +static HPT_INLINE void __list_add(struct list_head * _new, struct list_head * prev, struct list_head * next) +{ + next->prev = _new; + _new->next = next; + _new->prev = prev; + prev->next = _new; +} + +static HPT_INLINE void list_add(struct list_head *_new, struct list_head *head) +{ + __list_add(_new, head, head->next); +} + +static HPT_INLINE void list_add_tail(struct list_head *_new, struct list_head *head) +{ + __list_add(_new, head->prev, head); +} + +static HPT_INLINE void __list_del(struct list_head * prev, struct list_head * next) +{ + next->prev = prev; + prev->next = next; +} + +static HPT_INLINE void list_del(struct list_head *entry) +{ + __list_del(entry->prev, entry->next); +} + +static HPT_INLINE void list_del_init(struct list_head *entry) +{ + __list_del(entry->prev, entry->next); + INIT_LIST_HEAD(entry); +} + +static HPT_INLINE int list_empty(struct list_head *head) +{ + HPT_ASSERT(!(head->next==head && head->prev!=head)); + return head->next == head; +} + +static HPT_INLINE void __list_splice(struct list_head *list, + struct list_head *head) +{ + struct list_head *first = list->next; + struct list_head *last = list->prev; + struct list_head *at = head->next; + + first->prev = head; + head->next = first; + + last->next = at; + at->prev = last; +} + +static HPT_INLINE void list_splice(struct list_head *list, struct list_head *head) +{ + if (!list_empty(list)) + __list_splice(list, head); +} + +static HPT_INLINE void list_splice_init(struct list_head *list, struct list_head *head) +{ + if (!list_empty(list)) { + __list_splice(list, head); + INIT_LIST_HEAD(list); + } +} + +#define list_entry(ptr, type, member) \ + ((type *)((char *)(ptr)-(HPT_UPTR)(&((type *)0)->member))) + +#define list_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) + +#define list_for_each_safe(pos, n, head) \ + for (pos = (head)->next, n = pos->next; pos != (head); \ + pos = n, n = pos->next) + +#define get_first_item(attached, type, member) \ + ((type *)((char *)((attached)->next)-(HPT_UPTR)(&((type *)0)->member))) + +#endif + +#endif diff --git a/sys/dev/hptrr/os_bsd.h b/sys/dev/hptrr/os_bsd.h new file mode 100644 index 000000000000..2d99a2d7fa80 --- /dev/null +++ b/sys/dev/hptrr/os_bsd.h @@ -0,0 +1,260 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* $Id: os_bsd.h,v 1.18 2006/04/11 08:19:02 gmm Exp $ + * + * HighPoint RAID Driver for FreeBSD + * Copyright (C) 2005 HighPoint Technologies, Inc. All Rights Reserved. + */ + +#ifndef _OS_BSD_H +#define _OS_BSD_H + +#include +#include +#include +#if (__FreeBSD_version >= 500000) +#include +#include +#else +#include /*to support DELAY function under 4.x BSD versions*/ +#endif + +#include +#include +#include +#include +#include + +#if (__FreeBSD_version >= 500000) +#include +#include +#include +#endif + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include + +#if (__FreeBSD_version >= 500000) +#include +#include +#else +#include +#include +#endif + +#if (__FreeBSD_version <= 500043) +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#if (__FreeBSD_version < 500043) +#include +#endif + + +typedef struct _INQUIRYDATA { + u_char DeviceType : 5; + u_char DeviceTypeQualifier : 3; + u_char DeviceTypeModifier : 7; + u_char RemovableMedia : 1; + u_char Versions; + u_char ResponseDataFormat; + u_char AdditionalLength; + u_char Reserved[2]; + u_char SoftReset : 1; + u_char CommandQueue : 1; + u_char Reserved2 : 1; + u_char LinkedCommands : 1; + u_char Synchronous : 1; + u_char Wide16Bit : 1; + u_char Wide32Bit : 1; + u_char RelativeAddressing : 1; + u_char VendorId[8]; + u_char ProductId[16]; + u_char ProductRevisionLevel[4]; + u_char VendorSpecific[20]; + u_char Reserved3[40]; +} +__attribute__((packed)) +INQUIRYDATA, *PINQUIRYDATA; + +#endif + +/* private headers */ + +#include +#include +#include + +/* driver parameters */ +extern char driver_name[]; +extern char driver_name_long[]; +extern char driver_ver[]; +extern int osm_max_targets; + +/* + * adapter/vbus extensions: + * each physical controller has an adapter_ext, passed to him.create_adapter() + * each vbus has a vbus_ext passed to ldm_create_vbus(). + */ +#define EXT_TYPE_HBA 1 +#define EXT_TYPE_VBUS 2 + +typedef struct _hba { + int ext_type; + LDM_ADAPTER ldm_adapter; + device_t pcidev; + PCI_ADDRESS pciaddr; + struct _vbus_ext *vbus_ext; + struct _hba *next; + + struct { + struct resource *res; + int type; + int rid; + void *base; + } + pcibar[6]; + + struct resource *irq_res; + void *irq_handle; +} +HBA, *PHBA; + +typedef struct _os_cmdext { + struct _vbus_ext *vbus_ext; + struct _os_cmdext *next; + union ccb *ccb; + bus_dmamap_t dma_map; + SG psg[os_max_sg_descriptors]; +} +OS_CMDEXT, *POS_CMDEXT; + +typedef struct _vbus_ext { + int ext_type; + struct _vbus_ext *next; + PHBA hba_list; + struct freelist *freelist_head; + struct freelist *freelist_dma_head; + + struct cam_sim *sim; /* sim for this vbus */ + struct cam_path *path; /* peripheral, path, tgt, lun with this vbus */ +#if (__FreeBSD_version >= 500000) + struct mtx lock; /* general purpose lock */ +#else + int hpt_splx; +#endif + bus_dma_tag_t io_dmat; /* I/O buffer DMA tag */ + + POS_CMDEXT cmdext_list; + + OSM_TASK *tasks; + struct task worker; + + struct callout_handle timer; + + eventhandler_tag shutdown_eh; + + /* the LDM vbus instance continues */ + unsigned long vbus[0] __attribute__((aligned(sizeof(unsigned long)))); +} +VBUS_EXT, *PVBUS_EXT; + +#if __FreeBSD_version >= 500000 +#define hpt_lock_vbus(vbus_ext) mtx_lock(&(vbus_ext)->lock) +#define hpt_unlock_vbus(vbus_ext) mtx_unlock(&(vbus_ext)->lock) +#else +static __inline void hpt_lock_vbus(PVBUS_EXT vbus_ext) +{ + vbus_ext->hpt_splx = splcam(); +} +static __inline void hpt_unlock_vbus(PVBUS_EXT vbus_ext) +{ + splx(vbus_ext->hpt_splx); +} +#endif + + +#define HPT_OSM_TIMEOUT (20*hz) /* timeout value for OS commands */ + +#define HPT_DO_IOCONTROL _IOW('H', 0, HPT_IOCTL_PARAM) + +#define HPT_SCAN_BUS _IO('H', 1) + +#if __FreeBSD_version >= 501000 +#define TASK_ENQUEUE(task) taskqueue_enqueue(taskqueue_swi_giant,(task)); +#else +#define TASK_ENQUEUE(task) taskqueue_enqueue(taskqueue_swi,(task)); +#endif + +#if __FreeBSD_version >= 500000 +static __inline int hpt_sleep(PVBUS_EXT vbus_ext, void *ident, int priority, const char *wmesg, int timo) +{ + return msleep(ident, &vbus_ext->lock, priority, wmesg, timo); +} +#else +static __inline int hpt_sleep(PVBUS_EXT vbus_ext, void *ident, int priority, const char *wmesg, int timo) +{ + int retval = 0; + + asleep(ident, priority, wmesg, timo); + hpt_unlock_vbus(vbus_ext); + retval = await(priority, timo); + hpt_lock_vbus(vbus_ext); + + return retval; +} +#endif + +#if __FreeBSD_version < 501000 +#define READ_16 0x88 +#define WRITE_16 0x8a +#define SERVICE_ACTION_IN 0x9e +#endif + +#define HPT_DEV_MAJOR 200 diff --git a/sys/dev/hptrr/osm.h b/sys/dev/hptrr/osm.h new file mode 100644 index 000000000000..977cef991987 --- /dev/null +++ b/sys/dev/hptrr/osm.h @@ -0,0 +1,204 @@ +/* + * Copyright (c) HighPoint Technologies, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ +#include +/* + * $Id: osm.h,v 1.5 2005/08/18 05:17:43 gmm Exp $ + * Copyright (C) 2005 HighPoint Technologies, Inc. All rights reserved. + */ +#ifndef _HPT_OSM_H_ +#define _HPT_OSM_H_ + +#define VERMAGIC_OSM 5 + +#define os_max_queue_comm 32 +#define os_max_sg_descriptors 18 + + +#define DMAPOOL_PAGE_SIZE 0x1000 /* PAGE_SIZE (i386/x86_64) */ +#define os_max_cache_size 0x800000 /* 8MB */ +#define os_max_cache_pages (os_max_cache_size/DMAPOOL_PAGE_SIZE) + +/* data types */ +typedef unsigned int HPT_UINT, HPT_U32; +typedef unsigned long HPT_UPTR; +typedef unsigned short HPT_U16; +typedef unsigned char HPT_U8; +typedef unsigned long HPT_TIME; +typedef unsigned long long HPT_U64; + +#define CPU_TO_LE64(x) (x) +#define CPU_TO_LE32(x) (x) +#define CPU_TO_LE16(x) (x) +#define LE32_TO_CPU(x) (x) +#define LE16_TO_CPU(x) (x) +#define LE64_TO_CPU(x) (x) + +#define FAR +#define EXTERN_C + +typedef void * HPT_PTR; + +typedef HPT_U64 HPT_LBA; +typedef HPT_U32 HPT_RAW_LBA; +#define MAX_LBA_VALUE 0xffffffffffffffffull +#define MAX_RAW_LBA_VALUE 0xfffffffful +#define RAW_LBA(x) ((HPT_U32)(x)) +#define LO_LBA(x) ((HPT_U32)(x)) +#define HI_LBA(x) (sizeof(HPT_LBA)>4? (HPT_U32)((x)>>32) : 0) +#define LBA_FORMAT_STR "0x%llX" + +typedef HPT_U64 BUS_ADDRESS; +#define LO_BUSADDR(x) ((HPT_U32)(x)) +#define HI_BUSADDR(x) (sizeof(BUS_ADDRESS)>4? (x)>>32 : 0) + +typedef unsigned char HPT_BOOL; +#define HPT_TRUE 1 +#define HPT_FALSE 0 + +typedef struct _TIME_RECORD { + HPT_U32 seconds:6; /* 0 - 59 */ + HPT_U32 minutes:6; /* 0 - 59 */ + HPT_U32 month:4; /* 1 - 12 */ + HPT_U32 hours:6; /* 0 - 59 */ + HPT_U32 day:5; /* 1 - 31 */ + HPT_U32 year:5; /* 0=2000, 31=2031 */ +} TIME_RECORD; + +/* hardware access */ +HPT_U8 os_inb (void *port); +HPT_U16 os_inw (void *port); +HPT_U32 os_inl (void *port); +void os_outb (void *port, HPT_U8 value); +void os_outw (void *port, HPT_U16 value); +void os_outl (void *port, HPT_U32 value); +void os_insw (void *port, HPT_U16 *buffer, HPT_U32 count); +void os_outsw(void *port, HPT_U16 *buffer, HPT_U32 count); + +extern HPT_U32 __dummy_reg; /* to avoid the compiler warning */ + +#define os_readb(addr) (*(HPT_U8 *)&__dummy_reg = *(volatile HPT_U8 *)(addr)) +#define os_readw(addr) (*(HPT_U16 *)&__dummy_reg = *(volatile HPT_U16 *)(addr)) +#define os_readl(addr) (*(HPT_U32 *)&__dummy_reg = *(volatile HPT_U32 *)(addr)) + +#define os_writeb(addr, val) *(volatile HPT_U8 *)(addr) = (HPT_U8)(val) +#define os_writew(addr, val) *(volatile HPT_U16 *)(addr) = (HPT_U16)(val) +#define os_writel(addr, val) *(volatile HPT_U32 *)(addr) = (HPT_U32)(val) + +/* PCI configuration space for specified device*/ +HPT_U8 os_pci_readb (void *osext, HPT_U8 offset); +HPT_U16 os_pci_readw (void *osext, HPT_U8 offset); +HPT_U32 os_pci_readl (void *osext, HPT_U8 offset); +void os_pci_writeb(void *osext, HPT_U8 offset, HPT_U8 value); +void os_pci_writew(void *osext, HPT_U8 offset, HPT_U16 value); +void os_pci_writel(void *osext, HPT_U8 offset, HPT_U32 value); + +/* obsolute interface */ +#define MAX_PCI_BUS_NUMBER 0xff +#define MAX_PCI_DEVICE_NUMBER 32 +#define MAX_PCI_FUNC_NUMBER 8 +#define pcicfg_read_dword(bus, dev, fn, reg) 0xffff + + +void *os_map_pci_bar( + void *osext, + int index, + HPT_U32 offset, + HPT_U32 length +); + + +void os_unmap_pci_bar(void *osext, void *base); + +#define os_kmap_sgptr(psg) (psg->addr._logical) +#define os_kunmap_sgptr(ptr) +#define os_set_sgptr(psg, ptr) (psg)->addr._logical = (ptr) + +/* timer */ +void *os_add_timer(void *osext, HPT_U32 microseconds, void (*proc)(void *), void *arg); +void os_del_timer(void *handle); +void os_request_timer(void * osext, HPT_U32 interval); +HPT_TIME os_query_time(void); + +/* task */ +#define OS_SUPPORT_TASK + +typedef struct _OSM_TASK { + struct _OSM_TASK *next; + void (*func)(void *vbus, void *data); + void *data; +} +OSM_TASK; + +void os_schedule_task(void *osext, OSM_TASK *task); + +/* misc */ +HPT_U32 os_get_stamp(void); +void os_stallexec(HPT_U32 microseconds); + +#ifndef _SYS_LIBKERN_H_ +#define memcpy(dst, src, size) __builtin_memcpy((dst), (src), (size)) +#define memcmp(dst, src, size) __builtin_memcmp((dst), (src), (size)) +#define strcpy(dst, src) __builtin_strcpy((dst), (src)) +static __inline void * memset(void *dst, int c, unsigned long size) +{ + char *p; + for (p=(char*)dst; size; size--,p++) *p = c; + return dst; +} +#endif + +#define farMemoryCopy(a,b,c) memcpy((char *)(a), (char *)(b), (HPT_U32)c) + + +#define os_register_device(osext, target_id) +#define os_unregister_device(osext, target_id) +int os_query_remove_device(void *osext, int target_id); +int os_revalidate_device(void *osext, int target_id); + +HPT_U8 os_get_vbus_seq(void *osext); + +/* debug support */ +int os_printk(char *fmt, ...); + +#ifdef DBG +extern int hpt_dbg_level; +#define KdPrint(x) do { if (hpt_dbg_level) os_printk x; } while (0) +void __os_dbgbreak(const char *file, int line); +#define os_dbgbreak() __os_dbgbreak(__FILE__, __LINE__) +#define HPT_ASSERT(x) do { if (!(x)) os_dbgbreak(); } while (0) +void os_check_stack(const char *location, int size); +#define HPT_CHECK_STACK(size) os_check_stack(__FUNCTION__, (size)) +#else +#define KdPrint(x) +#define HPT_ASSERT(x) +#define HPT_CHECK_STACK(size) +#endif + +#define OsPrint(x) do { os_printk x; } while (0) + +#endif diff --git a/sys/modules/hptrr/Makefile b/sys/modules/hptrr/Makefile new file mode 100644 index 000000000000..038c5a45f464 --- /dev/null +++ b/sys/modules/hptrr/Makefile @@ -0,0 +1,14 @@ +# $Id: Makefile.def,v 1.18 2007/03/22 11:20:15 gmm Exp $ +# $FreeBSD$ + +HPTRR= ${.CURDIR}/../../dev/hptrr +.PATH: ${HPTRR} +KMOD = hptrr +SRCS = opt_scsi.h opt_cam.h bus_if.h device_if.h pci_if.h os_bsd.h +SRCS+= hptrr_os_bsd.c hptrr_osm_bsd.c hptrr_config.c +OBJS = hptrr_lib.o + +hptrr_lib.o: + uudecode -p < ${HPTRR}/$(MACHINE_ARCH)-elf.hptrr_lib.o.uu > hptrr_lib.o + +.include