Fix the register timings for AMD/VIA/nVidia chipsets.
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@ -442,7 +442,7 @@ ata_ali_setmode(struct ata_device *atadev, int mode)
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}
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/*
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* American Micro Devices (AMD) support function
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* American Micro Devices (AMD) support functions
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*/
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int
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ata_amd_ident(device_t dev)
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@ -2221,8 +2221,8 @@ ata_via_family_setmode(struct ata_device *atadev, int mode)
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{
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device_t parent = device_get_parent(atadev->channel->dev);
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struct ata_pci_controller *ctlr = device_get_softc(parent);
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u_int8_t timings[] = { 0xff, 0xff, 0xff, 0x55, 0x51, 0xff, 0x55, 0x51,
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0x51, 0x51, 0x51, 0x51, 0x51, 0x51 };
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u_int8_t timings[] = { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20,
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0x20, 0x20, 0x20, 0x20, 0x20, 0x20 };
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int modes[][7] = {
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{ 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */
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{ 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */
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