Fix the register timings for AMD/VIA/nVidia chipsets.

This commit is contained in:
Søren Schmidt 2003-12-18 17:36:41 +00:00
parent 417de5c6d2
commit 913bde73c9

View File

@ -442,7 +442,7 @@ ata_ali_setmode(struct ata_device *atadev, int mode)
}
/*
* American Micro Devices (AMD) support function
* American Micro Devices (AMD) support functions
*/
int
ata_amd_ident(device_t dev)
@ -2221,8 +2221,8 @@ ata_via_family_setmode(struct ata_device *atadev, int mode)
{
device_t parent = device_get_parent(atadev->channel->dev);
struct ata_pci_controller *ctlr = device_get_softc(parent);
u_int8_t timings[] = { 0xff, 0xff, 0xff, 0x55, 0x51, 0xff, 0x55, 0x51,
0x51, 0x51, 0x51, 0x51, 0x51, 0x51 };
u_int8_t timings[] = { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20,
0x20, 0x20, 0x20, 0x20, 0x20, 0x20 };
int modes[][7] = {
{ 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */
{ 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */