[rpi] Add fdt_pinctrl(4) support to Raspberry Pi GPIO driver
On Raspberry Pi platform GPIO controller also responsible for pins multiplexing. Pi code predates proper FDT support in FreeBSD so a lot of pinmux info is hardcoded. This patch: - Implements pinctl methods in bcm2835_gpio - Converts all devices with ad-hoc pinmux info to proper pin control mechanisms and adds pinmux info in FreeBSD's custom dts files. - Adds fdt_pinctrl option to RPI2 and RPI-B kernels - Adds SPI pinmux config to FreeBSD's customization of GNU DTS. Reviewed by: imp, manu Differential Revision: https://reviews.freebsd.org/D14104
This commit is contained in:
parent
1fa996add5
commit
91cc58af37
@ -100,7 +100,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include <arm/broadcom/bcm2835/bcm2835_bscreg.h>
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#include <arm/broadcom/bcm2835/bcm2835_bscvar.h>
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@ -298,9 +297,7 @@ static int
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bcm_bsc_attach(device_t dev)
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{
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struct bcm_bsc_softc *sc;
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unsigned long start;
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device_t gpio;
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int i, rid;
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int rid;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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@ -316,31 +313,6 @@ bcm_bsc_attach(device_t dev)
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sc->sc_bst = rman_get_bustag(sc->sc_mem_res);
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sc->sc_bsh = rman_get_bushandle(sc->sc_mem_res);
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/* Check the unit we are attaching by its base address. */
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start = rman_get_start(sc->sc_mem_res);
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for (i = 0; i < nitems(bcm_bsc_pins); i++) {
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if (bcm_bsc_pins[i].start == (start & BCM_BSC_BASE_MASK))
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break;
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}
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if (i == nitems(bcm_bsc_pins)) {
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device_printf(dev, "only bsc0 and bsc1 are supported\n");
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (ENXIO);
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}
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/*
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* Configure the GPIO pins to ALT0 function to enable BSC control
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* over the pins.
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*/
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gpio = devclass_get_device(devclass_find("gpio"), 0);
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if (!gpio) {
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device_printf(dev, "cannot find gpio0\n");
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->sc_mem_res);
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return (ENXIO);
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}
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bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].sda, BCM_GPIO_ALT0);
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bcm_gpio_set_alternate(gpio, bcm_bsc_pins[i].scl, BCM_GPIO_ALT0);
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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RF_ACTIVE | RF_SHAREABLE);
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@ -32,16 +32,6 @@
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#ifndef _BCM2835_BSCVAR_H
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#define _BCM2835_BSCVAR_H
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struct {
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uint32_t sda;
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uint32_t scl;
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unsigned long start;
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} bcm_bsc_pins[] = {
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{ 0, 1, 0x205000 }, /* BSC0 GPIO pins and base address. */
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{ 2, 3, 0x804000 } /* BSC1 GPIO pins and base address. */
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};
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#define BCM_BSC_BASE_MASK 0x00ffffff
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struct iic_msg;
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struct bcm_bsc_softc {
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@ -48,11 +48,10 @@ __FBSDID("$FreeBSD$");
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/fdt/fdt_pinctrl.h>
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#include <dev/gpio/gpiobusvar.h>
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#include <dev/ofw/ofw_bus.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include "gpio_if.h"
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#include "pic_if.h"
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@ -73,6 +72,19 @@ __FBSDID("$FreeBSD$");
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GPIO_INTR_LEVEL_HIGH | GPIO_INTR_EDGE_RISING | \
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GPIO_INTR_EDGE_FALLING | GPIO_INTR_EDGE_BOTH)
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#define BCM2835_FSEL_GPIO_IN 0
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#define BCM2835_FSEL_GPIO_OUT 1
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#define BCM2835_FSEL_ALT5 2
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#define BCM2835_FSEL_ALT4 3
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#define BCM2835_FSEL_ALT0 4
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#define BCM2835_FSEL_ALT1 5
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#define BCM2835_FSEL_ALT2 6
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#define BCM2835_FSEL_ALT3 7
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#define BCM2835_PUD_OFF 0
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#define BCM2835_PUD_DOWN 1
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#define BCM2835_PUD_UP 2
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static struct resource_spec bcm_gpio_res_spec[] = {
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{ SYS_RES_MEMORY, 0, RF_ACTIVE },
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{ SYS_RES_IRQ, 0, RF_ACTIVE }, /* bank 0 interrupt */
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@ -187,28 +199,28 @@ bcm_gpio_func_str(uint32_t nfunc, char *buf, int bufsize)
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{
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switch (nfunc) {
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case BCM_GPIO_INPUT:
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case BCM2835_FSEL_GPIO_IN:
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strncpy(buf, "input", bufsize);
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break;
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case BCM_GPIO_OUTPUT:
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case BCM2835_FSEL_GPIO_OUT:
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strncpy(buf, "output", bufsize);
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break;
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case BCM_GPIO_ALT0:
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case BCM2835_FSEL_ALT0:
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strncpy(buf, "alt0", bufsize);
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break;
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case BCM_GPIO_ALT1:
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case BCM2835_FSEL_ALT1:
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strncpy(buf, "alt1", bufsize);
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break;
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case BCM_GPIO_ALT2:
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case BCM2835_FSEL_ALT2:
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strncpy(buf, "alt2", bufsize);
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break;
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case BCM_GPIO_ALT3:
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case BCM2835_FSEL_ALT3:
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strncpy(buf, "alt3", bufsize);
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break;
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case BCM_GPIO_ALT4:
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case BCM2835_FSEL_ALT4:
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strncpy(buf, "alt4", bufsize);
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break;
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case BCM_GPIO_ALT5:
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case BCM2835_FSEL_ALT5:
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strncpy(buf, "alt5", bufsize);
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break;
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default:
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@ -221,21 +233,21 @@ bcm_gpio_str_func(char *func, uint32_t *nfunc)
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{
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if (strcasecmp(func, "input") == 0)
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*nfunc = BCM_GPIO_INPUT;
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*nfunc = BCM2835_FSEL_GPIO_IN;
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else if (strcasecmp(func, "output") == 0)
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*nfunc = BCM_GPIO_OUTPUT;
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*nfunc = BCM2835_FSEL_GPIO_OUT;
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else if (strcasecmp(func, "alt0") == 0)
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*nfunc = BCM_GPIO_ALT0;
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*nfunc = BCM2835_FSEL_ALT0;
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else if (strcasecmp(func, "alt1") == 0)
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*nfunc = BCM_GPIO_ALT1;
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*nfunc = BCM2835_FSEL_ALT1;
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else if (strcasecmp(func, "alt2") == 0)
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*nfunc = BCM_GPIO_ALT2;
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*nfunc = BCM2835_FSEL_ALT2;
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else if (strcasecmp(func, "alt3") == 0)
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*nfunc = BCM_GPIO_ALT3;
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*nfunc = BCM2835_FSEL_ALT3;
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else if (strcasecmp(func, "alt4") == 0)
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*nfunc = BCM_GPIO_ALT4;
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*nfunc = BCM2835_FSEL_ALT4;
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else if (strcasecmp(func, "alt5") == 0)
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*nfunc = BCM_GPIO_ALT5;
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*nfunc = BCM2835_FSEL_ALT5;
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else
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return (-1);
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@ -247,9 +259,9 @@ bcm_gpio_func_flag(uint32_t nfunc)
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{
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switch (nfunc) {
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case BCM_GPIO_INPUT:
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case BCM2835_FSEL_GPIO_IN:
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return (GPIO_PIN_INPUT);
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case BCM_GPIO_OUTPUT:
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case BCM2835_FSEL_GPIO_OUT:
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return (GPIO_PIN_OUTPUT);
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}
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return (0);
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@ -288,7 +300,7 @@ bcm_gpio_set_pud(struct bcm_gpio_softc *sc, uint32_t pin, uint32_t state)
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BCM_GPIO_WRITE(sc, BCM_GPIO_GPPUDCLK(bank), 0);
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}
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void
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static void
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bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc)
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{
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struct bcm_gpio_softc *sc;
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@ -297,10 +309,7 @@ bcm_gpio_set_alternate(device_t dev, uint32_t pin, uint32_t nfunc)
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sc = device_get_softc(dev);
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BCM_GPIO_LOCK(sc);
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/* Disable pull-up or pull-down on pin. */
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bcm_gpio_set_pud(sc, pin, BCM_GPIO_NONE);
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/* And now set the pin function. */
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/* Set the pin function. */
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bcm_gpio_set_function(sc, pin, nfunc);
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/* Update the pin flags. */
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@ -329,11 +338,11 @@ bcm_gpio_pin_configure(struct bcm_gpio_softc *sc, struct gpio_pin *pin,
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if (flags & GPIO_PIN_OUTPUT) {
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pin->gp_flags |= GPIO_PIN_OUTPUT;
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bcm_gpio_set_function(sc, pin->gp_pin,
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BCM_GPIO_OUTPUT);
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BCM2835_FSEL_GPIO_OUT);
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} else {
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pin->gp_flags |= GPIO_PIN_INPUT;
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bcm_gpio_set_function(sc, pin->gp_pin,
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BCM_GPIO_INPUT);
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BCM2835_FSEL_GPIO_IN);
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}
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}
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@ -793,6 +802,9 @@ bcm_gpio_attach(device_t dev)
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if (sc->sc_busdev == NULL)
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goto fail;
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fdt_pinctrl_register(dev, "brcm,pins");
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fdt_pinctrl_configure_tree(dev);
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return (0);
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fail:
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@ -1187,6 +1199,84 @@ bcm_gpio_get_node(device_t bus, device_t dev)
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return (ofw_bus_get_node(bus));
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}
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static int
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bcm_gpio_configure_pins(device_t dev, phandle_t cfgxref)
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{
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phandle_t cfgnode;
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int i, pintuples, pulltuples;
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uint32_t pin;
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uint32_t *pins;
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uint32_t *pulls;
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uint32_t function;
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static struct bcm_gpio_softc *sc;
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sc = device_get_softc(dev);
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cfgnode = OF_node_from_xref(cfgxref);
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pins = NULL;
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pintuples = OF_getencprop_alloc(cfgnode, "brcm,pins", sizeof(*pins),
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(void **)&pins);
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char name[32];
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OF_getprop(cfgnode, "name", &name, sizeof(name));
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if (pintuples < 0)
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return (ENOENT);
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if (pintuples == 0)
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return (0); /* Empty property is not an error. */
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if (OF_getencprop(cfgnode, "brcm,function", &function,
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sizeof(function)) <= 0) {
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OF_prop_free(pins);
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return (EINVAL);
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}
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pulls = NULL;
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pulltuples = OF_getencprop_alloc(cfgnode, "brcm,pull", sizeof(*pulls),
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(void **)&pulls);
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if ((pulls != NULL) && (pulltuples != pintuples)) {
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OF_prop_free(pins);
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OF_prop_free(pulls);
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return (EINVAL);
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}
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for (i = 0; i < pintuples; i++) {
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pin = pins[i];
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bcm_gpio_set_alternate(dev, pin, function);
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if (bootverbose)
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device_printf(dev, "set pin %d to func %d", pin, function);
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if (pulls) {
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if (bootverbose)
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printf(", pull %d", pulls[i]);
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switch (pulls[i]) {
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/* Convert to gpio(4) flags */
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case BCM2835_PUD_OFF:
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bcm_gpio_pin_setflags(dev, pin, 0);
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break;
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case BCM2835_PUD_UP:
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bcm_gpio_pin_setflags(dev, pin, GPIO_PIN_PULLUP);
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break;
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case BCM2835_PUD_DOWN:
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bcm_gpio_pin_setflags(dev, pin, GPIO_PIN_PULLDOWN);
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break;
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default:
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printf("%s: invalid pull value for pin %d: %d\n",
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name, pin, pulls[i]);
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}
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}
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if (bootverbose)
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printf("\n");
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}
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OF_prop_free(pins);
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if (pulls)
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OF_prop_free(pulls);
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return (0);
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}
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static device_method_t bcm_gpio_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, bcm_gpio_probe),
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@ -1217,6 +1307,9 @@ static device_method_t bcm_gpio_methods[] = {
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/* ofw_bus interface */
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DEVMETHOD(ofw_bus_get_node, bcm_gpio_get_node),
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/* fdt_pinctrl interface */
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DEVMETHOD(fdt_pinctrl_configure, bcm_gpio_configure_pins),
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DEVMETHOD_END
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};
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@ -1228,4 +1321,4 @@ static driver_t bcm_gpio_driver = {
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sizeof(struct bcm_gpio_softc),
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};
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DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0);
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EARLY_DRIVER_MODULE(bcm_gpio, simplebus, bcm_gpio_driver, bcm_gpio_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
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@ -1,46 +0,0 @@
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/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 Oleksandr Tymoshenko <gonzo@bluezbox.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _BCM2835_GPIO_H_
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#define _BCM2835_GPIO_H_
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enum bcm_gpio_fsel {
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BCM_GPIO_INPUT,
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BCM_GPIO_OUTPUT,
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BCM_GPIO_ALT5,
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BCM_GPIO_ALT4,
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BCM_GPIO_ALT0,
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BCM_GPIO_ALT1,
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BCM_GPIO_ALT2,
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BCM_GPIO_ALT3,
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};
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void bcm_gpio_set_alternate(device_t, uint32_t, uint32_t);
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#endif /* _BCM2835_GPIO_H_ */
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@ -452,4 +452,4 @@ static driver_t bcm_intc_driver = {
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static devclass_t bcm_intc_devclass;
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EARLY_DRIVER_MODULE(intc, simplebus, bcm_intc_driver, bcm_intc_devclass,
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_LATE);
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0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
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@ -46,7 +46,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include <arm/broadcom/bcm2835/bcm2835_clkman.h>
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static struct ofw_compat_data compat_data[] = {
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@ -93,7 +92,6 @@ static int
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bcm_pwm_reconf(struct bcm_pwm_softc *sc)
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{
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uint32_t u;
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device_t gpio;
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/* Disable PWM */
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W_CTL(sc, 0);
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@ -104,14 +102,6 @@ bcm_pwm_reconf(struct bcm_pwm_softc *sc)
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if (sc->mode == 0)
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return (0);
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/* Ask GPIO0 to set ALT0 for pin 12 */
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gpio = devclass_get_device(devclass_find("gpio"), 0);
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if (!gpio) {
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device_printf(sc->sc_dev, "cannot find gpio0\n");
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return (ENXIO);
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}
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bcm_gpio_set_alternate(gpio, 12, BCM_GPIO_ALT0);
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u = bcm2835_clkman_set_frequency(sc->clkman, BCM_PWM_CLKSRC, sc->freq);
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if (u == 0)
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return (EINVAL);
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@ -51,7 +51,6 @@ __FBSDID("$FreeBSD$");
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#include <dev/spibus/spi.h>
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#include <dev/spibus/spibusvar.h>
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#include <arm/broadcom/bcm2835/bcm2835_gpio.h>
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#include <arm/broadcom/bcm2835/bcm2835_spireg.h>
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#include <arm/broadcom/bcm2835/bcm2835_spivar.h>
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@ -250,8 +249,7 @@ static int
|
||||
bcm_spi_attach(device_t dev)
|
||||
{
|
||||
struct bcm_spi_softc *sc;
|
||||
device_t gpio;
|
||||
int i, rid;
|
||||
int rid;
|
||||
|
||||
if (device_get_unit(dev) != 0) {
|
||||
device_printf(dev, "only one SPI controller supported\n");
|
||||
@ -261,15 +259,6 @@ bcm_spi_attach(device_t dev)
|
||||
sc = device_get_softc(dev);
|
||||
sc->sc_dev = dev;
|
||||
|
||||
/* Configure the GPIO pins to ALT0 function to enable SPI the pins. */
|
||||
gpio = devclass_get_device(devclass_find("gpio"), 0);
|
||||
if (!gpio) {
|
||||
device_printf(dev, "cannot find gpio0\n");
|
||||
return (ENXIO);
|
||||
}
|
||||
for (i = 0; i < nitems(bcm_spi_pins); i++)
|
||||
bcm_gpio_set_alternate(gpio, bcm_spi_pins[i], BCM_GPIO_ALT0);
|
||||
|
||||
rid = 0;
|
||||
sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
|
||||
RF_ACTIVE);
|
||||
|
@ -32,18 +32,6 @@
|
||||
#ifndef _BCM2835_SPIVAR_H_
|
||||
#define _BCM2835_SPIVAR_H_
|
||||
|
||||
/*
|
||||
* Only the available pins are listed here.
|
||||
* i.e. CS2 isn't available.
|
||||
*/
|
||||
uint32_t bcm_spi_pins[] = {
|
||||
7, /* CS1 */
|
||||
8, /* CS0 */
|
||||
9, /* MISO */
|
||||
10, /* MOSI */
|
||||
11 /* SCLK */
|
||||
};
|
||||
|
||||
struct bcm_spi_softc {
|
||||
device_t sc_dev;
|
||||
struct mtx sc_mtx;
|
||||
|
@ -736,4 +736,4 @@ static driver_t bcm_lintc_driver = {
|
||||
static devclass_t bcm_lintc_devclass;
|
||||
|
||||
EARLY_DRIVER_MODULE(local_intc, simplebus, bcm_lintc_driver, bcm_lintc_devclass,
|
||||
0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
|
||||
0, 0, BUS_PASS_INTERRUPT);
|
||||
|
@ -90,6 +90,8 @@ device bcm2835_spi
|
||||
device vchiq
|
||||
device sound
|
||||
|
||||
device fdt_pinctrl
|
||||
|
||||
# Flattened Device Tree
|
||||
options FDT # Configure using FDT/DTB data
|
||||
# Note: DTB is normally loaded and modified by RPi boot loader, then
|
||||
|
@ -93,6 +93,8 @@ device bcm2835_spi
|
||||
device vchiq
|
||||
device sound
|
||||
|
||||
device fdt_pinctrl
|
||||
|
||||
# Flattened Device Tree
|
||||
options FDT # Configure using FDT/DTB data
|
||||
# Note: DTB is normally loaded and modified by RPi boot loader, then
|
||||
|
@ -53,6 +53,10 @@
|
||||
|
||||
spi@7e204000 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
||||
};
|
||||
|
||||
gpio@7e200000 {
|
||||
@ -67,6 +71,16 @@
|
||||
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
|
||||
<53>;
|
||||
};
|
||||
|
||||
spi0_pins: spi0_pins {
|
||||
brcm,pins = <9 10 11>;
|
||||
brcm,function = <4>; /* alt0 */
|
||||
};
|
||||
|
||||
spi0_cs_pins: spi0_cs_pins {
|
||||
brcm,pins = <8 7>;
|
||||
brcm,function = <1>; /* output */
|
||||
};
|
||||
}
|
||||
|
||||
vchiq {
|
||||
@ -89,4 +103,3 @@
|
||||
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -53,6 +53,8 @@
|
||||
|
||||
spi@7e204000 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
||||
};
|
||||
|
||||
gpio@7e200000 {
|
||||
@ -67,6 +69,16 @@
|
||||
broadcom,pins = <48>, <49>, <50>, <51>, <52>,
|
||||
<53>;
|
||||
};
|
||||
|
||||
spi0_pins: spi0_pins {
|
||||
brcm,pins = <9 10 11>;
|
||||
brcm,function = <4>; /* alt0 */
|
||||
};
|
||||
|
||||
spi0_cs_pins: spi0_cs_pins {
|
||||
brcm,pins = <8 7>;
|
||||
brcm,function = <1>; /* output */
|
||||
};
|
||||
}
|
||||
|
||||
vchiq {
|
||||
|
Loading…
Reference in New Issue
Block a user