Adjust Marvell Discovery (MV78xxx) support to recognize newest chip revisions,
handle Z0 revision (early silicon) explicitly due to its quirks. Obtained from: Marvell, Semihalf
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@ -91,7 +91,8 @@ cpu_extra_feat(void)
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uint32_t ef = 0;
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soc_id(&dev, &rev);
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if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100)
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if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100_Z0 ||
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dev == MV_DEV_MV78100)
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__asm __volatile("mrc p15, 1, %0, c15, c1, 0" : "=r" (ef));
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else if (dev == MV_DEV_88F5182 || dev == MV_DEV_88F5281)
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__asm __volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (ef));
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@ -166,6 +167,9 @@ soc_identify(void)
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else if (r == 2)
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rev = "A0";
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break;
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case MV_DEV_MV78100_Z0:
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dev = "Marvell MV78100 Z0";
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break;
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case MV_DEV_MV78100:
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dev = "Marvell MV78100";
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break;
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@ -199,15 +203,16 @@ soc_decode_win(void)
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decode_win_cpu_setup();
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decode_win_usb_setup();
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decode_win_eth_setup(MV_ETH0_BASE);
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if (dev == MV_DEV_MV78100)
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if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0)
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decode_win_eth_setup(MV_ETH1_BASE);
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if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100)
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if (dev == MV_DEV_88F6281 || dev == MV_DEV_MV78100 ||
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dev == MV_DEV_MV78100_Z0)
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decode_win_cesa_setup();
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decode_win_idma_setup();
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decode_win_xor_setup();
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if (dev == MV_DEV_MV78100) {
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if (dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) {
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decode_win_pcie_setup(MV_PCIE00_BASE);
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decode_win_pcie_setup(MV_PCIE01_BASE);
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decode_win_pcie_setup(MV_PCIE02_BASE);
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@ -360,7 +365,8 @@ win_cpu_can_remap(int i)
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if ((dev == MV_DEV_88F5182 && i < 2) ||
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(dev == MV_DEV_88F5281 && i < 4) ||
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(dev == MV_DEV_88F6281 && i < 4) ||
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(dev == MV_DEV_MV78100 && i < 8))
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(dev == MV_DEV_MV78100 && i < 8) ||
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(dev == MV_DEV_MV78100_Z0 && i < 8))
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return (1);
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return (0);
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@ -590,7 +596,7 @@ usb_max_ports(void)
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uint32_t dev, rev;
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soc_id(&dev, &rev);
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return (dev == MV_DEV_MV78100 ? 3 : 1);
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return ((dev == MV_DEV_MV78100 || dev == MV_DEV_MV78100_Z0) ? 3 : 1);
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}
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static void
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@ -1109,14 +1115,18 @@ win_xor_can_remap(int i)
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return (0);
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}
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static __inline int
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static int
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xor_max_eng(void)
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{
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uint32_t dev, rev;
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soc_id(&dev, &rev);
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return ((dev == MV_DEV_88F6281) ? 2 :
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(dev == MV_DEV_MV78100) ? 1 : 0);
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if (dev == MV_DEV_88F6281)
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return (2);
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else if ((dev == MV_DEV_MV78100) || (dev == MV_DEV_MV78100_Z0))
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return (1);
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else
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return (0);
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}
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static void
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@ -123,12 +123,13 @@ mv_gpio_attach(device_t dev)
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return (ENXIO);
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mv_gpio_softc = sc;
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/* Get board id and revision */
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/* Get chip id and revision */
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soc_id(&dev_id, &rev_id);
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if (dev_id == MV_DEV_88F5182 ||
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dev_id == MV_DEV_88F5281 ||
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dev_id == MV_DEV_MV78100) {
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dev_id == MV_DEV_MV78100 ||
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dev_id == MV_DEV_MV78100_Z0 ) {
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sc->pin_num = 32;
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sc->irq_num = 4;
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sc->use_high = 0;
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@ -139,7 +140,7 @@ mv_gpio_attach(device_t dev)
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sc->use_high = 1;
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} else {
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device_printf(dev, "unknown board id=0x%x\n", dev_id);
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device_printf(dev, "unknown chip id=0x%x\n", dev_id);
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return (ENXIO);
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}
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@ -98,10 +98,11 @@ mv_ic_attach(device_t dev)
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sc->ic_high_regs = 0;
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sc->ic_error_regs = 0;
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if (dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_MV78100)
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if (dev_id == MV_DEV_88F6281 || dev_id == MV_DEV_MV78100 ||
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dev_id == MV_DEV_MV78100_Z0)
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sc->ic_high_regs = 1;
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if (dev_id == MV_DEV_MV78100)
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if (dev_id == MV_DEV_MV78100 || dev_id == MV_DEV_MV78100_Z0)
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sc->ic_error_regs = 1;
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error = bus_alloc_resources(dev, mv_ic_spec, sc->ic_res);
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@ -459,8 +459,18 @@ pcib_mbus_probe(device_t self)
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id = "88F6281";
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break;
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case 0x6381:
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id = "MV78100 Z0";
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break;
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case 0x7810:
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id = "MV78100";
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break;
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case 0x7820:
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/*
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* According to documentation ID 0x7820 is assigned to MV78200.
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* However some MV78100 chips also use it.
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*/
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id = "MV78100/MV78200";
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break;
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default:
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device_printf(self, "unknown Marvell PCI bridge: %x\n", val);
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goto out;
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@ -471,11 +471,12 @@
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/*
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* Chip ID
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*/
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#define MV_DEV_88F5181 0x5181
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#define MV_DEV_88F5182 0x5182
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#define MV_DEV_88F5281 0x5281
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#define MV_DEV_88F6281 0x6281
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#define MV_DEV_MV78100 0x6381
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#define MV_DEV_88F5181 0x5181
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#define MV_DEV_88F5182 0x5182
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#define MV_DEV_88F5281 0x5281
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#define MV_DEV_88F6281 0x6281
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#define MV_DEV_MV78100_Z0 0x6381
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#define MV_DEV_MV78100 0x7810
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/*
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* Decode windows definitions and macros
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@ -239,7 +239,8 @@ mge_ver_params(struct mge_softc *sc)
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uint32_t d, r;
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soc_id(&d, &r);
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if (d == MV_DEV_88F6281 || d == MV_DEV_MV78100) {
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if (d == MV_DEV_88F6281 || d == MV_DEV_MV78100 ||
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d == MV_DEV_MV78100_Z0) {
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sc->mge_ver = 2;
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sc->mge_mtu = 0x4e8;
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sc->mge_tfut_ipg_max = 0xFFFF;
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