Fix N32/N64 register saving by ensuring that all registers resolve

to unique values.

There's some confusion about what the n32 assembler API really is
(since on page 9 of the spec they say that t0-t3 don't exist, then
turn around on page 22 and say that t4-t7 don't exist), and this
doesn't touch that.

NetBSD's version of this file follows the convention I used here, and
is likely to be correct.

This should fix gdb/ptrace.

sys/mips/include/regnum.h

@@ -42,9 +42,8 @@
 #ifndef _MACHINE_REGNUM_H_
 #define	_MACHINE_REGNUM_H_
 
-/* This must match the numbers
- * in pcb.h and is used by
- * swtch.S
+/*
+ * This must match the numbers in pcb.h and is used by swtch.S
  */
 #define PREG_S0	0
 #define PREG_S1	1
@@ -64,6 +63,7 @@
 /*
  * Location of the saved registers relative to ZERO.
  * This must match struct trapframe defined in frame.h exactly.
+ * This must also match regdef.h.
  */
 #define	ZERO	0
 #define	AST	1
@@ -73,6 +73,16 @@
 #define	A1	5
 #define	A2	6
 #define	A3	7
+#if defined(__mips_n32) || defined(__mips_n64)
+#define	A4	8
+#define	A5	9
+#define	A6	10
+#define	A7	11
+#define	T0	12
+#define	T1	13
+#define	T2	14
+#define	T3	15
+#else
 #define	T0	8
 #define	T1	9
 #define	T2	10
@@ -81,6 +91,7 @@
 #define	TA1	13
 #define	TA2	14
 #define	TA3	15
+#endif
 #define	S0	16
 #define	S1	17
 #define	S2	18
@@ -112,6 +123,23 @@
 #define	DUMMY	39	/* for 8 byte alignment */
 #define	NUMSAVEREGS 40
 
+/*
+ * Pseudo registers so we save a complete set of registers regardless of
+ * the ABI
+ */
+#if defined(__mips_n32) || defined(__mips_n64)
+#define	TA0	8
+#define	TA1	9
+#define	TA2	10
+#define	TA3	11
+#else
+#define	TA0	12
+#define	TA1	13
+#define	TA2	14
+#define	TA3	15
+#endif
+
+
 /*
  * Index of FP registers in 'struct frame', counting from the beginning
  * of the frame (i.e., including the general registers).