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Properly setup the TX FIFO threshold for AR5416 based chipsets,

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including the AR9285. This seems to fix some users's problems.

Submitted by:	Jorge Boncompte [DTI2] <jorge at dti2.net>
This commit is contained in:
Rui Paulo 2010-03-01 17:04:19 +00:00
parent eac073cde2
commit 9425e26b82
6 changed files with 22 additions and 5 deletions
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2
sys/dev/ath/ath_hal/ah_internal.h
View File

@ -281,6 +281,8 @@ struct ath_hal_private {
uint16_t ah_maxPowerLevel; /* calculated max tx power */
u_int ah_tpScale; /* tx power scale factor */
uint32_t ah_11nCompat; /* 11n compat controls */
uint8_t ah_txtrig_level; /* current Tx trigger level */
uint8_t ah_max_txtrig_level; /* max tx trigger level */
/*
* State for regulatory domain handling.

3
sys/dev/ath/ath_hal/ar5212/ar5212_attach.c
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@ -149,6 +149,9 @@ static const struct ath_hal_private ar5212hal = {{
.ah_getInterrupts = ar5212GetInterrupts,
.ah_setInterrupts = ar5212SetInterrupts },
.ah_txtrig_level = INIT_TX_FIFO_THRESHOLD,
.ah_max_txtrig_level = MAX_TX_FIFO_THRESHOLD,
.ah_getChannelEdges = ar5212GetChannelEdges,
.ah_getWirelessModes = ar5212GetWirelessModes,
.ah_eepromRead = ar5212EepromRead,

12
sys/dev/ath/ath_hal/ar5212/ar5212_xmit.c
View File

@ -48,16 +48,20 @@ ar5212UpdateTxTrigLevel(struct ath_hal *ah, HAL_BOOL bIncTrigLevel)
uint32_t txcfg, curLevel, newLevel;
HAL_INT omask;
if (AH_PRIVATE(ah)->ah_txtrig_level >=
AH_PRIVATE(ah)->ah_max_txtrig_level)
return AH_FALSE;
/*
* Disable interrupts while futzing with the fifo level.
*/
omask = ar5212SetInterrupts(ah, ahp->ah_maskReg &~ HAL_INT_GLOBAL);
omask = ah->ah_setInterrupts(ah, ahp->ah_maskReg &~ HAL_INT_GLOBAL);
txcfg = OS_REG_READ(ah, AR_TXCFG);
curLevel = MS(txcfg, AR_FTRIG);
newLevel = curLevel;
if (bIncTrigLevel) { /* increase the trigger level */
if (curLevel < MAX_TX_FIFO_THRESHOLD)
if (curLevel < AH_PRIVATE(ah)->ah_max_txtrig_level)
newLevel++;
} else if (curLevel > MIN_TX_FIFO_THRESHOLD)
newLevel--;
@ -66,8 +70,10 @@ ar5212UpdateTxTrigLevel(struct ath_hal *ah, HAL_BOOL bIncTrigLevel)
OS_REG_WRITE(ah, AR_TXCFG,
(txcfg &~ AR_FTRIG) | SM(newLevel, AR_FTRIG));
AH_PRIVATE(ah)->ah_txtrig_level = newLevel;
/* re-enable chip interrupts */
ar5212SetInterrupts(ah, omask);
ah->ah_setInterrupts(ah, omask);
return (newLevel != curLevel);
}

5
sys/dev/ath/ath_hal/ar5416/ar5416_reset.c
View File

@ -454,7 +454,10 @@ ar5416InitDMA(struct ath_hal *ah)
OS_REG_WRITE(ah, AR_RXCFG,
(OS_REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_DMASZ_MASK) | AR_RXCFG_DMASZ_128B);
/* XXX restore TX trigger level */
/* restore TX trigger level */
OS_REG_WRITE(ah, AR_TXCFG,
(OS_REG_READ(ah, AR_TXCFG) &~ AR_FTRIG) |
SM(AH_PRIVATE(ah)->ah_txtrig_level, AR_FTRIG));
/*
* Setup receive FIFO threshold to hold off TX activities

3
sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c
View File

@ -568,7 +568,8 @@ ar5416ProcTxDesc(struct ath_hal *ah,
/* handle tx trigger level changes internally */
if ((ts->ts_status & HAL_TXERR_FIFO) ||
(ts->ts_flags & (HAL_TX_DATA_UNDERRUN | HAL_TX_DELIM_UNDERRUN)))
(ts->ts_flags & HAL_TX_DATA_UNDERRUN) ||
(ts->ts_flags & HAL_TX_DELIM_UNDERRUN))
ar5212UpdateTxTrigLevel(ah, AH_TRUE);
return HAL_OK;

2
sys/dev/ath/ath_hal/ar5416/ar9285_attach.c
View File

@ -121,6 +121,8 @@ ar9285Attach(uint16_t devid, HAL_SOFTC sc,
AH5416(ah)->ah_writeIni = ar9285WriteIni;
AH5416(ah)->ah_rx_chainmask = AR9285_DEFAULT_RXCHAINMASK;
AH5416(ah)->ah_tx_chainmask = AR9285_DEFAULT_TXCHAINMASK;
AH_PRIVATE(ah)->ah_max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
/* reset chip */