- Move manipulation of td_intr_nesting_level out of assembly interrupt
vector stubs and into the C functions they call. - Move disabling and EOIing of interrupt sources out of PIC driver entry points and into intr_execute_handlers(). Intr_execute_handlers() only disables a source for an interrupt if it is a stray interrupt or has threaded handlers. Sources with fast handlers no longer disable (mask) the source while executing the handlers. - Move the setting of clkintr_pending into intr_execute_handlers() and set the variable for any interrupt source with a vector of 0. (Should only be true for IRQ 0.) This fixes clkintr_pending in the NO_MIXED_MODE case. - Implement lapic_eoi() and use it to implement ioapic_eoi_source(). - Rename atpic_sched_ithd() to atpic_handle_intr() since it is used to handle all atpic interrupts and not just threaded ones. Inspired by: peter's changes to amd64 in p4 (1) Requested by: bde (2)
This commit is contained in:
jhb
parent
c33bd8de41
commit
9428d57b9b
@ -82,9 +82,7 @@ IDTVEC(vec_name) ; \
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movl $KPSEL, %eax ; /* reload with per-CPU data segment */ \
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mov %ax, %fs ; \
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movl lapic, %edx ; /* pointer to local APIC */ \
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movl PCPU(CURTHREAD), %ebx ; \
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movl LA_ISR + 16 * (index)(%edx), %eax ; /* load ISR */ \
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incl TD_INTR_NESTING_LEVEL(%ebx) ; \
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bsrl %eax, %eax ; /* index of highset set bit in ISR */ \
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jz 2f ; \
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addl $(32 * index),%eax ; \
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@ -93,7 +91,6 @@ IDTVEC(vec_name) ; \
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pushl %eax ; /* pass the IRQ */ \
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call lapic_handle_intr ; \
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addl $4, %esp ; /* discard parameter */ \
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decl TD_INTR_NESTING_LEVEL(%ebx) ; \
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MEXITCOUNT ; \
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jmp doreti ; \
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2: movl $-1, %eax ; /* send a vector of -1 */ \
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@ -245,12 +242,9 @@ IDTVEC(hardclock)
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movl lapic, %edx
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movl $0, LA_EOI(%edx) /* End Of Interrupt to APIC */
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movl PCPU(CURTHREAD),%ebx
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incl TD_INTR_NESTING_LEVEL(%ebx)
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pushl $0 /* XXX convert trapframe to clockframe */
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call forwarded_hardclock
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addl $4, %esp /* XXX convert clockframe to trapframe */
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decl TD_INTR_NESTING_LEVEL(%ebx)
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MEXITCOUNT
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jmp doreti
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@ -273,12 +267,9 @@ IDTVEC(statclock)
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FAKE_MCOUNT(13*4(%esp))
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movl PCPU(CURTHREAD),%ebx
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incl TD_INTR_NESTING_LEVEL(%ebx)
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pushl $0 /* XXX convert trapframe to clockframe */
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call forwarded_statclock
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addl $4, %esp /* XXX convert clockframe to trapframe */
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decl TD_INTR_NESTING_LEVEL(%ebx)
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MEXITCOUNT
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jmp doreti
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@ -49,6 +49,7 @@
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#include <sys/proc.h>
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#include <sys/syslog.h>
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#include <sys/systm.h>
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#include <machine/clock.h>
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#include <machine/intr_machdep.h>
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#ifdef DDB
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#include <ddb/ddb.h>
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@ -152,10 +153,14 @@ intr_remove_handler(void *cookie)
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void
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intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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{
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struct thread *td;
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struct ithd *it;
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struct intrhand *ih;
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int error, vector;
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td = curthread;
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td->td_intr_nesting_level++;
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/*
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* We count software interrupts when we process them. The
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* code here follows previous practice, but there's an
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@ -165,18 +170,25 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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atomic_add_long(isrc->is_count, 1);
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atomic_add_int(&cnt.v_intr, 1);
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/*
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* Execute fast interrupt handlers directly.
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* To support clock handlers, if a handler registers
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* with a NULL argument, then we pass it a pointer to
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* a trapframe as its argument.
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*/
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it = isrc->is_ithread;
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ih = TAILQ_FIRST(&it->it_handlers);
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/*
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* XXX: We assume that IRQ 0 is only used for the ISA timer
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* device (clk).
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*/
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vector = isrc->is_pic->pic_vector(isrc);
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if (vector == 0)
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clkintr_pending = 1;
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critical_enter();
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if (ih == NULL)
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error = EINVAL;
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else if (ih->ih_flags & IH_FAST) {
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if (ih != NULL && ih->ih_flags & IH_FAST) {
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/*
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* Execute fast interrupt handlers directly.
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* To support clock handlers, if a handler registers
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* with a NULL argument, then we pass it a pointer to
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* a trapframe as its argument.
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*/
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TAILQ_FOREACH(ih, &it->it_handlers, ih_next) {
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MPASS(ih->ih_flags & IH_FAST);
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CTR3(KTR_INTR, "%s: executing handler %p(%p)",
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@ -188,13 +200,22 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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else
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ih->ih_handler(ih->ih_argument);
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}
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isrc->is_pic->pic_enable_source(isrc);
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isrc->is_pic->pic_eoi_source(isrc);
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error = 0;
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} else
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error = ithread_schedule(it, !cold);
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} else {
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/*
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* For stray and threaded interrupts, we mask and EOI the
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* source.
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*/
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isrc->is_pic->pic_disable_source(isrc);
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isrc->is_pic->pic_eoi_source(isrc);
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if (ih == NULL)
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error = EINVAL;
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else
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error = ithread_schedule(it, !cold);
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}
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critical_exit();
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if (error == EINVAL) {
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vector = isrc->is_pic->pic_vector(isrc);
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atomic_add_long(isrc->is_straycount, 1);
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if (*isrc->is_straycount < MAX_STRAY_LOG)
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log(LOG_ERR, "stray irq%d\n", vector);
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@ -203,6 +224,7 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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"too many stray irq %d's: not logging anymore\n",
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vector);
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}
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td->td_intr_nesting_level--;
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}
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void
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@ -201,8 +201,7 @@ static void
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ioapic_eoi_source(struct intsrc *isrc)
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{
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TODO;
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/* lapic_eoi(); */
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lapic_eoi();
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}
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/*
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@ -466,6 +466,13 @@ lapic_set_lvt_triggermode(u_int apic_id, u_int pin, u_char edgetrigger)
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return (0);
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}
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void
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lapic_eoi(void)
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{
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lapic->eoi = 0;
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}
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void
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lapic_handle_intr(struct intrframe frame)
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{
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@ -474,8 +481,6 @@ lapic_handle_intr(struct intrframe frame)
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if (frame.if_vec == -1)
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panic("Couldn't get vector from ISR!");
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isrc = intr_lookup_source(apic_idt_to_irq(frame.if_vec));
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isrc->is_pic->pic_disable_source(isrc);
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lapic->eoi = 0;
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intr_execute_handlers(isrc, &frame);
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}
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@ -1047,12 +1047,16 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
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void
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forwarded_statclock(struct clockframe frame)
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{
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struct thread *td;
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CTR0(KTR_SMP, "forwarded_statclock");
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td = curthread;
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td->td_intr_nesting_level++;
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if (profprocs != 0)
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profclock(&frame);
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if (pscnt == psdiv)
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statclock(&frame);
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td->td_intr_nesting_level--;
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}
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void
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@ -1080,9 +1084,13 @@ forward_statclock(void)
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void
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forwarded_hardclock(struct clockframe frame)
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{
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struct thread *td;
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CTR0(KTR_SMP, "forwarded_hardclock");
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td = curthread;
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td->td_intr_nesting_level++;
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hardclock_process(&frame);
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td->td_intr_nesting_level--;
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}
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void
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@ -147,6 +147,7 @@ void lapic_create(u_int apic_id, int boot_cpu);
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void lapic_disable(void);
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void lapic_dump(const char *str);
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void lapic_enable_intr(u_int vector);
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void lapic_eoi(void);
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int lapic_id(void);
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void lapic_init(uintptr_t addr);
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int lapic_intr_pending(u_int vector);
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@ -192,6 +192,10 @@ atpic_eoi_master(struct intsrc *isrc)
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#endif
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}
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/*
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* The data sheet says no auto-EOI on slave, but it sometimes works.
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* So, if AUTO_EOI_2 is enabled, we use it.
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*/
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static void
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atpic_eoi_slave(struct intsrc *isrc)
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{
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@ -327,7 +331,7 @@ atpic_init(void *dummy __unused)
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SYSINIT(atpic_init, SI_SUB_INTR, SI_ORDER_SECOND + 1, atpic_init, NULL)
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void
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atpic_sched_ithd(struct intrframe iframe)
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atpic_handle_intr(struct intrframe iframe)
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{
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struct intsrc *isrc;
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@ -52,50 +52,10 @@
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#include "assym.s"
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#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
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#define IRQ_BYTE(irq_num) ((irq_num) >> 3)
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#ifdef AUTO_EOI_1
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#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */
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#define OUTB_ICU1
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#else
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#define ENABLE_ICU1 \
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movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
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OUTB_ICU1 /* ... to clear in service bit */
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#define OUTB_ICU1 \
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outb %al,$IO_ICU1
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#endif
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#ifdef AUTO_EOI_2
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/*
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* The data sheet says no auto-EOI on slave, but it sometimes works.
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*/
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#define ENABLE_ICU1_AND_2 ENABLE_ICU1
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#else
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#define ENABLE_ICU1_AND_2 \
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movb $ICU_EOI,%al ; /* as above */ \
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outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
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OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */
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#endif
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/*
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* Macros for interrupt interrupt entry, call to handler, and exit.
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*
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* XXX Most of the parameters here are obsolete. Fix this when we're
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* done.
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* XXX we really shouldn't return via doreti if we just schedule the
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* interrupt handler and don't run anything. We could just do an
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* iret. FIXME.
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*/
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#define INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \
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#define INTR(irq_num, vec_name) \
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.text ; \
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SUPERALIGN_TEXT ; \
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IDTVEC(vec_name) ; \
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@ -110,43 +70,30 @@ IDTVEC(vec_name) ; \
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mov %ax,%es ; \
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mov $KPSEL,%ax ; \
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mov %ax,%fs ; \
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; \
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maybe_extra_ipending ; \
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movb imen + IRQ_BYTE(irq_num),%al ; \
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orb $IRQ_BIT(irq_num),%al ; \
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movb %al,imen + IRQ_BYTE(irq_num) ; \
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outb %al,$icu+ICU_IMR_OFFSET ; \
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enable_icus ; \
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; \
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movl PCPU(CURTHREAD),%ebx ; \
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incl TD_INTR_NESTING_LEVEL(%ebx) ; \
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; \
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FAKE_MCOUNT(13*4(%esp)) ; /* XXX late to avoid double count */ \
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pushl $irq_num; /* pass the IRQ */ \
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call atpic_sched_ithd ; \
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call atpic_handle_intr ; \
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addl $4, %esp ; /* discard the parameter */ \
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; \
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decl TD_INTR_NESTING_LEVEL(%ebx) ; \
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MEXITCOUNT ; \
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jmp doreti
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MCOUNT_LABEL(bintr)
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#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending)
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/* Threaded interrupts */
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INTR(0,atpic_intr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING)
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INTR(1,atpic_intr1, IO_ICU1, ENABLE_ICU1,)
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INTR(2,atpic_intr2, IO_ICU1, ENABLE_ICU1,)
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INTR(3,atpic_intr3, IO_ICU1, ENABLE_ICU1,)
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INTR(4,atpic_intr4, IO_ICU1, ENABLE_ICU1,)
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INTR(5,atpic_intr5, IO_ICU1, ENABLE_ICU1,)
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INTR(6,atpic_intr6, IO_ICU1, ENABLE_ICU1,)
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INTR(7,atpic_intr7, IO_ICU1, ENABLE_ICU1,)
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INTR(8,atpic_intr8, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(9,atpic_intr9, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(10,atpic_intr10, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(11,atpic_intr11, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(12,atpic_intr12, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(13,atpic_intr13, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(14,atpic_intr14, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(15,atpic_intr15, IO_ICU2, ENABLE_ICU1_AND_2,)
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INTR(0, atpic_intr0)
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INTR(1, atpic_intr1)
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INTR(2, atpic_intr2)
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INTR(3, atpic_intr3)
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INTR(4, atpic_intr4)
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INTR(5, atpic_intr5)
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INTR(6, atpic_intr6)
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INTR(7, atpic_intr7)
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INTR(8, atpic_intr8)
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INTR(9, atpic_intr9)
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INTR(10, atpic_intr10)
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INTR(11, atpic_intr11)
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INTR(12, atpic_intr12)
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INTR(13, atpic_intr13)
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INTR(14, atpic_intr14)
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INTR(15, atpic_intr15)
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MCOUNT_LABEL(eintr)
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@ -82,9 +82,7 @@ IDTVEC(vec_name) ; \
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movl $KPSEL, %eax ; /* reload with per-CPU data segment */ \
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mov %ax, %fs ; \
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movl lapic, %edx ; /* pointer to local APIC */ \
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movl PCPU(CURTHREAD), %ebx ; \
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movl LA_ISR + 16 * (index)(%edx), %eax ; /* load ISR */ \
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incl TD_INTR_NESTING_LEVEL(%ebx) ; \
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bsrl %eax, %eax ; /* index of highset set bit in ISR */ \
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jz 2f ; \
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addl $(32 * index),%eax ; \
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@ -93,7 +91,6 @@ IDTVEC(vec_name) ; \
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pushl %eax ; /* pass the IRQ */ \
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call lapic_handle_intr ; \
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addl $4, %esp ; /* discard parameter */ \
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decl TD_INTR_NESTING_LEVEL(%ebx) ; \
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MEXITCOUNT ; \
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jmp doreti ; \
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2: movl $-1, %eax ; /* send a vector of -1 */ \
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@ -245,12 +242,9 @@ IDTVEC(hardclock)
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movl lapic, %edx
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movl $0, LA_EOI(%edx) /* End Of Interrupt to APIC */
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movl PCPU(CURTHREAD),%ebx
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incl TD_INTR_NESTING_LEVEL(%ebx)
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pushl $0 /* XXX convert trapframe to clockframe */
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call forwarded_hardclock
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addl $4, %esp /* XXX convert clockframe to trapframe */
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decl TD_INTR_NESTING_LEVEL(%ebx)
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MEXITCOUNT
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jmp doreti
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@ -273,12 +267,9 @@ IDTVEC(statclock)
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FAKE_MCOUNT(13*4(%esp))
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movl PCPU(CURTHREAD),%ebx
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incl TD_INTR_NESTING_LEVEL(%ebx)
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pushl $0 /* XXX convert trapframe to clockframe */
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call forwarded_statclock
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addl $4, %esp /* XXX convert clockframe to trapframe */
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decl TD_INTR_NESTING_LEVEL(%ebx)
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MEXITCOUNT
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jmp doreti
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@ -49,6 +49,7 @@
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#include <sys/proc.h>
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#include <sys/syslog.h>
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#include <sys/systm.h>
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#include <machine/clock.h>
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#include <machine/intr_machdep.h>
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#ifdef DDB
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#include <ddb/ddb.h>
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@ -152,10 +153,14 @@ intr_remove_handler(void *cookie)
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void
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intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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{
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struct thread *td;
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struct ithd *it;
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struct intrhand *ih;
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int error, vector;
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td = curthread;
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td->td_intr_nesting_level++;
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/*
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* We count software interrupts when we process them. The
|
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* code here follows previous practice, but there's an
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@ -165,18 +170,25 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
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atomic_add_long(isrc->is_count, 1);
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atomic_add_int(&cnt.v_intr, 1);
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/*
|
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* Execute fast interrupt handlers directly.
|
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* To support clock handlers, if a handler registers
|
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* with a NULL argument, then we pass it a pointer to
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* a trapframe as its argument.
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*/
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it = isrc->is_ithread;
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ih = TAILQ_FIRST(&it->it_handlers);
|
||||
|
||||
/*
|
||||
* XXX: We assume that IRQ 0 is only used for the ISA timer
|
||||
* device (clk).
|
||||
*/
|
||||
vector = isrc->is_pic->pic_vector(isrc);
|
||||
if (vector == 0)
|
||||
clkintr_pending = 1;
|
||||
|
||||
critical_enter();
|
||||
if (ih == NULL)
|
||||
error = EINVAL;
|
||||
else if (ih->ih_flags & IH_FAST) {
|
||||
if (ih != NULL && ih->ih_flags & IH_FAST) {
|
||||
/*
|
||||
* Execute fast interrupt handlers directly.
|
||||
* To support clock handlers, if a handler registers
|
||||
* with a NULL argument, then we pass it a pointer to
|
||||
* a trapframe as its argument.
|
||||
*/
|
||||
TAILQ_FOREACH(ih, &it->it_handlers, ih_next) {
|
||||
MPASS(ih->ih_flags & IH_FAST);
|
||||
CTR3(KTR_INTR, "%s: executing handler %p(%p)",
|
||||
@ -188,13 +200,22 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
|
||||
else
|
||||
ih->ih_handler(ih->ih_argument);
|
||||
}
|
||||
isrc->is_pic->pic_enable_source(isrc);
|
||||
isrc->is_pic->pic_eoi_source(isrc);
|
||||
error = 0;
|
||||
} else
|
||||
error = ithread_schedule(it, !cold);
|
||||
} else {
|
||||
/*
|
||||
* For stray and threaded interrupts, we mask and EOI the
|
||||
* source.
|
||||
*/
|
||||
isrc->is_pic->pic_disable_source(isrc);
|
||||
isrc->is_pic->pic_eoi_source(isrc);
|
||||
if (ih == NULL)
|
||||
error = EINVAL;
|
||||
else
|
||||
error = ithread_schedule(it, !cold);
|
||||
}
|
||||
critical_exit();
|
||||
if (error == EINVAL) {
|
||||
vector = isrc->is_pic->pic_vector(isrc);
|
||||
atomic_add_long(isrc->is_straycount, 1);
|
||||
if (*isrc->is_straycount < MAX_STRAY_LOG)
|
||||
log(LOG_ERR, "stray irq%d\n", vector);
|
||||
@ -203,6 +224,7 @@ intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe)
|
||||
"too many stray irq %d's: not logging anymore\n",
|
||||
vector);
|
||||
}
|
||||
td->td_intr_nesting_level--;
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@ -201,8 +201,7 @@ static void
|
||||
ioapic_eoi_source(struct intsrc *isrc)
|
||||
{
|
||||
|
||||
TODO;
|
||||
/* lapic_eoi(); */
|
||||
lapic_eoi();
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@ -466,6 +466,13 @@ lapic_set_lvt_triggermode(u_int apic_id, u_int pin, u_char edgetrigger)
|
||||
return (0);
|
||||
}
|
||||
|
||||
void
|
||||
lapic_eoi(void)
|
||||
{
|
||||
|
||||
lapic->eoi = 0;
|
||||
}
|
||||
|
||||
void
|
||||
lapic_handle_intr(struct intrframe frame)
|
||||
{
|
||||
@ -474,8 +481,6 @@ lapic_handle_intr(struct intrframe frame)
|
||||
if (frame.if_vec == -1)
|
||||
panic("Couldn't get vector from ISR!");
|
||||
isrc = intr_lookup_source(apic_idt_to_irq(frame.if_vec));
|
||||
isrc->is_pic->pic_disable_source(isrc);
|
||||
lapic->eoi = 0;
|
||||
intr_execute_handlers(isrc, &frame);
|
||||
}
|
||||
|
||||
|
||||
@ -1047,12 +1047,16 @@ smp_masked_invlpg_range(u_int mask, vm_offset_t addr1, vm_offset_t addr2)
|
||||
void
|
||||
forwarded_statclock(struct clockframe frame)
|
||||
{
|
||||
struct thread *td;
|
||||
|
||||
CTR0(KTR_SMP, "forwarded_statclock");
|
||||
td = curthread;
|
||||
td->td_intr_nesting_level++;
|
||||
if (profprocs != 0)
|
||||
profclock(&frame);
|
||||
if (pscnt == psdiv)
|
||||
statclock(&frame);
|
||||
td->td_intr_nesting_level--;
|
||||
}
|
||||
|
||||
void
|
||||
@ -1080,9 +1084,13 @@ forward_statclock(void)
|
||||
void
|
||||
forwarded_hardclock(struct clockframe frame)
|
||||
{
|
||||
struct thread *td;
|
||||
|
||||
CTR0(KTR_SMP, "forwarded_hardclock");
|
||||
td = curthread;
|
||||
td->td_intr_nesting_level++;
|
||||
hardclock_process(&frame);
|
||||
td->td_intr_nesting_level--;
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@ -147,6 +147,7 @@ void lapic_create(u_int apic_id, int boot_cpu);
|
||||
void lapic_disable(void);
|
||||
void lapic_dump(const char *str);
|
||||
void lapic_enable_intr(u_int vector);
|
||||
void lapic_eoi(void);
|
||||
int lapic_id(void);
|
||||
void lapic_init(uintptr_t addr);
|
||||
int lapic_intr_pending(u_int vector);
|
||||
|
||||
@ -15,6 +15,7 @@
|
||||
* XXX large parts of the driver and its interface are misplaced.
|
||||
*/
|
||||
extern int adjkerntz;
|
||||
extern int clkintr_pending;
|
||||
extern int disable_rtc_set;
|
||||
extern int pscnt;
|
||||
extern int psdiv;
|
||||
|
||||
@ -192,6 +192,10 @@ atpic_eoi_master(struct intsrc *isrc)
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* The data sheet says no auto-EOI on slave, but it sometimes works.
|
||||
* So, if AUTO_EOI_2 is enabled, we use it.
|
||||
*/
|
||||
static void
|
||||
atpic_eoi_slave(struct intsrc *isrc)
|
||||
{
|
||||
@ -327,7 +331,7 @@ atpic_init(void *dummy __unused)
|
||||
SYSINIT(atpic_init, SI_SUB_INTR, SI_ORDER_SECOND + 1, atpic_init, NULL)
|
||||
|
||||
void
|
||||
atpic_sched_ithd(struct intrframe iframe)
|
||||
atpic_handle_intr(struct intrframe iframe)
|
||||
{
|
||||
struct intsrc *isrc;
|
||||
|
||||
|
||||
@ -52,50 +52,10 @@
|
||||
|
||||
#include "assym.s"
|
||||
|
||||
#define IRQ_BIT(irq_num) (1 << ((irq_num) % 8))
|
||||
#define IRQ_BYTE(irq_num) ((irq_num) >> 3)
|
||||
|
||||
#ifdef AUTO_EOI_1
|
||||
|
||||
#define ENABLE_ICU1 /* use auto-EOI to reduce i/o */
|
||||
#define OUTB_ICU1
|
||||
|
||||
#else
|
||||
|
||||
#define ENABLE_ICU1 \
|
||||
movb $ICU_EOI,%al ; /* as soon as possible send EOI ... */ \
|
||||
OUTB_ICU1 /* ... to clear in service bit */
|
||||
|
||||
#define OUTB_ICU1 \
|
||||
outb %al,$IO_ICU1
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef AUTO_EOI_2
|
||||
/*
|
||||
* The data sheet says no auto-EOI on slave, but it sometimes works.
|
||||
*/
|
||||
#define ENABLE_ICU1_AND_2 ENABLE_ICU1
|
||||
|
||||
#else
|
||||
|
||||
#define ENABLE_ICU1_AND_2 \
|
||||
movb $ICU_EOI,%al ; /* as above */ \
|
||||
outb %al,$IO_ICU2 ; /* but do second icu first ... */ \
|
||||
OUTB_ICU1 /* ... then first icu (if !AUTO_EOI_1) */
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Macros for interrupt interrupt entry, call to handler, and exit.
|
||||
*
|
||||
* XXX Most of the parameters here are obsolete. Fix this when we're
|
||||
* done.
|
||||
* XXX we really shouldn't return via doreti if we just schedule the
|
||||
* interrupt handler and don't run anything. We could just do an
|
||||
* iret. FIXME.
|
||||
*/
|
||||
#define INTR(irq_num, vec_name, icu, enable_icus, maybe_extra_ipending) \
|
||||
#define INTR(irq_num, vec_name) \
|
||||
.text ; \
|
||||
SUPERALIGN_TEXT ; \
|
||||
IDTVEC(vec_name) ; \
|
||||
@ -110,43 +70,30 @@ IDTVEC(vec_name) ; \
|
||||
mov %ax,%es ; \
|
||||
mov $KPSEL,%ax ; \
|
||||
mov %ax,%fs ; \
|
||||
; \
|
||||
maybe_extra_ipending ; \
|
||||
movb imen + IRQ_BYTE(irq_num),%al ; \
|
||||
orb $IRQ_BIT(irq_num),%al ; \
|
||||
movb %al,imen + IRQ_BYTE(irq_num) ; \
|
||||
outb %al,$icu+ICU_IMR_OFFSET ; \
|
||||
enable_icus ; \
|
||||
; \
|
||||
movl PCPU(CURTHREAD),%ebx ; \
|
||||
incl TD_INTR_NESTING_LEVEL(%ebx) ; \
|
||||
; \
|
||||
FAKE_MCOUNT(13*4(%esp)) ; /* XXX late to avoid double count */ \
|
||||
pushl $irq_num; /* pass the IRQ */ \
|
||||
call atpic_sched_ithd ; \
|
||||
call atpic_handle_intr ; \
|
||||
addl $4, %esp ; /* discard the parameter */ \
|
||||
; \
|
||||
decl TD_INTR_NESTING_LEVEL(%ebx) ; \
|
||||
MEXITCOUNT ; \
|
||||
jmp doreti
|
||||
|
||||
MCOUNT_LABEL(bintr)
|
||||
#define CLKINTR_PENDING movl $1,CNAME(clkintr_pending)
|
||||
/* Threaded interrupts */
|
||||
INTR(0,atpic_intr0, IO_ICU1, ENABLE_ICU1, CLKINTR_PENDING)
|
||||
INTR(1,atpic_intr1, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(2,atpic_intr2, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(3,atpic_intr3, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(4,atpic_intr4, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(5,atpic_intr5, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(6,atpic_intr6, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(7,atpic_intr7, IO_ICU1, ENABLE_ICU1,)
|
||||
INTR(8,atpic_intr8, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(9,atpic_intr9, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(10,atpic_intr10, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(11,atpic_intr11, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(12,atpic_intr12, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(13,atpic_intr13, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(14,atpic_intr14, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(15,atpic_intr15, IO_ICU2, ENABLE_ICU1_AND_2,)
|
||||
INTR(0, atpic_intr0)
|
||||
INTR(1, atpic_intr1)
|
||||
INTR(2, atpic_intr2)
|
||||
INTR(3, atpic_intr3)
|
||||
INTR(4, atpic_intr4)
|
||||
INTR(5, atpic_intr5)
|
||||
INTR(6, atpic_intr6)
|
||||
INTR(7, atpic_intr7)
|
||||
INTR(8, atpic_intr8)
|
||||
INTR(9, atpic_intr9)
|
||||
INTR(10, atpic_intr10)
|
||||
INTR(11, atpic_intr11)
|
||||
INTR(12, atpic_intr12)
|
||||
INTR(13, atpic_intr13)
|
||||
INTR(14, atpic_intr14)
|
||||
INTR(15, atpic_intr15)
|
||||
MCOUNT_LABEL(eintr)
|
||||
|
||||
@ -104,7 +104,7 @@
|
||||
#define HWI_MASK 0xffff /* bits for h/w interrupts */
|
||||
|
||||
#ifndef LOCORE
|
||||
void atpic_sched_ithd(struct intrframe iframe);
|
||||
void atpic_handle_intr(struct intrframe iframe);
|
||||
void atpic_startup(void);
|
||||
#endif
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user