Make sure the DWC OTG host mode channels are given enough time to disable.
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085c4798a8
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@ -507,6 +507,7 @@ static uint8_t
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dwc_otg_host_channel_wait(struct dwc_otg_td *td)
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{
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struct dwc_otg_softc *sc;
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uint16_t frame;
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uint8_t x;
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x = td->channel;
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@ -524,6 +525,8 @@ dwc_otg_host_channel_wait(struct dwc_otg_td *td)
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if (x == 0)
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return (0); /* wait */
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frame = DWC_OTG_READ_4(sc, DOTG_HFNUM) & HFNUM_FRNUM_MASK;
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/* find new disabled channel */
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for (x = 1; x != sc->sc_host_ch_max; x++) {
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@ -539,6 +542,9 @@ dwc_otg_host_channel_wait(struct dwc_otg_td *td)
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continue;
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}
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if (sc->sc_chan_state[x].last_frame == frame)
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continue;
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sc->sc_chan_state[td->channel].allocated = 0;
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sc->sc_chan_state[x].allocated = 1;
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@ -577,6 +583,7 @@ static uint8_t
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dwc_otg_host_channel_alloc(struct dwc_otg_td *td)
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{
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struct dwc_otg_softc *sc;
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uint16_t frame;
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uint8_t x;
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uint8_t max_channel;
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@ -594,6 +601,8 @@ dwc_otg_host_channel_alloc(struct dwc_otg_td *td)
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x = 1;
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}
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frame = DWC_OTG_READ_4(sc, DOTG_HFNUM) & HFNUM_FRNUM_MASK;
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for (; x != max_channel; x++) {
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uint32_t hcchar;
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@ -608,6 +617,9 @@ dwc_otg_host_channel_alloc(struct dwc_otg_td *td)
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continue;
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}
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if (sc->sc_chan_state[x].last_frame == frame)
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continue;
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sc->sc_chan_state[x].allocated = 1;
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/* clear interrupts */
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@ -633,8 +645,12 @@ dwc_otg_host_channel_disable(struct dwc_otg_softc *sc, uint8_t x)
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{
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uint32_t hcchar;
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hcchar = DWC_OTG_READ_4(sc, DOTG_HCCHAR(x));
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if (hcchar & (HCCHAR_CHENA | HCCHAR_CHDIS))
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if (hcchar & (HCCHAR_CHENA | HCCHAR_CHDIS)) {
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/* don't re-use channel until next SOF is transmitted */
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sc->sc_chan_state[x].last_frame =
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DWC_OTG_READ_4(sc, DOTG_HFNUM) & HFNUM_FRNUM_MASK;
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DWC_OTG_WRITE_4(sc, DOTG_HCCHAR(x), HCCHAR_CHENA | HCCHAR_CHDIS);
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}
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}
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static void
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@ -140,6 +140,7 @@ struct dwc_otg_profile {
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struct dwc_otg_chan_state {
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uint32_t hcint;
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uint16_t last_frame;
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uint8_t allocated;
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uint8_t suspended;
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};
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