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- Add ss2_pagezero() for zeroing pages using the movnti instruction. This

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instruction is enabled with SSE2 but does not use SSE registers.  It is a
   "non-temporal" move which bypasses the cache and does not dirty lines.
This commit is contained in:
Jeff Roberson 2003-10-01 05:25:27 +00:00
parent a93020d7a1
commit 977f9ab515
2 changed files with 15 additions and 0 deletions
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14
sys/i386/i386/support.s
View File

@ -350,6 +350,20 @@ intreg_i586_bzero:
ret ret
#endif /* I586_CPU && defined(DEV_NPX) */ #endif /* I586_CPU && defined(DEV_NPX) */
ENTRY(sse2_pagezero)
pushl %ebx
movl 8(%esp),%ecx
movl %ecx,%eax
addl $4096,%eax
xor %ebx,%ebx
1:
movnti %ebx,(%ecx)
addl $4,%ecx
cmpl %ecx,%eax
jne 1b
popl %ebx
ret
ENTRY(i686_pagezero) ENTRY(i686_pagezero)
pushl %edi pushl %edi
pushl %ebx pushl %ebx

1
sys/i386/include/md_var.h
View File

@ -93,6 +93,7 @@ void i586_bzero(void *buf, size_t len);
int i586_copyin(const void *udaddr, void *kaddr, size_t len); int i586_copyin(const void *udaddr, void *kaddr, size_t len);
int i586_copyout(const void *kaddr, void *udaddr, size_t len); int i586_copyout(const void *kaddr, void *udaddr, size_t len);
void i686_pagezero(void *addr); void i686_pagezero(void *addr);
void sse2_pagezero(void *addr);
void init_AMD_Elan_sc520(void); void init_AMD_Elan_sc520(void);
int is_physical_memory(vm_offset_t addr); int is_physical_memory(vm_offset_t addr);
vm_paddr_t kvtop(void *addr); vm_paddr_t kvtop(void *addr);