Fix for vanilla PC164 systems to use a slightly different PALcode magic
tweak to enable/disable interrupt sources. Seems to work. It is unclear how many of the PC164 models actually might needs this, and whether or not there are other hidden issues. Obtained from:Bernd Walter <ticso@cicely8.cicely.de>
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77dd285b04
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97cf6bcc60
@ -57,6 +57,8 @@ static void dec_eb164_cons_init __P((void));
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static void eb164_intr_init(void);
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extern void eb164_intr_enable(int irq);
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extern void eb164_intr_disable(int irq);
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extern void eb164_intr_enable_icsr(int irq);
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extern void eb164_intr_disable_icsr(int irq);
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extern int siocnattach __P((int, int));
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extern int siogdbattach __P((int, int));
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@ -76,8 +78,13 @@ dec_eb164_init()
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platform.cons_init = dec_eb164_cons_init;
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platform.pci_intr_init = eb164_intr_init;
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platform.pci_intr_map = NULL;
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platform.pci_intr_disable = eb164_intr_disable;
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platform.pci_intr_enable = eb164_intr_enable;
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if (strncmp(platform.model, "Digital AlphaPC 164 ", 20) == 0) {
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platform.pci_intr_disable = eb164_intr_disable_icsr;
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platform.pci_intr_enable = eb164_intr_enable_icsr;
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} else {
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platform.pci_intr_disable = eb164_intr_disable;
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platform.pci_intr_enable = eb164_intr_enable;
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}
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}
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extern int comconsole; /* XXX for forcing comconsole when srm serial console is used */
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@ -63,3 +63,33 @@ LEAF(eb164_intr_disable,1)
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call_pal PAL_cserve
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RET
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END(eb164_intr_disable)
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.text
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LEAF(eb164_intr_enable_icsr,1)
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mov a0, a1
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ldiq a0, 0x34
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call_pal PAL_cserve
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ldiq a0, 0x08 /* Allow PALRES */
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call_pal PAL_cserve
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.long 0x66100118 /* hw_mfpr a0, icsr */
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ldah a1, 0x0020 /* IMSK1 */
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or a0, a1, a0
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xor a0, a1, a0
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.long 0x76100118 /* hw_mtpr a0, icsr */
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ldiq a0, 0x09 /* Disable PALRES */
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call_pal PAL_cserve
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RET
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END(eb164_intr_enable_icsr)
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.text
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LEAF(eb164_intr_disable_icsr,1)
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ldiq a0, 0x08 /* Allow PALRES */
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call_pal PAL_cserve
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.long 0x66100118 /* hw_mfpr a0, icsr */
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ldah a1, 0x0020 /* IMSK1 */
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or a0, a1, a0
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.long 0x76100118 /* hw_mtpr a0, icsr */
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ldiq a0, 0x09 /* Disable PALRES */
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call_pal PAL_cserve
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RET
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END(eb164_intr_disable_icsr)
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