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riscv: Fix pmap_fault_fixup for L3 pages

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Summary:
The parentheses being in the wrong place means that, for L3 pages,
oldpte has all bits except PTE_V cleared, and so all the subsequent
checks against oldpte will fail, causing us to bail out and not retry
the faulting instruction after an SFENCE.VMA. This causes a WITNESS +
INVARIANTS kernel to fault on the "Chisel P3" (BOOM-based) DARPA SSITH
GFE SoC in pmap_init when writing to pv_table and, being a nofault
entry, subsequently panic with:

  panic: vm_fault_lookup: fault on nofault entry, addr: 0xffffffc004e00000

Reviewed by:	markj
Approved by:	markj
Differential Revision:	https://reviews.freebsd.org/D24315
This commit is contained in:
jrtc27 2020-04-06 22:29:15 +00:00
parent 5a99cf88dc
commit 99b1bac35d
1 changed files with 1 additions and 1 deletions
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2
sys/riscv/riscv/pmap.c
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@ -2416,7 +2416,7 @@ pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype)
goto done;
if ((l2e & PTE_RWX) == 0) {
pte = pmap_l2_to_l3(l2, va);
if (pte == NULL || ((oldpte = pmap_load(pte) & PTE_V)) == 0)
if (pte == NULL || ((oldpte = pmap_load(pte)) & PTE_V) == 0)
goto done;
} else {
pte = l2;