PCI express device status register has W1C feature. Writing 0 has

no effect. Make sure to clear error bits by writing 1. [1]
While I'm here use predefined value instead of hardcodig magic
vlaue.

Submitted by:	msaitoh at NetBSD [1]
This commit is contained in:
Pyun YongHyeon 2010-02-01 20:58:45 +00:00
parent 4d36f1aaf1
commit 9a6e301de2

View File

@ -3136,14 +3136,17 @@ bge_reset(struct bge_softc *sc)
devctl = pci_read_config(dev,
sc->bge_expcap + PCIR_EXPRESS_DEVICE_CTL, 2);
/* Clear enable no snoop and disable relaxed ordering. */
devctl &= ~(0x0010 | 0x0800);
devctl &= ~(PCIM_EXP_CTL_RELAXED_ORD_ENABLE |
PCIM_EXP_CTL_NOSNOOP_ENABLE);
/* Set PCIE max payload size to 128. */
devctl &= ~PCIM_EXP_CTL_MAX_PAYLOAD;
pci_write_config(dev, sc->bge_expcap + PCIR_EXPRESS_DEVICE_CTL,
devctl, 2);
/* Clear error status. */
pci_write_config(dev, sc->bge_expcap + PCIR_EXPRESS_DEVICE_STA,
0, 2);
PCIM_EXP_STA_CORRECTABLE_ERROR |
PCIM_EXP_STA_NON_FATAL_ERROR | PCIM_EXP_STA_FATAL_ERROR |
PCIM_EXP_STA_UNSUPPORTED_REQ, 2);
}
/* Reset some of the PCI state that got zapped by reset. */