Make hw.ata.ata_dma_check_80pin tunable affect not only device side, but
also controller side cable checks. Make respective sysctl writable. PR: kern/143462
This commit is contained in:
parent
36dc373119
commit
9a9bce34f1
@ -105,7 +105,7 @@ SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma, CTLFLAG_RDTUN, &ata_dma, 0,
|
||||
"ATA disk DMA mode control");
|
||||
TUNABLE_INT("hw.ata.ata_dma_check_80pin", &ata_dma_check_80pin);
|
||||
SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma_check_80pin,
|
||||
CTLFLAG_RDTUN, &ata_dma_check_80pin, 1,
|
||||
CTLFLAG_RW, &ata_dma_check_80pin, 1,
|
||||
"Check for 80pin cable before setting ATA DMA mode");
|
||||
TUNABLE_INT("hw.ata.atapi_dma", &atapi_dma);
|
||||
SYSCTL_INT(_hw_ata, OID_AUTO, atapi_dma, CTLFLAG_RDTUN, &atapi_dma, 0,
|
||||
|
@ -286,7 +286,7 @@ ata_ali_setmode(device_t dev, int target, int mode)
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
|
||||
if (ctlr->chip->cfg2 & ALI_NEW && ctlr->chip->chiprev < 0xc7) {
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
pci_read_config(parent, 0x4a, 1) & (1 << ch->unit)) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
|
@ -119,7 +119,7 @@ ata_amd_setmode(device_t dev, int target, int mode)
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
if (ctlr->chip->cfg1 & AMD_CABLE) {
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
!(pci_read_config(parent, 0x42, 1) & (1 << devno))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
|
@ -216,7 +216,7 @@ ata_highpoint_check_80pin(device_t dev, int mode)
|
||||
res = pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x1:0x2);
|
||||
pci_write_config(parent, reg, val, 1);
|
||||
|
||||
if (mode > ATA_UDMA2 && res) {
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 && res) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
|
@ -336,7 +336,8 @@ ata_intel_new_setmode(device_t dev, int target, int mode)
|
||||
u_int8_t utimings[] = { 0x00, 0x01, 0x02, 0x01, 0x02, 0x01, 0x02 };
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
if (mode > ATA_UDMA2 && !(reg54 & (0x10 << devno))) {
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
!(reg54 & (0x10 << devno))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
|
@ -139,7 +139,8 @@ ata_ite_821x_setmode(device_t dev, int target, int mode)
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
/* check the CBLID bits for 80 conductor cable detection */
|
||||
if (mode > ATA_UDMA2 && (pci_read_config(parent, 0x40, 2) &
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
(pci_read_config(parent, 0x40, 2) &
|
||||
(ch->unit ? (1<<3) : (1<<2)))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
@ -186,7 +187,8 @@ ata_ite_8213_setmode(device_t dev, int target, int mode)
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
|
||||
if (mode > ATA_UDMA2 && !(reg54 & (0x10 << target))) {
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
!(reg54 & (0x10 << target))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
|
@ -149,7 +149,8 @@ ata_jmicron_setmode(device_t dev, int target, int mode)
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
/* check for 80pin cable present */
|
||||
if (mode > ATA_UDMA2 && pci_read_config(dev, 0x40, 1) & 0x08) {
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
pci_read_config(dev, 0x40, 1) & 0x08) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
|
@ -188,7 +188,8 @@ ata_marvell_setmode(device_t dev, int target, int mode)
|
||||
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
/* Check for 80pin cable present. */
|
||||
if (mode > ATA_UDMA2 && ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x01) {
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x01) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
|
@ -470,7 +470,8 @@ ata_promise_setmode(device_t dev, int target, int mode)
|
||||
switch (ctlr->chip->cfg1) {
|
||||
case PR_OLD:
|
||||
case PR_NEW:
|
||||
if (mode > ATA_UDMA2 && (pci_read_config(parent, 0x50, 2) &
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
(pci_read_config(parent, 0x50, 2) &
|
||||
(ch->unit ? 1 << 11 : 1 << 10))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
@ -479,7 +480,7 @@ ata_promise_setmode(device_t dev, int target, int mode)
|
||||
|
||||
case PR_TX:
|
||||
ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b);
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x04) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
@ -487,7 +488,7 @@ ata_promise_setmode(device_t dev, int target, int mode)
|
||||
break;
|
||||
|
||||
case PR_MIO:
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
(ATA_INL(ctlr->r_res2,
|
||||
(ctlr->chip->cfg2 & PR_SX4X ? 0x000c0260 : 0x0260) +
|
||||
(ch->unit << 7)) & 0x01000000)) {
|
||||
|
@ -389,7 +389,8 @@ ata_sii_setmode(device_t dev, int target, int mode)
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
|
||||
if (ctlr->chip->cfg2 & SII_SETCLK) {
|
||||
if (mode > ATA_UDMA2 && (pci_read_config(parent, 0x79, 1) &
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
(pci_read_config(parent, 0x79, 1) &
|
||||
(ch->unit ? 0x02 : 0x01))) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
|
@ -243,13 +243,13 @@ ata_sis_setmode(device_t dev, int target, int mode)
|
||||
mode = min(mode, ctlr->chip->max_dma);
|
||||
|
||||
if (ctlr->chip->cfg1 == SIS_133NEW) {
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
pci_read_config(parent, ch->unit ? 0x52 : 0x50,2) & 0x8000) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
}
|
||||
} else {
|
||||
if (mode > ATA_UDMA2 &&
|
||||
if (ata_dma_check_80pin && mode > ATA_UDMA2 &&
|
||||
pci_read_config(parent, 0x48, 1)&(ch->unit ? 0x20 : 0x10)) {
|
||||
ata_print_cable(dev, "controller");
|
||||
mode = ATA_UDMA2;
|
||||
|
Loading…
Reference in New Issue
Block a user